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v1.2p fabrication exported

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This commit is contained in:
Kevin Redon
2012-05-16 19:52:14 +02:00
parent f0bf11b541
commit 1c82a64101
32 changed files with 89167 additions and 142753 deletions
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6
hardware/kicad/SIMtrace.brd
View File

@@ -1,4 +1,4 @@
PCBNEW-BOARD Version 1 date Wed 16 May 2012 13:08:20 CEST
PCBNEW-BOARD Version 1 date Wed 16 May 2012 19:42:17 CEST
# Created by Pcbnew(2011-05-25)-stable
@@ -35,7 +35,7 @@ InternalUnit 0.000100 INCH
Layers 2
Layer[0] Back signal
Layer[15] Front signal
TrackWidth 320
TrackWidth 80
TrackWidthList 98
TrackWidthList 160
TrackWidthList 197
@@ -64,7 +64,7 @@ PadSize 157 197
PadDrill 0
Pad2MaskClearance 100
AuxiliaryAxisOrg 62750 26200
PcbPlotParams (pcbplotparams (layerselection 284983297) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk true) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory ../pcb/gerber/))
PcbPlotParams (pcbplotparams (layerselection 284983297) (usegerberextensions true) (excludeedgelayer false) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk true) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory ../pcb/gerber/))
$EndSETUP
$EQUIPOT

138
hardware/kicad/SIMtrace.pro
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@@ -1,76 +1,7 @@
update=Sa 02 Jul 2011 12:46:46 CEST
last_client=cvpcb
update=Wed 16 May 2012 19:36:22 CEST
last_client=eeschema
[general]
version=1
[eeschema]
version=1
LibDir=
NetFmt=1
HPGLSpd=20
HPGLDm=15
HPGLNum=1
offX_A4=0
offY_A4=0
offX_A3=0
offY_A3=0
offX_A2=0
offY_A2=0
offX_A1=0
offY_A1=0
offX_A0=0
offY_A0=0
offX_A=0
offY_A=0
offX_B=0
offY_B=0
offX_C=0
offY_C=0
offX_D=0
offY_D=0
offX_E=0
offY_E=0
RptD_X=0
RptD_Y=100
RptLab=1
SimCmd=
UseNetN=0
LabSize=60
PrintMonochrome=1
ShowSheetReferenceAndTitleBlock=1
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=special
LibName13=microcontrollers
LibName14=dsp
LibName15=microchip
LibName16=analog_switches
LibName17=motorola
LibName18=texas
LibName19=intel
LibName20=audio
LibName21=interface
LibName22=digital-audio
LibName23=philips
LibName24=display
LibName25=cypress
LibName26=siliconi
LibName27=opto
LibName28=atmel
LibName29=contrib
LibName30=valves
LibName31=lib/at91sam7sxxx-au
LibName32=lib/SIMtrace
LibName33=lib/smartcard
[pcbnew]
version=1
PadDrlX=0
@@ -110,3 +41,68 @@ version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[eeschema]
version=1
LibDir=
NetFmt=1
HPGLSpd=20
HPGLDm=15
HPGLNum=1
offX_A4=0
offY_A4=0
offX_A3=0
offY_A3=0
offX_A2=0
offY_A2=0
offX_A1=0
offY_A1=0
offX_A0=0
offY_A0=0
offX_A=0
offY_A=0
offX_B=0
offY_B=0
offX_C=0
offY_C=0
offX_D=0
offY_D=0
offX_E=0
offY_E=0
RptD_X=0
RptD_Y=100
RptLab=1
LabSize=60
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=special
LibName13=microcontrollers
LibName14=dsp
LibName15=microchip
LibName16=analog_switches
LibName17=motorola
LibName18=texas
LibName19=intel
LibName20=audio
LibName21=interface
LibName22=digital-audio
LibName23=philips
LibName24=display
LibName25=cypress
LibName26=siliconi
LibName27=opto
LibName28=atmel
LibName29=contrib
LibName30=valves
LibName31=lib/at91sam7sxxx-au
LibName32=lib/SIMtrace
LibName33=lib/smartcard

4
hardware/kicad/SIMtrace.sch
View File

@@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Wed 16 May 2012 12:55:25 CEST
EESchema Schematic File Version 2 date Wed 16 May 2012 13:12:21 CEST
LIBS:power
LIBS:device
LIBS:transistors
@@ -39,7 +39,7 @@ encoding utf-8
Sheet 1 1
Title "SIMtrace hardware"
Date "16 may 2012"
Rev "v1.1p"
Rev "v1.2p"
Comp "osmocom"
Comment1 "CC-BY-SA"
Comment2 ""