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schematic: make it more readable
- VCC is up - GND is down - group the parts by functionality and use net name - separate decoupling capacitors - arrange groups from left input to right output Change-Id: I2d894dd10b8b619ccbce1ae8b7e25316963157c8
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@@ -613,6 +613,21 @@ X pwr 1 0 0 0 U 50 50 0 0 w
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ENDDRAW
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ENDDRAW
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ENDDEF
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ENDDEF
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#
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#
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# power_VBUS
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#
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DEF power_VBUS #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "power_VBUS" 0 150 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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P 2 0 1 0 -30 50 0 100 N
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P 2 0 1 0 0 0 0 100 N
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P 2 0 1 0 0 100 30 50 N
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X VBUS 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# smartcard_ISO7816_NO
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# smartcard_ISO7816_NO
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#
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#
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DEF smartcard_ISO7816_NO P 0 40 Y Y 2 F N
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DEF smartcard_ISO7816_NO P 0 40 Y Y 2 F N
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@@ -1,4 +1,4 @@
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update=Di 27 Aug 2019 16:29:29 CEST
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update=Di 03 Sep 2019 14:46:50 CEST
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last_client=kicad
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last_client=kicad
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[general]
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[general]
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version=1
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version=1
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@@ -44,3 +44,13 @@ EquName1=devcms
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[eeschema]
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[eeschema]
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version=1
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version=1
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LibDir=
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LibDir=
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[schematic_editor]
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version=1
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PageLayoutDescrFile=
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PlotDirectoryName=../pcb/schema/
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SubpartIdSeparator=0
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SubpartFirstId=65
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NetFmtName=
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SpiceAjustPassiveValues=0
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LabSize=50
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ERC_TestSimilarLabels=1
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