catarrh/simtrace2
1
0
Fork 0
mirror of https://gitea.osmocom.org/sim-card/simtrace2.git synced 2026-03-18 14:28:33 +03:00
Code Issues Packages Projects Releases Wiki Activity

Renamed main folder to firmware

Browse Source
This commit is contained in:
Christina Quast
2015-04-07 18:24:06 +02:00
parent f5cd7efede
commit 5a67c0fef3
326 changed files with 0 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

72
firmware/atmel_softpack_libraries/libchip_sam3s/chip.h Normal file
View File

@@ -0,0 +1,72 @@
#ifndef _LIB_SAM3S_
#define _LIB_SAM3S_
/*
* Peripherals registers definitions
*/
#if defined sam3s4
#elif defined sam3s2
#elif defined sam3s1
#else
#warning Library does not support the specified chip, specifying sam3s4.
#define sam3s4
#endif
#include "SAM3S.h"
/* Define attribute */
#if defined ( __CC_ARM ) /* Keil µVision 4 */
#define WEAK __attribute__ ((weak))
#elif defined ( __ICCARM__ ) /* IAR Ewarm 5.41+ */
#define WEAK __weak
#elif defined ( __GNUC__ ) /* GCC CS3 2009q3-68 */
#define WEAK __attribute__ ((weak))
#endif
/* Define NO_INIT attribute */
#if defined ( __CC_ARM )
#define NO_INIT
#elif defined ( __ICCARM__ )
#define NO_INIT __no_init
#elif defined ( __GNUC__ )
#define NO_INIT
#endif
/*
* Core
*/
#include "exceptions.h"
/*
* Peripherals
*/
#include "acc.h"
#include "adc.h"
#include "async.h"
#include "crccu.h"
#include "dacc.h"
#include "efc.h"
#include "flashd.h"
#include "hsmci.h"
#include "pio.h"
#include "pio_it.h"
#include "pio_capture.h"
#include "pmc.h"
#include "pwmc.h"
#include "rtc.h"
#include "rtt.h"
#include "spi.h"
#include "spi_pdc.h"
#include "ssc.h"
#include "tc.h"
#include "twi.h"
#include "twid.h"
#include "usart.h"
//#include "USBD_Config.h"
#include "trace.h"
#include "wdt.h"
#endif /* _LIB_SAM3S_ */

1337
firmware/atmel_softpack_libraries/libchip_sam3s/cmsis/CMSIS_Core.htm Normal file
View File

File diff suppressed because it is too large Load Diff

807
firmware/atmel_softpack_libraries/libchip_sam3s/cmsis/core_cm3.c Normal file
View File

@@ -0,0 +1,807 @@
/**************************************************************************//**
* @file core_cm3.c
* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File
* @version V1.30
* @date 30. October 2009
*
* @note
* Copyright (C) 2009 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
#include <stdint.h>
/* define compiler specific symbols */
#if defined ( __CC_ARM )
#define __ASM __asm /*!< asm keyword for ARM Compiler */
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
#elif defined ( __ICCARM__ )
#define __ASM __asm /*!< asm keyword for IAR Compiler */
#define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
#elif defined ( __GNUC__ )
#define __ASM __asm /*!< asm keyword for GNU Compiler */
#define __INLINE inline /*!< inline keyword for GNU Compiler */
#elif defined ( __TASKING__ )
#define __ASM __asm /*!< asm keyword for TASKING Compiler */
#define __INLINE inline /*!< inline keyword for TASKING Compiler */
#endif
uint32_t __get_PSP(void) ;
void __set_PSP(uint32_t topOfProcStack) ;
uint32_t __get_MSP(void) ;
void __set_MSP(uint32_t mainStackPointer) ;
uint32_t __REV16(uint16_t value) ;
int32_t __REVSH(int16_t value) ;
uint32_t __RBIT(uint32_t value) ;
uint8_t __LDREXB(uint8_t *addr) ;
uint16_t __LDREXH(uint16_t *addr) ;
uint32_t __LDREXW(uint32_t *addr) ;
uint32_t __STREXB(uint8_t value, uint8_t *addr) ;
uint32_t __STREXH(uint16_t value, uint16_t *addr) ;
uint32_t __STREXW(uint32_t value, uint32_t *addr) ;
uint32_t __get_BASEPRI(void) ;
void __set_BASEPRI(uint32_t basePri) ;
uint32_t __get_PRIMASK(void) ;
void __set_PRIMASK(uint32_t priMask) ;
uint32_t __get_FAULTMASK(void) ;
void __set_FAULTMASK(uint32_t faultMask) ;
uint32_t __get_CONTROL(void) ;
void __set_CONTROL(uint32_t control) ;
uint32_t __REV(uint32_t value) ;
/* ################### Compiler specific Intrinsics ########################### */
#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
/* ARM armcc specific functions */
/**
* @brief Return the Process Stack Pointer
*
* @return ProcessStackPointer
*
* Return the actual process stack pointer
*/
__ASM uint32_t __get_PSP(void)
{
mrs r0, psp
bx lr
}
/**
* @brief Set the Process Stack Pointer
*
* @param topOfProcStack Process Stack Pointer
*
* Assign the value ProcessStackPointer to the MSP
* (process stack pointer) Cortex processor register
*/
__ASM void __set_PSP(uint32_t topOfProcStack)
{
msr psp, r0
bx lr
}
/**
* @brief Return the Main Stack Pointer
*
* @return Main Stack Pointer
*
* Return the current value of the MSP (main stack pointer)
* Cortex processor register
*/
__ASM uint32_t __get_MSP(void)
{
mrs r0, msp
bx lr
}
/**
* @brief Set the Main Stack Pointer
*
* @param topOfMainStack Main Stack Pointer
*
* Assign the value mainStackPointer to the MSP
* (main stack pointer) Cortex processor register
*/
__ASM void __set_MSP(uint32_t mainStackPointer)
{
msr msp, r0
bx lr
}
/**
* @brief Reverse byte order in unsigned short value
*
* @param value value to reverse
* @return reversed value
*
* Reverse byte order in unsigned short value
*/
__ASM uint32_t __REV16(uint16_t value)
{
rev16 r0, r0
bx lr
}
/**
* @brief Reverse byte order in signed short value with sign extension to integer
*
* @param value value to reverse
* @return reversed value
*
* Reverse byte order in signed short value with sign extension to integer
*/
__ASM int32_t __REVSH(int16_t value)
{
revsh r0, r0
bx lr
}
#if (__ARMCC_VERSION < 400000)
/**
* @brief Remove the exclusive lock created by ldrex
*
* Removes the exclusive lock which is created by ldrex.
*/
__ASM void __CLREX(void)
{
clrex
}
/**
* @brief Return the Base Priority value
*
* @return BasePriority
*
* Return the content of the base priority register
*/
__ASM uint32_t __get_BASEPRI(void)
{
mrs r0, basepri
bx lr
}
/**
* @brief Set the Base Priority value
*
* @param basePri BasePriority
*
* Set the base priority register
*/
__ASM void __set_BASEPRI(uint32_t basePri)
{
msr basepri, r0
bx lr
}
/**
* @brief Return the Priority Mask value
*
* @return PriMask
*
* Return state of the priority mask bit from the priority mask register
*/
__ASM uint32_t __get_PRIMASK(void)
{
mrs r0, primask
bx lr
}
/**
* @brief Set the Priority Mask value
*
* @param priMask PriMask
*
* Set the priority mask bit in the priority mask register
*/
__ASM void __set_PRIMASK(uint32_t priMask)
{
msr primask, r0
bx lr
}
/**
* @brief Return the Fault Mask value
*
* @return FaultMask
*
* Return the content of the fault mask register
*/
__ASM uint32_t __get_FAULTMASK(void)
{
mrs r0, faultmask
bx lr
}
/**
* @brief Set the Fault Mask value
*
* @param faultMask faultMask value
*
* Set the fault mask register
*/
__ASM void __set_FAULTMASK(uint32_t faultMask)
{
msr faultmask, r0
bx lr
}
/**
* @brief Return the Control Register value
*
* @return Control value
*
* Return the content of the control register
*/
__ASM uint32_t __get_CONTROL(void)
{
mrs r0, control
bx lr
}
/**
* @brief Set the Control Register value
*
* @param control Control value
*
* Set the control register
*/
__ASM void __set_CONTROL(uint32_t control)
{
msr control, r0
bx lr
}
#endif /* __ARMCC_VERSION */
#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
/* IAR iccarm specific functions */
#pragma diag_suppress=Pe940
/**
* @brief Return the Process Stack Pointer
*
* @return ProcessStackPointer
*
* Return the actual process stack pointer
*/
uint32_t __get_PSP(void)
{
__ASM("mrs r0, psp");
__ASM("bx lr");
}
/**
* @brief Set the Process Stack Pointer
*
* @param topOfProcStack Process Stack Pointer
*
* Assign the value ProcessStackPointer to the MSP
* (process stack pointer) Cortex processor register
*/
void __set_PSP(uint32_t topOfProcStack)
{
__ASM("msr psp, r0");
__ASM("bx lr");
}
/**
* @brief Return the Main Stack Pointer
*
* @return Main Stack Pointer
*
* Return the current value of the MSP (main stack pointer)
* Cortex processor register
*/
uint32_t __get_MSP(void)
{
__ASM("mrs r0, msp");
__ASM("bx lr");
}
/**
* @brief Set the Main Stack Pointer
*
* @param topOfMainStack Main Stack Pointer
*
* Assign the value mainStackPointer to the MSP
* (main stack pointer) Cortex processor register
*/
void __set_MSP(uint32_t topOfMainStack)
{
__ASM("msr msp, r0");
__ASM("bx lr");
}
/**
* @brief Reverse byte order in unsigned short value
*
* @param value value to reverse
* @return reversed value
*
* Reverse byte order in unsigned short value
*/
uint32_t __REV16(uint16_t value)
{
__ASM("rev16 r0, r0");
__ASM("bx lr");
}
/**
* @brief Reverse bit order of value
*
* @param value value to reverse
* @return reversed value
*
* Reverse bit order of value
*/
uint32_t __RBIT(uint32_t value)
{
__ASM("rbit r0, r0");
__ASM("bx lr");
}
/**
* @brief LDR Exclusive (8 bit)
*
* @param *addr address pointer
* @return value of (*address)
*
* Exclusive LDR command for 8 bit values)
*/
uint8_t __LDREXB(uint8_t *addr)
{
__ASM("ldrexb r0, [r0]");
__ASM("bx lr");
}
/**
* @brief LDR Exclusive (16 bit)
*
* @param *addr address pointer
* @return value of (*address)
*
* Exclusive LDR command for 16 bit values
*/
uint16_t __LDREXH(uint16_t *addr)
{
__ASM("ldrexh r0, [r0]");
__ASM("bx lr");
}
/**
* @brief LDR Exclusive (32 bit)
*
* @param *addr address pointer
* @return value of (*address)
*
* Exclusive LDR command for 32 bit values
*/
uint32_t __LDREXW(uint32_t *addr)
{
__ASM("ldrex r0, [r0]");
__ASM("bx lr");
}
/**
* @brief STR Exclusive (8 bit)
*
* @param value value to store
* @param *addr address pointer
* @return successful / failed
*
* Exclusive STR command for 8 bit values
*/
uint32_t __STREXB(uint8_t value, uint8_t *addr)
{
__ASM("strexb r0, r0, [r1]");
__ASM("bx lr");
}
/**
* @brief STR Exclusive (16 bit)
*
* @param value value to store
* @param *addr address pointer
* @return successful / failed
*
* Exclusive STR command for 16 bit values
*/
uint32_t __STREXH(uint16_t value, uint16_t *addr)
{
__ASM("strexh r0, r0, [r1]");
__ASM("bx lr");
}
/**
* @brief STR Exclusive (32 bit)
*
* @param value value to store
* @param *addr address pointer
* @return successful / failed
*
* Exclusive STR command for 32 bit values
*/
uint32_t __STREXW(uint32_t value, uint32_t *addr)
{
__ASM("strex r0, r0, [r1]");
__ASM("bx lr");
}
#pragma diag_default=Pe940
#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
/* GNU gcc specific functions */
/**
* @brief Return the Process Stack Pointer
*
* @return ProcessStackPointer
*
* Return the actual process stack pointer
*/
/*extern uint32_t __get_PSP(void) __attribute__( ( naked ) ); */
uint32_t __get_PSP(void)
{
uint32_t result=0;
__ASM volatile ("MRS %0, psp\n\t"
"MOV r0, %0 \n\t"
"BX lr \n\t" : "=r" (result) );
return(result);
}
/**
* @brief Set the Process Stack Pointer
*
* @param topOfProcStack Process Stack Pointer
*
* Assign the value ProcessStackPointer to the MSP
* (process stack pointer) Cortex processor register
*/
/*void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) ); */
void __set_PSP(uint32_t topOfProcStack)
{
__ASM volatile ("MSR psp, %0\n\t"
"BX lr \n\t" : : "r" (topOfProcStack) );
}
/**
* @brief Return the Main Stack Pointer
*
* @return Main Stack Pointer
*
* Return the current value of the MSP (main stack pointer)
* Cortex processor register
*/
/*uint32_t __get_MSP(void) __attribute__( ( naked ) ); */
uint32_t __get_MSP(void)
{
uint32_t result=0;
__ASM volatile ("MRS %0, msp\n\t"
"MOV r0, %0 \n\t"
"BX lr \n\t" : "=r" (result) );
return(result);
}
/**
* @brief Set the Main Stack Pointer
*
* @param topOfMainStack Main Stack Pointer
*
* Assign the value mainStackPointer to the MSP
* (main stack pointer) Cortex processor register
*/
/*void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) ); */
void __set_MSP(uint32_t topOfMainStack)
{
__ASM volatile ("MSR msp, %0\n\t"
"BX lr \n\t" : : "r" (topOfMainStack) );
}
/**
* @brief Return the Base Priority value
*
* @return BasePriority
*
* Return the content of the base priority register
*/
uint32_t __get_BASEPRI(void)
{
uint32_t result=0;
__ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
return(result);
}
/**
* @brief Set the Base Priority value
*
* @param basePri BasePriority
*
* Set the base priority register
*/
void __set_BASEPRI(uint32_t value)
{
__ASM volatile ("MSR basepri, %0" : : "r" (value) );
}
/**
* @brief Return the Priority Mask value
*
* @return PriMask
*
* Return state of the priority mask bit from the priority mask register
*/
uint32_t __get_PRIMASK(void)
{
uint32_t result=0;
__ASM volatile ("MRS %0, primask" : "=r" (result) );
return(result);
}
/**
* @brief Set the Priority Mask value
*
* @param priMask PriMask
*
* Set the priority mask bit in the priority mask register
*/
void __set_PRIMASK(uint32_t priMask)
{
__ASM volatile ("MSR primask, %0" : : "r" (priMask) );
}
/**
* @brief Return the Fault Mask value
*
* @return FaultMask
*
* Return the content of the fault mask register
*/
uint32_t __get_FAULTMASK(void)
{
uint32_t result=0;
__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
return(result);
}
/**
* @brief Set the Fault Mask value
*
* @param faultMask faultMask value
*
* Set the fault mask register
*/
void __set_FAULTMASK(uint32_t faultMask)
{
__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
}
/**
* @brief Return the Control Register value
*
* @return Control value
*
* Return the content of the control register
*/
uint32_t __get_CONTROL(void)
{
uint32_t result=0;
__ASM volatile ("MRS %0, control" : "=r" (result) );
return(result);
}
/**
* @brief Set the Control Register value
*
* @param control Control value
*
* Set the control register
*/
void __set_CONTROL(uint32_t control)
{
__ASM volatile ("MSR control, %0" : : "r" (control) );
}
/**
* @brief Reverse byte order in integer value
*
* @param value value to reverse
* @return reversed value
*
* Reverse byte order in integer value
*/
uint32_t __REV(uint32_t value)
{
uint32_t result=0;
__ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
return(result);
}
/**
* @brief Reverse byte order in unsigned short value
*
* @param value value to reverse
* @return reversed value
*
* Reverse byte order in unsigned short value
*/
uint32_t __REV16(uint16_t value)
{
uint32_t result=0;
__ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
return(result);
}
/**
* @brief Reverse byte order in signed short value with sign extension to integer
*
* @param value value to reverse
* @return reversed value
*
* Reverse byte order in signed short value with sign extension to integer
*/
int32_t __REVSH(int16_t value)
{
uint32_t result=0;
__ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
return(result);
}
/**
* @brief Reverse bit order of value
*
* @param value value to reverse
* @return reversed value
*
* Reverse bit order of value
*/
uint32_t __RBIT(uint32_t value)
{
uint32_t result=0;
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
return(result);
}
/**
* @brief LDR Exclusive (8 bit)
*
* @param *addr address pointer
* @return value of (*address)
*
* Exclusive LDR command for 8 bit value
*/
uint8_t __LDREXB(uint8_t *addr)
{
uint8_t result=0;
__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
return(result);
}
/**
* @brief LDR Exclusive (16 bit)
*
* @param *addr address pointer
* @return value of (*address)
*
* Exclusive LDR command for 16 bit values
*/
uint16_t __LDREXH(uint16_t *addr)
{
uint16_t result=0;
__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
return(result);
}
/**
* @brief LDR Exclusive (32 bit)
*
* @param *addr address pointer
* @return value of (*address)
*
* Exclusive LDR command for 32 bit values
*/
uint32_t __LDREXW(uint32_t *addr)
{
uint32_t result=0;
__ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
return(result);
}
/**
* @brief STR Exclusive (8 bit)
*
* @param value value to store
* @param *addr address pointer
* @return successful / failed
*
* Exclusive STR command for 8 bit values
*/
uint32_t __STREXB(uint8_t value, uint8_t *addr)
{
uint32_t result=0;
__ASM volatile ("strexb %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
return(result);
}
/**
* @brief STR Exclusive (16 bit)
*
* @param value value to store
* @param *addr address pointer
* @return successful / failed
*
* Exclusive STR command for 16 bit values
*/
uint32_t __STREXH(uint16_t value, uint16_t *addr)
{
uint32_t result=0;
__ASM volatile ("strexh %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
return(result);
}
/**
* @brief STR Exclusive (32 bit)
*
* @param value value to store
* @param *addr address pointer
* @return successful / failed
*
* Exclusive STR command for 32 bit values
*/
uint32_t __STREXW(uint32_t value, uint32_t *addr)
{
uint32_t result=0;
__ASM volatile ("strex %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
return(result);
}
#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
/* TASKING carm specific functions */
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all instrinsics,
* Including the CMSIS ones.
*/
#endif

1818
firmware/atmel_softpack_libraries/libchip_sam3s/cmsis/core_cm3.h Normal file
View File

File diff suppressed because it is too large Load Diff

7735
firmware/atmel_softpack_libraries/libchip_sam3s/include/SAM3S.h Normal file
View File

File diff suppressed because it is too large Load Diff

303
firmware/atmel_softpack_libraries/libchip_sam3s/include/USBD_Config.h Normal file
View File

@@ -0,0 +1,303 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* USB Device Framework configurations.
*
*/
#ifndef USBD_CONFIG_H
#define USBD_CONFIG_H
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
/** \addtogroup usbd_config
*@{
*/
/*----------------------------------------------------------------------------
* Constants
*----------------------------------------------------------------------------*/
/** \addtogroup usbd_ids USBD Device IDs
* @{
*/
#define USBD_VID_ATMEL 0x03EB /**< Vendor ID: Atmel */
#define USBD_PID_ENUM 0x0001 /**< Product ID: Enum (Core) */
#define USBD_PID_CDCDSERIAL 0x6119 /**< Product ID: CDC Serial */
#define USBD_PID_HIDKEYBOARD 0x6127 /**< Product ID: HID Keyboard */
#define USBD_PID_AUDIO 0x6128 /**< Product ID: Audio devices */
#define USBD_PID_MSD 0x6129 /**< Product ID: Massstorage */
#define USBD_PID_CDCHID 0x6130 /**< Product ID: composite */
#define USBD_PID_CDCAUDIO 0x6131 /**< Product ID: composite */
#define USBD_PID_CDCMSD 0x6132 /**< Product ID: composite */
#define USBD_PID_CDCCDC 0x6133 /**< Product ID: composite */
#define USBD_PID_HIDAUDIO 0x6134 /**< Product ID: composite */
#define USBD_PID_HIDMSD 0x6135 /**< Product ID: composite */
#define USBD_PID_HIDMOUSE 0x6200 /**< Product ID: HID Mouse */
#define USBD_PID_HIDTRANSFER 0x6201 /**< Product ID: HID Transfer */
#define USBD_PID_CCID 0x6203 /**< Product ID: CCID */
#define USBD_RELEASE_1_00 0x0100 /**< Release: 1.00 */
/** @}*/
/** \addtogroup usbd_general_config USBD General Configure
* @{
* This page lists general configurations for all USB device drivers.
* - \ref USBD_BMATTRIBUTES
*/
/** default USB Device attributes configuration descriptor
* (bus or self powered, remote wakeup) */
#define USBD_BMATTRIBUTES BOARD_USB_BMATTRIBUTES
/** @}*/
/*----------------------------------------------------------------------------
* USB Device - Mass storage
*----------------------------------------------------------------------------*/
/** \addtogroup usbd_msdd_config USB MassStorage Configure
* @{
* This page lists the defines used by the Mass Storage driver.
*
* \section msd_ep_addr Endpoint Addresses
* - \ref MSDDriverDescriptors_BULKOUT
* - \ref MSDDriverDescriptors_BULKIN
*/
/** Address of the Mass Storage bulk-out endpoint.*/
#define MSDDriverDescriptors_BULKOUT 1
/** Address of the Mass Storage bulk-in endpoint.*/
#define MSDDriverDescriptors_BULKIN 2
/** @}*/
/*----------------------------------------------------------------------------
* USB Device - CDC Serial
*----------------------------------------------------------------------------*/
/** \addtogroup usbd_cdc_serial_config USB CDC Serial Configure
* @{
* This page lists the defines used by the CDC Serial Device Driver.
*
* \section cdcd_ep_addr Endpoint Addresses
* - \ref CDCDSerialDriverDescriptors_DATAOUT
* - \ref CDCDSerialDriverDescriptors_DATAIN
* - \ref CDCDSerialDriverDescriptors_NOTIFICATION
*/
/** Data OUT endpoint number */
#define CDCDSerialDriverDescriptors_DATAOUT 1
/** Data IN endpoint number */
#define CDCDSerialDriverDescriptors_DATAIN 2
/** Notification endpoint number */
#define CDCDSerialDriverDescriptors_NOTIFICATION 3
/** @}*/
/*----------------------------------------------------------------------------
* USB Device - Audio
*----------------------------------------------------------------------------*/
/** \addtogroup usbd_audio_config USB Audio General Configure
* @{
* This page lists definitions for USB Audio Devices Drivers.
* - \ref
*/
#if defined(at91sam7s) || defined(at91sam9xe)
/** Sample rate in Hz. */
#define AUDDevice_SAMPLERATE 32000UL
/** Number of channels in audio stream. */
#define AUDDevice_NUMCHANNELS 1
/** Number of bytes in one sample. */
#define AUDDevice_BYTESPERSAMPLE 2
#else
/** Sample rate in Hz. */
#define AUDDevice_SAMPLERATE 48000UL
/** Number of channels in audio stream. */
#define AUDDevice_NUMCHANNELS 2
/** Number of bytes in one sample. */
#define AUDDevice_BYTESPERSAMPLE 2
#endif
/** Number of bits in one sample. */
#define AUDDevice_BITSPERSAMPLE (AUDDevice_BYTESPERSAMPLE * 8)
/** Number of bytes in one USB subframe. */
#define AUDDevice_BYTESPERSUBFRAME (AUDDevice_NUMCHANNELS * \
AUDDevice_BYTESPERSAMPLE)
/** Number of samples in one USB frame. */
#define AUDDevice_SAMPLESPERFRAME (AUDDevice_SAMPLERATE / 1000 \
* AUDDevice_NUMCHANNELS)
/** Number of bytes in one USB frame. */
#define AUDDevice_BYTESPERFRAME (AUDDevice_SAMPLESPERFRAME * \
AUDDevice_BYTESPERSAMPLE)
/** @}*/
/*----------------------------------------------------------------------------
* USB Device - Audio - Desktop Speaker
*----------------------------------------------------------------------------*/
/** \addtogroup usbd_audio_speaker_config USB Speaker Configure
* @{
* This page lists the definitions for USB Audio Speaker Device Driver.
* - \ref AUDDSpeakerDriverDescriptors_DATAOUT
* - \ref AUDDSpeakerDriverDescriptors_FS_INTERVAL
* - \ref AUDDSpeakerDriverDescriptors_HS_INTERVAL
*
* \note for UDP, uses IN EPs that support double buffer; for UDPHS, uses
* IN EPs that support DMA and High bandwidth.
*/
/** Data out endpoint number. */
#define AUDDSpeakerDriverDescriptors_DATAOUT 0x04
/** Endpoint polling interval 2^(x-1) * 125us */
#define AUDDSpeakerDriverDescriptors_HS_INTERVAL 0x04
/** Endpoint polling interval 2^(x-1) * ms */
#define AUDDSpeakerDriverDescriptors_FS_INTERVAL 0x01
/** @}*/
/*----------------------------------------------------------------------------
* USB Device - Audio - Speaker Phone
*----------------------------------------------------------------------------*/
/** \addtogroup usbd_audio_speakerphone_config USB Speaker Phone Configure
* @{
* This page lists the definitions for USB Audio Speaker Phone Device Driver.
* - \ref AUDDSpeakerPhoneDriverDescriptors_DATAOUT
* - \ref AUDDSpeakerPhoneDriverDescriptors_DATAIN
* - \ref AUDDSpeakerPhoneDriverDescriptors_HS_INTERVAL
* - \ref AUDDSpeakerPhoneDriverDescriptors_FS_INTERVAL
*/
#if defined(at91sam7s) || defined(at91sam9xe)
/** Data out endpoint number, size 64B */
#define AUDDSpeakerPhoneDriverDescriptors_DATAOUT 0x01
/** Data in endpoint number, size 64B */
#define AUDDSpeakerPhoneDriverDescriptors_DATAIN 0x02
#elif defined(CHIP_USB_UDP)
/** Data out endpoint number, size 192B */
#define AUDDSpeakerPhoneDriverDescriptors_DATAOUT 0x04
/** Data in endpoint number, size 192B */
#define AUDDSpeakerPhoneDriverDescriptors_DATAIN 0x05
#elif defined(at91sam9m10ek)
/** Data out endpoint number, size 192B */
#define AUDDSpeakerPhoneDriverDescriptors_DATAOUT 0x01
/** Data in endpoint number, size 192B */
#define AUDDSpeakerPhoneDriverDescriptors_DATAIN 0x06
#else
/** Data out endpoint number, size 192B */
#define AUDDSpeakerPhoneDriverDescriptors_DATAOUT 0x05
/** Data in endpoint number, size 192B */
#define AUDDSpeakerPhoneDriverDescriptors_DATAIN 0x06
#endif
/** Endpoint polling interval 2^(x-1) * 125us */
#define AUDDSpeakerPhoneDriverDescriptors_HS_INTERVAL 0x04
/** Endpoint polling interval 2^(x-1) * ms */
#define AUDDSpeakerPhoneDriverDescriptors_FS_INTERVAL 0x01
/** @}*/
/*----------------------------------------------------------------------------
* USB Device - HID - Keyboard
*----------------------------------------------------------------------------*/
/** \addtogroup usbd_hid_keyboard_config USB HID Keyboard Device Configure
* @{
* This page lists the defines used by the HID Keyboard Device Driver.
*
* \section hidd_k_ep_addr Endpoint Addresses
* - \ref HIDDKeyboardDriverDescriptors_INTERRUPTIN
* - \ref HIDDKeyboardDriverDescriptors_INTERRUPTOUT
* \section hidd_k_ep_polling Endpoint Polling Rate
* - \ref HIDDKeyboardDriverDescriptors_INTERRUPTIN_POLLING
* - \ref HIDDKeyboardDriverDescriptors_INTERRUPTOUT_POLLING
*/
/** Interrupt IN endpoint number */
#define HIDDKeyboardDriverDescriptors_INTERRUPTIN 1
/** Interrupt IN endpoint polling rate (in milliseconds) */
#define HIDDKeyboardDriverDescriptors_INTERRUPTIN_POLLING 10
/** Interrupt OUT endpoint number */
#define HIDDKeyboardDriverDescriptors_INTERRUPTOUT 2
/** Interrupt OUT endpoint polling rate (in milliseconds) */
#define HIDDKeyboardDriverDescriptors_INTERRUPTOUT_POLLING 10
/** @}*/
/*----------------------------------------------------------------------------
* USB Device - HID - Mouse
*----------------------------------------------------------------------------*/
/** \addtogroup usbd_hid_mouse_config USB HID Mouse Device Configure
* @{
* This page lists the defines used by the HID Mouse Device Driver.
*
* \section hidd_m_ep_addr Endpoint Addresses
* - \ref HIDDMouseDriverDescriptors_INTERRUPTIN
* \section hidd_m_ep_polling Endpoint Polling Rate
* - \ref HIDDMouseDriverDescriptors_INTERRUPTIN_POLLING
*/
/** Interrupt IN endpoint number */
#define HIDDMouseDriverDescriptors_INTERRUPTIN 1
/** Interrupt IN endpoint polling rate (in milliseconds) */
#define HIDDMouseDriverDescriptors_INTERRUPTIN_POLLING 10
/** @}*/
/*----------------------------------------------------------------------------
* USB Device - HID - Transfer (Customize device)
*----------------------------------------------------------------------------*/
/** \addtogroup usbd_hid_xfr_config USB HID Transfer Device Configure
* @{
* This page lists the defines used by the HID Transfer Device Driver.
*
* \section hidd_t_ep_addr Endpoint Addresses
* - \ref HIDDTransferDriverDescriptors_INTERRUPTIN
* - \ref HIDDTransferDriverDescriptors_INTERRUPTOUT
* \section hidd_t_ep_polling Endpoint Polling Rate
* - \ref HIDDTransferDriverDescriptors_INTERRUPTIN_POLLING
* - \ref HIDDTransferDriverDescriptors_INTERRUPTOUT_POLLING
*/
/** Interrupt IN endpoint number. */
#define HIDDTransferDriverDescriptors_INTERRUPTIN 1
/** Polling rate in ms */
#define HIDDTransferDriverDescriptors_INTERRUPTIN_POLLING 50
/** Interrupt IN endpoint polling rate (in milliseconds). */
#define HIDDTransferDriverDescriptors_INTERRUPTOUT 2
/** Polling rate in ms */
#define HIDDTransferDriverDescriptors_INTERRUPTOUT_POLLING 50
/** @}*/
/*----------------------------------------------------------------------------
* USB Device - Composite
*----------------------------------------------------------------------------*/
/** \addtogroup usbd_composite_config USB Composite Device Configure
* @{
*/
/** @}*/
/**@}*/
#endif //#ifndef USBD_CONFIG_H

73
firmware/atmel_softpack_libraries/libchip_sam3s/include/USBD_LEDs.h Normal file
View File

@@ -0,0 +1,73 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Collection of LEDs for using the USB device controller on AT91
* microcontrollers.
*/
#ifndef USBDLEDS_H
#define USBDLEDS_H
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "board.h"
/** \addtogroup usbd_hal
*@{
*/
/*----------------------------------------------------------------------------
* Constants
*----------------------------------------------------------------------------*/
/** \addtogroup usbd_leds USB Device LEDs
* @{
* This page lists the LEDs used in the USB %device driver.
*
* - USBD_LEDPOWER
* - USBD_LEDUSB
* - USBD_LEDOTHER
*/
/** LED for indicating that the device is powered. */
#define USBD_LEDPOWER 0
/** LED for indicating USB activity. */
#define USBD_LEDUSB 1
/** LED for custom usage. */
#define USBD_LEDOTHER 2
/** @}*/
/**@}*/
#endif //#ifndef USBDLEDS_H

151
firmware/atmel_softpack_libraries/libchip_sam3s/include/acc.h Normal file
View File

@@ -0,0 +1,151 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \section Purpose
*
* Interface for configuration the Analog-to-Digital Converter (ACC) peripheral.
*
* \section Usage
*
* -# Configurate the pins for ACC
* -# Initialize the ACC with ACC_Initialize().
* -# Select the active channel using ACC_EnableChannel()
* -# Start the conversion with ACC_StartConversion()
* -# Wait the end of the conversion by polling status with ACC_GetStatus()
* -# Finally, get the converted data using ACC_GetConvertedData()
*
*/
#ifndef _ACC_
#define _ACC_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <stdint.h>
#include <assert.h>
/*------------------------------------------------------------------------------
* Definitions
*------------------------------------------------------------------------------*/
#define ACC_SELPLUS_AD12B0 0
#define ACC_SELPLUS_AD12B1 1
#define ACC_SELPLUS_AD12B2 2
#define ACC_SELPLUS_AD12B3 3
#define ACC_SELPLUS_AD12B4 4
#define ACC_SELPLUS_AD12B5 5
#define ACC_SELPLUS_AD12B6 6
#define ACC_SELPLUS_AD12B7 7
#define ACC_SELMINUS_TS 0
#define ACC_SELMINUS_ADVREF 1
#define ACC_SELMINUS_DAC0 2
#define ACC_SELMINUS_DAC1 3
#define ACC_SELMINUS_AD12B0 4
#define ACC_SELMINUS_AD12B1 5
#define ACC_SELMINUS_AD12B2 6
#define ACC_SELMINUS_AD12B3 7
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------------------------------------------
* Macros function of register access
*------------------------------------------------------------------------------*/
#define ACC_CfgModeReg(pAcc, mode) { \
(pAcc)->ACC_MR = (mode);\
}
#define ACC_GetModeReg( pAcc ) ((pAcc)->ACC_MR)
#define ACC_StartConversion( pAcc ) ((pAcc)->ACC_CR = ACC_CR_START)
#define ACC_SoftReset( pAcc ) ((pAcc)->ACC_CR = ACC_CR_SWRST)
#define ACC_EnableChannel( pAcc, dwChannel ) {\
assert( dwChannel < 16 ) ;\
(pAcc)->ACC_CHER = (1 << (dwChannel));\
}
#define ACC_DisableChannel( pAcc, dwChannel ) {\
assert( dwChannel < 16 ) ;\
(pAcc)->ACC_CHDR = (1 << (dwChannel));\
}
#define ACC_EnableIt( pAcc, dwMode ) {\
assert( ((dwMode)&0xFFF00000)== 0 ) ;\
(pAcc)->ACC_IER = (dwMode);\
}
#define ACC_DisableIt( pAcc, dwMode ) {\
assert( ((dwMode)&0xFFF00000)== 0 ) ;\
(pAcc)->ACC_IDR = (dwMode);\
}
#define ACC_EnableDataReadyIt( pAcc ) ((pAcc)->ACC_IER = AT91C_ACC_DRDY)
#define ACC_GetStatus( pAcc ) ((pAcc)->ACC_ISR)
#define ACC_GetChannelStatus( pAcc ) ((pAcc)->ACC_CHSR)
#define ACC_GetInterruptMaskStatus( pAcc ) ((pAcc)->ACC_IMR)
#define ACC_GetLastConvertedData( pAcc ) ((pAcc)->ACC_LCDR)
#define ACC_CfgAnalogCtrlReg( pAcc, dwMode ) {\
assert( ((dwMode) & 0xFFFCFF3C) == 0 ) ;\
(pAcc)->ACC_ACR = (dwMode);\
}
#define ACC_CfgExtModeReg( pAcc, extmode ) {\
assert( ((extmode) & 0xFF00FFFE) == 0 ) ;\
(pAcc)->ACC_EMR = (extmode);\
}
#define ACC_GetAnalogCtrlReg( pAcc ) ((pAcc)->ACC_ACR)
/*------------------------------------------------------------------------------
* Exported functions
*------------------------------------------------------------------------------*/
extern void ACC_Configure( Acc *pAcc, uint8_t idAcc, uint8_t ucSelplus, uint8_t ucSelminus,
uint16_t wAc_en, uint16_t wEdge, uint16_t wInvert ) ;
extern void ACC_SetComparisionPair( Acc *pAcc, uint8_t ucSelplus, uint8_t ucSelminus ) ;
extern uint32_t ACC_GetComparisionResult( Acc* pAcc, uint32_t dwStatus ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _ACC_ */

157
firmware/atmel_softpack_libraries/libchip_sam3s/include/adc.h Normal file
View File

@@ -0,0 +1,157 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \section Purpose
*
* Interface for configuration the Analog-to-Digital Converter (ADC) peripheral.
*
* \section Usage
*
* -# Configurate the pins for ADC
* -# Initialize the ADC with ADC_Initialize().
* -# Select the active channel using ADC_EnableChannel()
* -# Start the conversion with ADC_StartConversion()
* -# Wait the end of the conversion by polling status with ADC_GetStatus()
* -# Finally, get the converted data using ADC_GetConvertedData()
*
*/
#ifndef _ADC_
#define _ADC_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <assert.h>
#include <stdint.h>
/*------------------------------------------------------------------------------
* Definitions
*------------------------------------------------------------------------------*/
/* SAM3S */
#define ADC_FREQ_MAX 20000000
#define ADC_FREQ_MIN 1000000
#define ADC_STARTUP_NORM 40
#define ADC_STARTUP_FAST 12
#define ADC_CHANNEL_0 0
#define ADC_CHANNEL_1 1
#define ADC_CHANNEL_2 2
#define ADC_CHANNEL_3 3
#define ADC_CHANNEL_4 4
#define ADC_CHANNEL_5 5
#define ADC_CHANNEL_6 6
#define ADC_CHANNEL_7 7
#define ADC_CHANNEL_8 8
#define ADC_CHANNEL_9 9
#define ADC_CHANNEL_10 10
#define ADC_CHANNEL_11 11
#define ADC_CHANNEL_12 12
#define ADC_CHANNEL_13 13
#define ADC_CHANNEL_14 14
#define ADC_CHANNEL_15 15
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------------------------------------------
* Macros function of register access
*------------------------------------------------------------------------------*/
#define ADC_GetModeReg( pAdc ) ((pAdc)->ADC_MR)
#define ADC_StartConversion( pAdc ) ((pAdc)->ADC_CR = ADC_CR_START)
#define ADC_EnableChannel( pAdc, channel ) {\
assert( channel < 16 ) ;\
(pAdc)->ADC_CHER = (1 << (channel));\
}
#define ADC_DisableChannel(pAdc, channel) {\
assert( (channel) < 16 ) ;\
(pAdc)->ADC_CHDR = (1 << (channel));\
}
#define ADC_EnableIt(pAdc, dwMode) {\
(pAdc)->ADC_IER = (dwMode);\
}
#define ADC_DisableIt(pAdc, dwMode) {\
(pAdc)->ADC_IDR = (dwMode);\
}
#define ADC_EnableTS(pAdc,dwMode) {\
(pAdc)->ADC_ACR |= dwMode;\
}
#define ADC_EnableDataReadyIt(pAdc) ((pAdc)->ADC_IER = AT91C_ADC_DRDY)
#define ADC_GetStatus(pAdc) ((pAdc)->ADC_ISR)
#define ADC_GetCompareMode(pAdc) (((pAdc)->ADC_EMR)& (ADC_EMR_CMPMODE_Msk))
#define ADC_GetChannelStatus(pAdc) ((pAdc)->ADC_CHSR)
#define ADC_GetInterruptMaskStatus(pAdc) ((pAdc)->ADC_IMR)
#define ADC_GetLastConvertedData(pAdc) ((pAdc)->ADC_LCDR)
/*------------------------------------------------------------------------------
* Exported functions
*------------------------------------------------------------------------------*/
extern void ADC_Initialize( Adc* pAdc, uint32_t idAdc );
extern void ADC_CfgTiming( Adc* pAdc, uint32_t tracking, uint32_t settling, uint32_t transfer );
extern void ADC_cfgFrequency( Adc* pAdc, uint32_t startup, uint32_t prescal );
extern void ADC_CfgTrigering( Adc* pAdc, uint32_t trgEn, uint32_t trgSel, uint32_t freeRun );
extern void ADC_CfgLowRes( Adc* pAdc, uint32_t resolution );
extern void ADC_CfgPowerSave( Adc* pAdc, uint32_t sleep, uint32_t fwup );
extern void ADC_CfgChannelMode( Adc* pAdc, uint32_t useq, uint32_t anach );
extern void ADC_check( Adc* pAdc, uint32_t mck_freq );
extern uint32_t ADC_GetConvertedData( Adc* pAdc, uint32_t dwChannel ) ;
extern void ADC_SetCompareChannel( Adc* pAdc, uint32_t dwChannel ) ;
extern void ADC_SetCompareMode( Adc* pAdc, uint32_t dwMode ) ;
extern void ADC_SetComparisonWindow( Adc* pAdc, uint32_t dwHi_Lo ) ;
extern uint32_t ADC_IsInterruptMasked( Adc* pAdc, uint32_t dwFlag ) ;
extern uint32_t ADC_IsStatusSet( Adc* pAdc, uint32_t dwFlag ) ;
extern uint32_t ADC_IsChannelInterruptStatusSet( uint32_t adc_sr, uint32_t dwChannel ) ;
extern uint32_t ADC_ReadBuffer( Adc* pADC, int16_t *pwBuffer, uint32_t dwSize ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _ADC_ */

80
firmware/atmel_softpack_libraries/libchip_sam3s/include/async.h Normal file
View File

@@ -0,0 +1,80 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Provide a routine for asynchronous transfer.
*
*/
#ifndef _ASYNC_
#define _ASYNC_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include <stdint.h>
/*----------------------------------------------------------------------------
* Definition
*----------------------------------------------------------------------------*/
/** Transfer is still pending.*/
#define ASYNC_STATUS_PENDING 0xFF
#ifdef __cplusplus
extern "C" {
#endif
/*----------------------------------------------------------------------------
* Type
*----------------------------------------------------------------------------*/
/** \brief Asynchronous transfer descriptor. */
typedef struct _Async
{
/** Asynchronous transfer status.*/
volatile uint8_t status ;
/** Callback function to invoke when transfer completes or fails.*/
void *callback ;
/** Driver storage area; do not use.*/
uint32_t pStorage[4] ;
} Async ;
/*----------------------------------------------------------------------------
* Global functions
*----------------------------------------------------------------------------*/
extern uint32_t ASYNC_IsFinished( Async* pAsync ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _ASYNC_ */

65
firmware/atmel_softpack_libraries/libchip_sam3s/include/crccu.h Normal file
View File

@@ -0,0 +1,65 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Interface for Cyclic Redundancy Check Calculation Unit (CRCCU).
*/
#ifndef _CRCCU_
#define _CRCCU_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <stdint.h>
/*----------------------------------------------------------------------------
* Types
*----------------------------------------------------------------------------*/
typedef struct
{
uint32_t TR_ADDR ;
uint32_t TR_CTRL ;
} CrcDscr ;
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void CRCCU_ResetCrcValue( Crccu* pCrccu ) ;
extern void CRCCU_Configure( Crccu* pCrccu, uint32_t dwDscrAddr, uint32_t dwMode ) ;
extern uint32_t CRCCU_ComputeCrc( Crccu* pCrccu ) ;
#endif /* #ifndef _CRCCU_ */

146
firmware/atmel_softpack_libraries/libchip_sam3s/include/dacc.h Normal file
View File

@@ -0,0 +1,146 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \section Purpose
*
* Interface for configuration the Analog-to-Digital Converter (DACC) peripheral.
*
* \section Usage
*
* -# Configurate the pins for DACC
* -# Initialize the DACC with DACC_Initialize().
* -# Select the active channel using DACC_EnableChannel()
* -# Start the conversion with DACC_StartConversion()
* -# Wait the end of the conversion by polling status with DACC_GetStatus()
* -# Finally, get the converted data using DACC_GetConvertedData()
*
*/
#ifndef _DACC_
#define _DACC_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <stdint.h>
#include <assert.h>
/*------------------------------------------------------------------------------
* Definitions
*------------------------------------------------------------------------------*/
#define DACC_CHANNEL_0 0
#define DACC_CHANNEL_1 1
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------------------------------------------
* Macros function of register access
*------------------------------------------------------------------------------*/
#define DACC_CfgModeReg(pDACC, mode) { \
(pDACC)->DACC_MR = (mode);\
}
#define DACC_GetModeReg(pDACC) ((pDACC)->DACC_MR)
#define DACC_StartConversion(pDACC) ((pDACC)->DACC_CR = DACC_CR_START)
#define DACC_SoftReset(pDACC) ((pDACC)->DACC_CR = DACC_CR_SWRST)
#define DACC_EnableChannel(pDACC, channel) {\
(pDACC)->DACC_CHER = (1 << (channel));\
}
#define DACC_DisableChannel(pDACC, channel) {\
(pDACC)->DACC_CHDR = (1 << (channel));\
}
#define DACC_EnableIt(pDACC, mode) {\
assert( ((mode)&0xFFF00000)== 0 ) ;\
(pDACC)->DACC_IER = (mode);\
}
#define DACC_DisableIt(pDACC, mode) {\
assert( ((mode)&0xFFF00000)== 0 ) ;\
(pDACC)->DACC_IDR = (mode);\
}
#define DACC_EnableDataReadyIt(pDACC) ((pDACC)->DACC_IER = AT91C_DACC_DRDY)
#define DACC_GetStatus(pDACC) ((pDACC)->DACC_ISR)
#define DACC_GetChannelStatus(pDACC) ((pDACC)->DACC_CHSR)
#define DACC_GetInterruptMaskStatus(pDACC) ((pDACC)->DACC_IMR)
#define DACC_GetLastConvertedData(pDACC) ((pDACC)->DACC_LCDR)
#define DACC_CfgAnalogCtrlReg(pDACC,mode) {\
assert( ((mode) & 0xFFFCFF3C)==0 ) ;\
(pDACC)->DACC_ACR = (mode);\
}
#define DACC_CfgExtModeReg(pDACC, extmode) {\
assert( ((extmode) & 0xFF00FFFE)==0 ) ;\
(pDACC)->DACC_EMR = (extmode);\
}
#define DACC_GetAnalogCtrlReg(pDACC) ((pDACC)->DACC_ACR)
/*------------------------------------------------------------------------------
* Exported functions
*------------------------------------------------------------------------------*/
extern void DACC_Initialize( Dacc* pDACC,
uint8_t idDACC,
uint8_t trgEn,
uint8_t trgSel,
uint8_t word,
uint8_t sleepMode,
uint32_t mck,
uint8_t refresh,/*refresh period*/
uint8_t user_sel,/*user channel selection*/
uint32_t tag_mode,/*using tag for channel number*/
uint32_t startup
);
extern void DACC_SetConversionData( Dacc* pDACC, uint32_t dwData ) ;
extern uint32_t DACC_WriteBuffer( Dacc* pDACC, uint16_t* pwBuffer, uint32_t dwSize ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _DACC_ */

113
firmware/atmel_softpack_libraries/libchip_sam3s/include/efc.h Normal file
View File

@@ -0,0 +1,113 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \section Purpose
*
* Interface for configuration the Enhanced Embedded Flash Controller (EEFC) peripheral.
*
* \section Usage
*
* -# Enable/disable %flash ready interrupt sources using EFC_EnableFrdyIt()
* and EFC_DisableFrdyIt().
* -# Translates the given address into which EEFC, page and offset values
* for difference density %flash memory using EFC_TranslateAddress().
* -# Computes the address of a %flash access given the EFC, page and offset
* for difference density %flash memory using EFC_ComputeAddress().
* -# Start the executing command with EFC_StartCommand()
* -# Retrieve the current status of the EFC using EFC_GetStatus().
* -# Retrieve the result of the last executed command with EFC_GetResult().
*/
#ifndef _EEFC_
#define _EEFC_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <stdint.h>
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
/* EFC command */
#define EFC_FCMD_GETD 0x00
#define EFC_FCMD_WP 0x01
#define EFC_FCMD_WPL 0x02
#define EFC_FCMD_EWP 0x03
#define EFC_FCMD_EWPL 0x04
#define EFC_FCMD_EA 0x05
#define EFC_FCMD_SLB 0x08
#define EFC_FCMD_CLB 0x09
#define EFC_FCMD_GLB 0x0A
#define EFC_FCMD_SFB 0x0B
#define EFC_FCMD_CFB 0x0C
#define EFC_FCMD_GFB 0x0D
#define EFC_FCMD_STUI 0x0E /* Start unique ID */
#define EFC_FCMD_SPUI 0x0F /* Stop unique ID */
/* The IAP function entry addreass */
#define CHIP_FLASH_IAP_ADDRESS (0x00800008)
#ifdef __cplusplus
extern "C" {
#endif
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void EFC_EnableFrdyIt( Efc* efc ) ;
extern void EFC_DisableFrdyIt( Efc* efc ) ;
extern void EFC_SetWaitState( Efc* efc, uint8_t cycles ) ;
extern void EFC_TranslateAddress( Efc** pEfc, uint32_t dwAddress, uint16_t *pwPage, uint16_t *pwOffset ) ;
extern void EFC_ComputeAddress( Efc* efc, uint16_t wPage, uint16_t wOffset, uint32_t *pdwAddress ) ;
extern void EFC_StartCommand( Efc* efc, uint32_t dwCommand, uint32_t dwArgument ) ;
extern uint32_t EFC_PerformCommand( Efc* efc, uint32_t dwCommand, uint32_t dwArgument, uint32_t dwUseIAP ) ;
extern uint32_t EFC_GetStatus( Efc* efc ) ;
extern uint32_t EFC_GetResult( Efc* efc ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _EEFC_ */

97
firmware/atmel_softpack_libraries/libchip_sam3s/include/exceptions.h Normal file
View File

@@ -0,0 +1,97 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
* Interface for default exception handlers.
*/
#ifndef _EXCEPTIONS_
#define _EXCEPTIONS_
/*----------------------------------------------------------------------------
* Types
*----------------------------------------------------------------------------*/
/* Function prototype for exception table items (interrupt handler). */
typedef void( *IntFunc )( void ) ;
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/* Default empty handler */
extern void IrqHandlerNotUsed( void ) ;
/* Cortex-M3 core handlers */
extern void NMI_Handler( void );
extern void HardFault_Handler( void );
extern void MemManage_Handler( void );
extern void BusFault_Handler( void );
extern void UsageFault_Handler( void );
extern void SVC_Handler( void );
extern void DebugMon_Handler( void );
extern void PendSV_Handler( void );
extern void SysTick_Handler( void );
/* Peripherals handlers */
extern void ACC_IrqHandler( void ) ;
extern void ADC_IrqHandler( void ) ;
extern void CRCCU_IrqHandler( void ) ;
extern void DAC_IrqHandler( void ) ;
extern void EEFC_IrqHandler( void ) ;
extern void MCI_IrqHandler( void ) ;
extern void PIOA_IrqHandler( void ) ;
extern void PIOB_IrqHandler( void ) ;
extern void PIOC_IrqHandler( void ) ;
extern void PMC_IrqHandler( void ) ;
extern void PWM_IrqHandler( void ) ;
extern void RSTC_IrqHandler( void ) ;
extern void RTC_IrqHandler( void ) ;
extern void RTT_IrqHandler( void ) ;
extern void SMC_IrqHandler( void ) ;
extern void SPI_IrqHandler( void ) ;
extern void SSC_IrqHandler( void ) ;
extern void SUPC_IrqHandler( void ) ;
extern void TC0_IrqHandler( void ) ;
extern void TC1_IrqHandler( void ) ;
extern void TC2_IrqHandler( void ) ;
extern void TC3_IrqHandler( void ) ;
extern void TC4_IrqHandler( void ) ;
extern void TC5_IrqHandler( void ) ;
extern void TWI0_IrqHandler( void ) ;
extern void TWI1_IrqHandler( void ) ;
extern void UART0_IrqHandler( void ) ;
extern void UART1_IrqHandler( void ) ;
extern void USART0_IrqHandler( void ) ;
extern void USART1_IrqHandler( void ) ;
extern void USBD_IrqHandler(void);
extern void WDT_IrqHandler( void ) ;
#endif /* _EXCEPTIONS_ */

79
firmware/atmel_softpack_libraries/libchip_sam3s/include/flashd.h Normal file
View File

@@ -0,0 +1,79 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* The flash driver provides the unified interface for flash program operations.
*
*/
#ifndef _FLASHD_
#define _FLASHD_
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void FLASHD_Initialize( uint32_t dwMCk, uint32_t dwUseIAP ) ;
extern uint32_t FLASHD_Erase( uint32_t dwAddress ) ;
extern uint32_t FLASHD_Write( uint32_t dwAddress, const void *pvBuffer, uint32_t dwSize ) ;
extern uint32_t FLASHD_Lock( uint32_t dwStart, uint32_t dwEnd, uint32_t *pdwActualStart, uint32_t *pdwActualEnd ) ;
extern uint32_t FLASHD_Unlock( uint32_t dwStart, uint32_t dwEnd, uint32_t *pdwActualStart, uint32_t *pdwActualEnd ) ;
extern uint32_t FLASHD_IsLocked( uint32_t dwStart, uint32_t dwEnd ) ;
extern uint32_t FLASHD_SetGPNVM( uint8_t gpnvm ) ;
extern uint32_t FLASHD_ClearGPNVM( uint8_t gpnvm ) ;
extern uint32_t FLASHD_IsGPNVMSet( uint8_t gpnvm ) ;
#define FLASHD_IsSecurityBitSet() FLASHD_IsGPNVMSet( 0 )
#define FLASHD_SetSecurityBit() FLASHD_SetGPNVM( 0 )
extern uint32_t FLASHD_ReadUniqueID( uint32_t* pdwUniqueID ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _FLASHD_ */

206
firmware/atmel_softpack_libraries/libchip_sam3s/include/hsmci.h Normal file
View File

@@ -0,0 +1,206 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/** \addtogroup hsmci_module Working with HSMCI
* The HSMCI driver provides the interface to configure and use the HSMCI
* peripheral.
*
* The user needs to set the number of wait states depending on the frequency used.\n
* Configure number of cycles for flash read/write operations in the FWS field of HSMCI_FMR.
*
* It offers a function to send flash command to HSMCI and waits for the
* flash to be ready.
*
* To send flash command, the user could do in either of following way:
* <ul>
* <li>Write a correct key, command and argument in HSMCI_FCR. </li>
* <li>Or, Use IAP (In Application Programming) function which is executed from
* ROM directly, this allows flash programming to be done by code running in flash.</li>
* <li>Once the command is achieved, it can be detected even by polling EEFC_FSR or interrupt.
* </ul>
*
* The command argument could be a page number,GPNVM number or nothing, it depends on
* the command itself. Some useful functions in this driver could help user tranlate physical
* flash address into a page number and vice verse.
*
* For more accurate information, please look at the EEFC section of the
* Datasheet.
*
* Related files :\n
* \ref hsmci_pdc.c\n
* \ref hsmci.h.\n
*/
/*@{*/
/*@}*/
/**
* \file
*/
/**
*
* \section Purpose
*
* Implement MultiMediaCard(MCI) Interface Driver
*
* \section Usage
*
* -# MCI_Init(): Initializes a MCI driver instance and the underlying
* peripheral.
* -# MCI_Handler() : Interrupt handler which is called by ISR handler.
* -# MCI_SetSpeed() : Configure the MCI CLKDIV in the _MR register
* (\ref Hsmci::HSMCI_MR).
* -# MCI_SetBusWidth() : Configure the MCI SDCBUS in the _SDCR register
* (\ref Hsmci::HSMCI_SDCR).
* -# MCI_EnableHsMode() : Configure the MCI HSMODE in the _CFG register
* (\ref Hsmci::HSMCI_CFG).
*/
#ifndef HSMCID_H
#define HSMCID_H
/** \addtogroup sdmmc_hal
*@{
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <stdint.h>
#include <stdio.h>
//#include <memories/sdmmc/sdmmc_cmd.h>
/*----------------------------------------------------------------------------
* Constants
*----------------------------------------------------------------------------*/
/* Transfer type */
/** MultiMedia Transfer type: no data */
#define MCI_NO_TRANSFER 0
/** MultiMedia Transfer type: Device to Host (read) */
#define MCI_START_READ 1
/** MultiMedia Transfer type: Host to Device (write) & check BUSY */
#define MCI_START_WRITE 2
/** Device to Host (read) without command */
#define MCI_READ 3
/** Host to Device (write) without command & check BUSY */
#define MCI_WRITE 4
/** MultiMedia Transfer type: STOP transfer */
#define MCI_STOP_TRANSFER 5
/** MCI Initialize clock 400K Hz */
#define MCI_INITIAL_SPEED 400000
/*----------------------------------------------------------------------------
* Types
*----------------------------------------------------------------------------*/
#ifdef __cplusplus
extern "C" {
#endif
/**
* \brief MCI Transfer Request prepared by the application upper layer.
*
* This structure is sent to the Sdmmc_SendCommand function to start the transfer.
* At the end of the transfer, the callback is invoked.
*/
typedef struct _MciCmd {
/** Command code. */
uint32_t cmd;
/** Command argument. */
uint32_t arg;
/** Data buffer, with MCI_DMA_ENABLE defined 1, the buffer can be
* 1, 2 or 4 bytes aligned. It has to be 4 byte aligned if no DMA.
*/
uint8_t *pData;
/** Size of data block in bytes. */
uint16_t blockSize;
/** Number of blocks to be transfered */
uint16_t nbBlock;
/** Response buffer. */
uint32_t *pResp;
/** Optional user-provided callback function. */
void (*callback)( uint8_t status, void *pArg ) ;
/** Optional argument to the callback function. */
void *pArg;
/** SD card command option. */
uint8_t resType:7, /** Response */
busyCheck:1; /** Check busy as end of command */
/** Indicate transfer type */
uint8_t tranType;
/** Indicate end of transfer status */
uint8_t status;
/** Command state. */
volatile uint8_t state;
} MciCmd;
/**
* \brief MCI Driver
*/
typedef struct
{
/** Pointer to a MCI peripheral. */
Hsmci *pMciHw;
/** Pointer to currently executing command. */
MciCmd *pCommand;
/** MCI peripheral identifier. */
uint8_t mciId;
/** Mutex. */
volatile uint8_t semaphore;
} Mcid;
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void MCI_Disable(Hsmci *pMciHw);
extern void MCI_Enable(Hsmci *pMciHw);
extern uint8_t MCI_EnableHsMode(Mcid * pMci, uint8_t hsEnable);
extern void MCI_Init( Mcid *pMci, Hsmci *pMciHw, uint8_t mciId, uint32_t dwMCk ) ;
extern uint32_t MCI_SetBusWidth(Mcid *pMci, uint32_t busWidth);
extern uint32_t MCI_SetSpeed(Mcid *pMci, uint32_t mciSpeed, uint32_t mck);
/* pdc if used */
extern void MCI_Reset(Mcid *pMci, uint8_t keepSettings);
#ifdef __cplusplus
}
#endif
/**@}*/
#endif //#ifndef HSMCID_H

206
firmware/atmel_softpack_libraries/libchip_sam3s/include/pio.h Normal file
View File

@@ -0,0 +1,206 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2010, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \section Purpose
*
* This file provides a basic API for PIO configuration and usage of
* user-controlled pins. Please refer to the board.h file for a list of
* available pin definitions.
*
* \section Usage
*
* -# Define a constant pin description array such as the following one, using
* the existing definitions provided by the board.h file if possible:
* \code
* const Pin pPins[] = {PIN_USART0_TXD, PIN_USART0_RXD};
* \endcode
* Alternatively, it is possible to add new pins by provided the full Pin
* structure:
* \code
* // Pin instance to configure PA10 & PA11 as inputs with the internal
* // pull-up enabled.
* const Pin pPins = {
* (1 << 10) | (1 << 11),
* REG_PIOA,
* ID_PIOA,
* PIO_INPUT,
* PIO_PULLUP
* };
* \endcode
* -# Configure a pin array by calling PIO_Configure() with a pointer to the
* array and its size (which is computed using the PIO_LISTSIZE macro).
* -# Change and get the value of a user-controlled pin using the PIO_Set,
* PIO_Clear and PIO_Get methods.
* -# Get the level being currently output by a user-controlled pin configured
* as an output using PIO_GetOutputDataStatus().
*/
#ifndef _PIO_
#define _PIO_
/*
* Headers
*/
#include "chip.h"
#include <stdint.h>
/*
* Global Definitions
*/
/* The pin is controlled by the associated signal of peripheral A. */
#define PIO_PERIPH_A 0
/* The pin is controlled by the associated signal of peripheral B. */
#define PIO_PERIPH_B 1
/* The pin is controlled by the associated signal of peripheral C. */
#define PIO_PERIPH_C 2
/* The pin is controlled by the associated signal of peripheral D. */
#define PIO_PERIPH_D 3
/* The pin is an input. */
#define PIO_INPUT 4
/* The pin is an output and has a default level of 0. */
#define PIO_OUTPUT_0 5
/* The pin is an output and has a default level of 1. */
#define PIO_OUTPUT_1 6
/* Default pin configuration (no attribute). */
#define PIO_DEFAULT (0 << 0)
/* The internal pin pull-up is active. */
#define PIO_PULLUP (1 << 0)
/* The internal glitch filter is active. */
#define PIO_DEGLITCH (1 << 1)
/* The pin is open-drain. */
#define PIO_OPENDRAIN (1 << 2)
/* The internal debouncing filter is active. */
#define PIO_DEBOUNCE (1 << 3)
/* Enable additional interrupt modes. */
#define PIO_IT_AIME (1 << 4)
/* Interrupt High Level/Rising Edge detection is active. */
#define PIO_IT_RE_OR_HL (1 << 5)
/* Interrupt Edge detection is active. */
#define PIO_IT_EDGE (1 << 6)
/* Low level interrupt is active */
#define PIO_IT_LOW_LEVEL (0 | 0 | PIO_IT_AIME)
/* High level interrupt is active */
#define PIO_IT_HIGH_LEVEL (PIO_IT_RE_OR_HL | 0 | PIO_IT_AIME)
/* Falling edge interrupt is active */
#define PIO_IT_FALL_EDGE (0 | PIO_IT_EDGE | PIO_IT_AIME)
/* Rising edge interrupt is active */
#define PIO_IT_RISE_EDGE (PIO_IT_RE_OR_HL | PIO_IT_EDGE | PIO_IT_AIME)
#ifdef __cplusplus
extern "C" {
#endif
/*
* Global Macros
*/
/**
* Calculates the size of an array of Pin instances. The array must be defined
* locally (i.e. not a pointer), otherwise the computation will not be correct.
* \param pPins Local array of Pin instances.
* \return Number of elements in array.
*/
#define PIO_LISTSIZE(pPins) (sizeof(pPins) / sizeof(Pin))
/*
* Global Types
*/
/*
* Describes the type and attribute of one PIO pin or a group of similar pins.
* The #type# field can have the following values:
* - PIO_PERIPH_A
* - PIO_PERIPH_B
* - PIO_OUTPUT_0
* - PIO_OUTPUT_1
* - PIO_INPUT
*
* The #attribute# field is a bitmask that can either be set to PIO_DEFAULt,
* or combine (using bitwise OR '|') any number of the following constants:
* - PIO_PULLUP
* - PIO_DEGLITCH
* - PIO_DEBOUNCE
* - PIO_OPENDRAIN
* - PIO_IT_LOW_LEVEL
* - PIO_IT_HIGH_LEVEL
* - PIO_IT_FALL_EDGE
* - PIO_IT_RISE_EDGE
*/
typedef struct _Pin
{
/* Bitmask indicating which pin(s) to configure. */
uint32_t mask;
/* Pointer to the PIO controller which has the pin(s). */
Pio *pio;
/* Peripheral ID of the PIO controller which has the pin(s). */
uint8_t id;
/* Pin type. */
uint8_t type;
/* Pin attribute. */
uint8_t attribute;
} Pin ;
/*
* Global Access Macros
*/
/*
* Global Functions
*/
extern uint8_t PIO_Configure( const Pin *list, uint32_t size ) ;
extern void PIO_Set( const Pin *pin ) ;
extern void PIO_Clear( const Pin *pin ) ;
extern uint8_t PIO_Get( const Pin *pin ) ;
extern uint8_t PIO_GetOutputDataStatus( const Pin *pin ) ;
extern void PIO_SetDebounceFilter( const Pin *pin, uint32_t cuttoff );
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _PIO_ */

104
firmware/atmel_softpack_libraries/libchip_sam3s/include/pio_capture.h Normal file
View File

@@ -0,0 +1,104 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2010, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \page sam3s_ppc SAM3S PIO Parallel Capture
*
* \section Purpose
*
* Interface for configuration the PIO Parallel Capture peripheral.
*
* \section Usage
*
* -# Configurate the interrupt for PIOA, can be done by PIO_InitializeInterrupts()
* -# Initialize the PIO Parallel Capture API by filing the SpioCaptureInit structur.
* 2 options:
* - alwaysSampling: for sample data with or without take in account ENABLE pins.
* - halfSampling: for sample all data or only one time out of two
* -# Call PIO_CaptureInit() for init and enable the PDC, init the PIO capture.
* -# Call PIO_CaptureEnable() for enable the PIO Parallel Capture.
* -# When an interrupt is received, the PIO_CaptureHandler() is call and the respective
* callback is launch.
* -# When the transfer is complete, the user need to disable interrupt with
* PIO_CaptureDisableIt(). Otherway, the PDC will send an interrupt.
* -# The data receive by the PIO Parallel Capture is inside the buffer passed in the
* PIO_CaptureInit().
*
*/
#ifndef PIO_CAPTURE_H
#define PIO_CAPTURE_H
/*----------------------------------------------------------------------------
* Types
*----------------------------------------------------------------------------*/
/** \brief PIO Parallel Capture structure for initialize.
*
* At the end of the transfer, the callback is invoked by the interrupt handler.
*/
typedef struct _SpioCaptureInit {
/** PIO_PCRHR register is a BYTE, HALF-WORD or WORD */
uint8_t dsize;
/** PDC size, data to be received */
uint16_t dPDCsize;
/** Data to be received */
uint32_t *pData;
/** Parallel Capture Mode Always Sampling */
uint8_t alwaysSampling;
/** Parallel Capture Mode Half Sampling */
uint8_t halfSampling;
/** Parallel Capture Mode First Sample */
uint8_t modeFirstSample;
/** Callback function invoked at Mode Data Ready */
void (*CbkDataReady)( struct _SpioCaptureInit* );
/** Callback function invoked at Mode Overrun Error */
void (*CbkOverrun)( struct _SpioCaptureInit* );
/** Callback function invoked at End of Reception Transfer */
void (*CbkEndReception)( struct _SpioCaptureInit* );
/** Callback function invoked at Reception Buffer Full */
void (*CbkBuffFull)( struct _SpioCaptureInit* );
/** Callback arguments.*/
void *pParam;
} SpioCaptureInit ;
/*----------------------------------------------------------------------------
* Global Functions
*----------------------------------------------------------------------------*/
extern void PIO_CaptureDisableIt( uint32_t itToDisable ) ;
extern void PIO_CaptureEnableIt( uint32_t itToEnable ) ;
extern void PIO_CaptureEnable( void ) ;
extern void PIO_CaptureDisable( void ) ;
extern void PIO_CaptureInit( SpioCaptureInit* pInit ) ;
#endif /* #ifndef PIO_CAPTURE_H */

97
firmware/atmel_softpack_libraries/libchip_sam3s/include/pio_it.h Normal file
View File

@@ -0,0 +1,97 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \par Purpose
*
* Configuration and handling of interrupts on PIO status changes. The API
* provided here have several advantages over the traditional PIO interrupt
* configuration approach:
* - It is highly portable
* - It automatically demultiplexes interrupts when multiples pins have been
* configured on a single PIO controller
* - It allows a group of pins to share the same interrupt
*
* However, it also has several minor drawbacks that may prevent from using it
* in particular applications:
* - It enables the clocks of all PIO controllers
* - PIO controllers all share the same interrupt handler, which does the
* demultiplexing and can be slower than direct configuration
* - It reserves space for a fixed number of interrupts, which can be
* increased by modifying the appropriate constant in pio_it.c.
*
* \par Usage
*
* -# Initialize the PIO interrupt mechanism using PIO_InitializeInterrupts()
* with the desired priority (0 ... 7).
* -# Configure a status change interrupt on one or more pin(s) with
* PIO_ConfigureIt().
* -# Enable & disable interrupts on pins using PIO_EnableIt() and
* PIO_DisableIt().
*/
#ifndef _PIO_IT_
#define _PIO_IT_
/*
* Headers
*/
#include "pio.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
* Global functions
*/
extern void PIO_InitializeInterrupts( uint32_t dwPriority ) ;
extern void PIO_ConfigureIt( const Pin *pPin, void (*handler)( const Pin* ) ) ;
extern void PIO_EnableIt( const Pin *pPin ) ;
extern void PIO_DisableIt( const Pin *pPin ) ;
extern void PIO_IT_InterruptHandler( void ) ;
extern void PioInterruptHandler( uint32_t id, Pio *pPio ) ;
extern void PIO_CaptureHandler( void ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _PIO_IT_ */

59
firmware/atmel_softpack_libraries/libchip_sam3s/include/pmc.h Normal file
View File

@@ -0,0 +1,59 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef _PMC_
#define _PMC_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include <stdint.h>
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
#ifdef __cplusplus
extern "C" {
#endif
extern void PMC_EnablePeripheral( uint32_t dwId ) ;
extern void PMC_DisablePeripheral( uint32_t dwId ) ;
extern void PMC_EnableAllPeripherals( void ) ;
extern void PMC_DisableAllPeripherals( void ) ;
extern uint32_t PMC_IsPeriphEnabled( uint32_t dwId ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _PMC_ */

127
firmware/atmel_softpack_libraries/libchip_sam3s/include/pwmc.h Normal file
View File

@@ -0,0 +1,127 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \par Purpose
*
* Interface for configuration the Pulse Width Modulation Controller (PWM) peripheral.
*
* \par Usage
*
* -# Configures PWM clocks A & B to run at the given frequencies using
* \ref PWMC_ConfigureClocks().
* -# Configure PWMC channel using \ref PWMC_ConfigureChannel(), \ref PWMC_ConfigureChannelExt()
* \ref PWMC_SetPeriod(), \ref PWMC_SetDutyCycle() and \ref PWMC_SetDeadTime().
* -# Enable & disable channel using \ref PWMC_EnableChannel() and
* \ref PWMC_DisableChannel().
* -# Enable & disable the period interrupt for the given PWM channel using
* \ref PWMC_EnableChannelIt() and \ref PWMC_DisableChannelIt().
* -# Enable & disable the selected interrupts sources on a PWMC peripheral
* using \ref PWMC_EnableIt() and \ref PWMC_DisableIt().
* -# Control syncronous channel using \ref PWMC_ConfigureSyncChannel(),
* \ref PWMC_SetSyncChannelUpdatePeriod() and \ref PWMC_SetSyncChannelUpdateUnlock().
* -# Control PWM override output using \ref PWMC_SetOverrideValue(),
* \ref PWMC_EnableOverrideOutput() and \ref PWMC_DisableOverrideOutput().
* -# Send data through the transmitter using \ref PWMC_WriteBuffer().
*
*/
#ifndef _PWMC_
#define _PWMC_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void PWMC_ConfigureChannel(
Pwm* pPwm,
uint8_t channel,
uint32_t prescaler,
uint32_t alignment,
uint32_t polarity);
extern void PWMC_ConfigureChannelExt(
Pwm* pPwm,
uint8_t channel,
uint32_t prescaler,
uint32_t alignment,
uint32_t polarity,
uint32_t countEventSelect,
uint32_t DTEnable,
uint32_t DTHInverte,
uint32_t DTLInverte);
extern void PWMC_ConfigureClocks(uint32_t clka, uint32_t clkb, uint32_t mck);
extern void PWMC_SetPeriod( Pwm* pPwm, uint8_t channel, uint16_t period);
extern void PWMC_SetDutyCycle( Pwm* pPwm, uint8_t channel, uint16_t duty);
extern void PWMC_SetDeadTime( Pwm* pPwm, uint8_t channel, uint16_t timeH, uint16_t timeL);
extern void PWMC_ConfigureSyncChannel( Pwm* pPwm,
uint32_t channels,
uint32_t updateMode,
uint32_t requestMode,
uint32_t requestComparisonSelect);
extern void PWMC_SetSyncChannelUpdatePeriod( Pwm* pPwm, uint8_t period);
extern void PWMC_SetSyncChannelUpdateUnlock( Pwm* pPwm );
extern void PWMC_EnableChannel( Pwm* pPwm, uint8_t channel);
extern void PWMC_DisableChannel( Pwm* pPwm, uint8_t channel);
extern void PWMC_EnableChannelIt( Pwm* pPwm, uint8_t channel);
extern void PWMC_DisableChannelIt( Pwm* pPwm, uint8_t channel);
extern void PWMC_EnableIt( Pwm* pPwm, uint32_t sources1, uint32_t sources2);
extern void PWMC_DisableIt( Pwm* pPwm, uint32_t sources1, uint32_t sources2);
extern uint8_t PWMC_WriteBuffer(Pwm *pwmc,
void *buffer,
uint32_t length);
extern void PWMC_SetOverrideValue( Pwm* pPwm, uint32_t value);
extern void PWMC_EnableOverrideOutput( Pwm* pPwm, uint32_t value, uint32_t sync);
extern void PWMC_DisableOverrideOutput( Pwm* pPwm, uint32_t value, uint32_t sync);
extern void PWMC_SetFaultMode( Pwm* pPwm, uint32_t mode);
extern void PWMC_FaultClear( Pwm* pPwm, uint32_t fault);
extern void PWMC_SetFaultProtectionValue( Pwm* pPwm, uint32_t value);
extern void PWMC_EnableFaultProtection( Pwm* pPwm, uint32_t value);
extern void PWMC_ConfigureComparisonUnit( Pwm* pPwm, uint32_t x, uint32_t value, uint32_t mode);
extern void PWMC_ConfigureEventLineMode( Pwm* pPwm, uint32_t x, uint32_t mode);
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _PWMC_ */

97
firmware/atmel_softpack_libraries/libchip_sam3s/include/rtc.h Normal file
View File

@@ -0,0 +1,97 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Interface for Real Time Clock (RTC) controller.
*
*/
#ifndef _RTC_
#define _RTC_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <stdint.h>
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
#define RTC_HOUR_BIT_LEN_MASK 0x3F
#define RTC_MIN_BIT_LEN_MASK 0x7F
#define RTC_SEC_BIT_LEN_MASK 0x7F
#define RTC_CENT_BIT_LEN_MASK 0x7F
#define RTC_YEAR_BIT_LEN_MASK 0xFF
#define RTC_MONTH_BIT_LEN_MASK 0x1F
#define RTC_DATE_BIT_LEN_MASK 0x3F
#define RTC_WEEK_BIT_LEN_MASK 0x07
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
#ifdef __cplusplus
extern "C" {
#endif
extern void RTC_SetHourMode( Rtc* pRtc, uint32_t dwMode ) ;
extern uint32_t RTC_GetHourMode( Rtc* pRtc ) ;
extern void RTC_EnableIt( Rtc* pRtc, uint32_t dwSources ) ;
extern void RTC_DisableIt( Rtc* pRtc, uint32_t dwSources ) ;
extern int RTC_SetTime( Rtc* pRtc, uint8_t ucHour, uint8_t ucMinute, uint8_t ucSecond ) ;
extern void RTC_GetTime( Rtc* pRtc, uint8_t *pucHour, uint8_t *pucMinute, uint8_t *pucSecond ) ;
extern int RTC_SetTimeAlarm( Rtc* pRtc, uint8_t *pucHour, uint8_t *pucMinute, uint8_t *pucSecond ) ;
extern void RTC_GetDate( Rtc* pRtc, uint16_t *pwYear, uint8_t *pucMonth, uint8_t *pucDay, uint8_t *pucWeek ) ;
extern int RTC_SetDate( Rtc* pRtc, uint16_t wYear, uint8_t ucMonth, uint8_t ucDay, uint8_t ucWeek ) ;
extern int RTC_SetDateAlarm( Rtc* pRtc, uint8_t *pucMonth, uint8_t *pucDay ) ;
extern void RTC_ClearSCCR( Rtc* pRtc, uint32_t dwMask ) ;
extern uint32_t RTC_GetSR( Rtc* pRtc, uint32_t dwMask ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _RTC_ */

82
firmware/atmel_softpack_libraries/libchip_sam3s/include/rtt.h Normal file
View File

@@ -0,0 +1,82 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \par Purpose
*
* Interface for Real Time Timer (RTT) controller.
*
* \par Usage
*
* -# Changes the prescaler value of the given RTT and restarts it
* using \ref RTT_SetPrescaler().
* -# Get current value of the RTT using \ref RTT_GetTime().
* -# Enables the specified RTT interrupt using \ref RTT_EnableIT().
* -# Get the status register value of the given RTT using \ref RTT_GetStatus().
* -# Configures the RTT to generate an alarm at the given time
* using \ref RTT_SetAlarm().
*/
#ifndef _RTT_
#define _RTT_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <stdint.h>
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
#ifdef __cplusplus
extern "C" {
#endif
extern void RTT_SetPrescaler( Rtt* pRtt, uint16_t wPrescaler ) ;
extern uint32_t RTT_GetTime( Rtt* pRtt ) ;
extern void RTT_EnableIT( Rtt* pRtt, uint32_t dwSources ) ;
extern uint32_t RTT_GetStatus( Rtt *pRtt ) ;
extern void RTT_SetAlarm( Rtt *pRtt, uint32_t dwTime ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef RTT_H */

115
firmware/atmel_softpack_libraries/libchip_sam3s/include/spi.h Normal file
View File

@@ -0,0 +1,115 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Interface for Serial Peripheral Interface (SPI) controller.
*
*/
#ifndef _SPI_
#define _SPI_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
/*----------------------------------------------------------------------------
* Macros
*----------------------------------------------------------------------------*/
/**
*
* Here are several macros which should be used when configuring a SPI
* peripheral.
*
* \section spi_configuration_macros SPI Configuration Macros
* - \ref SPI_PCS
* - \ref SPI_SCBR
* - \ref SPI_DLYBS
* - \ref SPI_DLYBCT
*/
/** Calculate the PCS field value given the chip select NPCS value */
#define SPI_PCS(npcs) ((~(1 << npcs) & 0xF) << 16)
/** Calculates the value of the CSR SCBR field given the baudrate and MCK. */
#define SPI_SCBR(baudrate, masterClock) ((uint32_t) (masterClock / baudrate) << 8)
/** Calculates the value of the CSR DLYBS field given the desired delay (in ns) */
#define SPI_DLYBS(delay, masterClock) ((uint32_t) (((masterClock / 1000000) * delay) / 1000) << 16)
/** Calculates the value of the CSR DLYBCT field given the desired delay (in ns) */
#define SPI_DLYBCT(delay, masterClock) ((uint32_t) (((masterClock / 1000000) * delay) / 32000) << 24)
/*------------------------------------------------------------------------------ */
#ifdef __cplusplus
extern "C" {
#endif
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void SPI_Enable( Spi* spi ) ;
extern void SPI_Disable( Spi* spi ) ;
extern void SPI_EnableIt( Spi* spi, uint32_t dwSources ) ;
extern void SPI_DisableIt( Spi* spi, uint32_t dwSources ) ;
extern void SPI_Configure( Spi* spi, uint32_t dwId, uint32_t dwConfiguration ) ;
extern void SPI_ConfigureNPCS( Spi* spi, uint32_t dwNpcs, uint32_t dwConfiguration ) ;
extern uint32_t SPI_Read( Spi* spi ) ;
extern void SPI_Write( Spi* spi, uint32_t dwNpcs, uint16_t wData ) ;
extern uint32_t SPI_GetStatus( Spi* spi ) ;
extern uint32_t SPI_IsFinished( Spi* pSpi ) ;
extern void SPI_PdcEnableTx( Spi* spi ) ;
extern void SPI_PdcDisableTx( Spi* spi ) ;
extern void SPI_PdcEnableRx( Spi* spi ) ;
extern void SPI_PdcDisableRx( Spi* spi ) ;
extern void SPI_PdcSetTx( Spi* spi, void* pvTxBuf, uint32_t dwTxCount, void* pvTxNextBuf, uint32_t dwTxNextCount ) ;
extern void SPI_PdcSetRx( Spi* spi, void* pvRxBuf, uint32_t dwRxCount, void* pvRxNextBuf, uint32_t dwRxNextCount ) ;
extern uint32_t SPI_WriteBuffer( Spi* spi, void* pvBuffer, uint32_t dwLength ) ;
extern uint32_t SPI_ReadBuffer( Spi* spi, void* pvBuffer, uint32_t dwLength ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _SPI_ */

135
firmware/atmel_softpack_libraries/libchip_sam3s/include/spi_pdc.h Normal file
View File

@@ -0,0 +1,135 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Implementation of SPI PDC driver.
*
*/
#ifndef _SPI_PDC_
#define _SPI_PDC_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
/** An unspecified error has occured.*/
#define SPID_ERROR 1
/** SPI driver is currently in use.*/
#define SPID_ERROR_LOCK 2
/*----------------------------------------------------------------------------
* Macros
*----------------------------------------------------------------------------*/
/** Calculates the value of the SCBR field of the Chip Select Register given MCK and SPCK.*/
#define SPID_CSR_SCBR(mck, spck) (SPI_CSR_SCBR(((mck) / (spck))) )
/** Calculates the value of the DLYBS field of the Chip Select Register given delay in ns and MCK.*/
#define SPID_CSR_DLYBS(mck, delay) ( SPI_CSR_DLYBS(((((delay) * ((mck) / 1000000)) / 1000) + 1)) )
/** Calculates the value of the DLYBCT field of the Chip Select Register given delay in ns and MCK.*/
#define SPID_CSR_DLYBCT(mck, delay) ( SPI_CSR_DLYBCT((((delay) / 32 * ((mck) / 1000000)) / 1000) + 1) )
#ifdef __cplusplus
extern "C" {
#endif
/*----------------------------------------------------------------------------
* Types
*----------------------------------------------------------------------------*/
/** SPI transfer complete callback. */
typedef void (*SpidCallback)( uint8_t, void* ) ;
/** \brief Spi Transfer Request prepared by the application upper layer.
*
* This structure is sent to the SPI_SendCommand function to start the transfer.
* At the end of the transfer, the callback is invoked by the interrupt handler.
*/
typedef struct _SpidCmd
{
/** Pointer to the command data. */
uint8_t *pCmd;
/** Command size in bytes. */
uint8_t cmdSize;
/** Pointer to the data to be sent. */
uint8_t *pData;
/** Data size in bytes. */
unsigned short dataSize;
/** SPI chip select. */
uint8_t spiCs;
/** Callback function invoked at the end of transfer. */
SpidCallback callback;
/** Callback arguments. */
void *pArgument;
} SpidCmd ;
/** Constant structure associated with SPI port. This structure prevents
client applications to have access in the same time. */
typedef struct _Spid
{
/** Pointer to SPI Hardware registers */
Spi* pSpiHw ;
/** SPI Id as defined in the product datasheet */
char spiId ;
/** Current SpiCommand being processed */
SpidCmd *pCurrentCommand ;
/** Mutual exclusion semaphore. */
volatile char semaphore ;
} Spid ;
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern uint32_t SPID_Configure( Spid* pSpid, Spi* pSpiHw, uint8_t spiId ) ;
extern void SPID_ConfigureCS( Spid* pSpid, uint32_t dwCS, uint32_t dwCsr ) ;
extern uint32_t SPID_SendCommand( Spid* pSpid, SpidCmd* pCommand ) ;
extern void SPID_Handler( Spid* pSpid ) ;
extern uint32_t SPID_IsBusy( const Spid* pSpid ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _SPI_PDC_ */

73
firmware/atmel_softpack_libraries/libchip_sam3s/include/ssc.h Normal file
View File

@@ -0,0 +1,73 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Interface for Synchronous Serial (SSC) controller.
*
*/
#ifndef _SSC_
#define _SSC_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void SSC_Configure(uint32_t bitRate, uint32_t masterClock);
extern void SSC_ConfigureTransmitter(uint32_t tcmr, uint32_t tfmr);
extern void SSC_ConfigureReceiver(uint32_t rcmr, uint32_t rfmr);
extern void SSC_EnableTransmitter(void);
extern void SSC_DisableTransmitter(void);
extern void SSC_EnableReceiver(void);
extern void SSC_DisableReceiver(void);
extern void SSC_EnableInterrupts(uint32_t sources);
extern void SSC_DisableInterrupts(uint32_t sources);
extern void SSC_Write(uint32_t frame);
extern uint32_t SSC_Read(void);
extern uint8_t SSC_WriteBuffer(void *buffer, uint32_t length);
extern uint8_t SSC_ReadBuffer(void *buffer, uint32_t length);
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _SSC_ */

78
firmware/atmel_softpack_libraries/libchip_sam3s/include/supc.h Normal file
View File

@@ -0,0 +1,78 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef _SUPC_
#define _SUPC_
#include "chip.h"
#include <stdint.h>
//------------------------------------------------------------------------------
// Global functions
//------------------------------------------------------------------------------
extern
#ifdef __ICCARM__
__ramfunc /* IAR */
#endif
void SUPC_EnableFlash( Supc* pSupc, uint32_t dwTime ) ;
extern
#ifdef __ICCARM__
__ramfunc /* IAR */
#endif
void SUPC_DisableFlash( Supc* pSupc ) ;
extern void SUPC_SetVoltageOutput( Supc* pSupc, uint32_t dwVoltage ) ;
extern void SUPC_EnableDeepMode( Supc* pSupc ) ;
extern void SUPC_EnableSram( Supc* pSupc ) ;
extern void SUPC_DisableSram( Supc* pSupc ) ;
extern void SUPC_EnableRtc( Supc* pSupc ) ;
extern void SUPC_DisableRtc( Supc* pSupc ) ;
extern void SUPC_SetBodSampling( Supc* pSupc, uint32_t dwMode ) ;
extern void SUPC_DisableDeepMode( Supc* pSupc ) ;
extern void SUPC_DisableVoltageRegulator( Supc* pSupc ) ;
extern void SUPC_Shutdown( Supc* pSupc ) ;
extern void SUPC_SetWakeUpSources( Supc* pSupc, uint32_t dwSources ) ;
extern void SUPC_SetWakeUpInputs( Supc* pSupc, uint32_t dwInputs ) ;
#endif /* #ifndef _SUPC_ */

76
firmware/atmel_softpack_libraries/libchip_sam3s/include/tc.h Normal file
View File

@@ -0,0 +1,76 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \section Purpose
*
* Interface for configuring and using Timer Counter (TC) peripherals.
*
* \section Usage
* -# Optionally, use TC_FindMckDivisor() to let the program find the best
* TCCLKS field value automatically.
* -# Configure a Timer Counter in the desired mode using TC_Configure().
* -# Start or stop the timer clock using TC_Start() and TC_Stop().
*/
#ifndef _TC_
#define _TC_
/*------------------------------------------------------------------------------
* Headers
*------------------------------------------------------------------------------*/
#include "chip.h"
#include <stdint.h>
/*------------------------------------------------------------------------------
* Global functions
*------------------------------------------------------------------------------*/
#ifdef __cplusplus
extern "C" {
#endif
extern void TC_Configure( Tc *pTc, uint32_t dwChannel, uint32_t dwMode ) ;
extern void TC_Start( Tc *pTc, uint32_t dwChannel ) ;
extern void TC_Stop( Tc *pTc, uint32_t dwChannel ) ;
extern uint32_t TC_FindMckDivisor( uint32_t dwFreq, uint32_t dwMCk, uint32_t *dwDiv, uint32_t *dwTcClks, uint32_t dwBoardMCK ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _TC_ */

237
firmware/atmel_softpack_libraries/libchip_sam3s/include/trace.h Normal file
View File

@@ -0,0 +1,237 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \par Purpose
*
* Standard output methods for reporting debug information, warnings and
* errors, which can be easily be turned on/off.
*
* \par Usage
* -# Initialize the DBGU using TRACE_CONFIGURE() if you intend to eventually
* disable ALL traces; otherwise use DBGU_Configure().
* -# Uses the TRACE_DEBUG(), TRACE_INFO(), TRACE_WARNING(), TRACE_ERROR()
* TRACE_FATAL() macros to output traces throughout the program.
* -# Each type of trace has a level : Debug 5, Info 4, Warning 3, Error 2
* and Fatal 1. Disable a group of traces by changing the value of
* TRACE_LEVEL during compilation; traces with a level bigger than TRACE_LEVEL
* are not generated. To generate no trace, use the reserved value 0.
* -# Trace disabling can be static or dynamic. If dynamic disabling is selected
* the trace level can be modified in runtime. If static disabling is selected
* the disabled traces are not compiled.
*
* \par traceLevels Trace level description
* -# TRACE_DEBUG (5): Traces whose only purpose is for debugging the program,
* and which do not produce meaningful information otherwise.
* -# TRACE_INFO (4): Informational trace about the program execution. Should
* enable the user to see the execution flow.
* -# TRACE_WARNING (3): Indicates that a minor error has happened. In most case
* it can be discarded safely; it may even be expected.
* -# TRACE_ERROR (2): Indicates an error which may not stop the program execution,
* but which indicates there is a problem with the code.
* -# TRACE_FATAL (1): Indicates a major error which prevents the program from going
* any further.
*/
#ifndef _TRACE_
#define _TRACE_
/*
* Headers
*/
#include "board.h"
#include "pio.h"
#include <stdio.h>
/*
* Global Definitions
*/
/** Softpack Version */
#define SOFTPACK_VERSION "2.0"
#define TRACE_LEVEL_DEBUG 5
#define TRACE_LEVEL_INFO 4
#define TRACE_LEVEL_WARNING 3
#define TRACE_LEVEL_ERROR 2
#define TRACE_LEVEL_FATAL 1
#define TRACE_LEVEL_NO_TRACE 0
/* By default, all traces are output except the debug one. */
#if !defined(TRACE_LEVEL)
#define TRACE_LEVEL TRACE_LEVEL_INFO
#endif
/* By default, trace level is static (not dynamic) */
#if !defined(DYN_TRACES)
#define DYN_TRACES 0
#endif
#if defined(NOTRACE)
#error "Error: NOTRACE has to be not defined !"
#endif
#undef NOTRACE
#if (DYN_TRACES==0)
#if (TRACE_LEVEL == TRACE_LEVEL_NO_TRACE)
#define NOTRACE
#endif
#endif
/* ------------------------------------------------------------------------------
* Global Macros
* ------------------------------------------------------------------------------
*/
extern void TRACE_CONFIGURE( uint32_t dwBaudRate, uint32_t dwMCk ) ;
/**
* Initializes the DBGU for ISP project
*
* \param mode DBGU mode.
* \param baudrate DBGU baudrate.
* \param mck Master clock frequency.
*/
#ifndef DYNTRACE
#define DYNTRACE 0
#endif
#if (TRACE_LEVEL==0) && (DYNTRACE==0)
#define TRACE_CONFIGURE_ISP(mode, baudrate, mck) {}
#else
#define TRACE_CONFIGURE_ISP(mode, baudrate, mck) { \
const Pin pinsUART0[] = {PINS_UART}; \
PIO_Configure(pinsUART0, PIO_LISTSIZE(pinsUART0)); \
UART_Configure( baudrate, mck ) ; \
}
#endif
/**
* Outputs a formatted string using 'printf' if the log level is high
* enough. Can be disabled by defining TRACE_LEVEL=0 during compilation.
* \param ... Additional parameters depending on formatted string.
*/
#if defined(NOTRACE)
/* Empty macro */
#define TRACE_DEBUG(...) { }
#define TRACE_INFO(...) { }
#define TRACE_WARNING(...) { }
#define TRACE_ERROR(...) { }
#define TRACE_FATAL(...) { while(1); }
#define TRACE_DEBUG_WP(...) { }
#define TRACE_INFO_WP(...) { }
#define TRACE_WARNING_WP(...) { }
#define TRACE_ERROR_WP(...) { }
#define TRACE_FATAL_WP(...) { while(1); }
#elif (DYN_TRACES == 1)
/* Trace output depends on dwTraceLevel value */
#define TRACE_DEBUG(...) { if (dwTraceLevel >= TRACE_LEVEL_DEBUG) { printf("-D- " __VA_ARGS__); } }
#define TRACE_INFO(...) { if (dwTraceLevel >= TRACE_LEVEL_INFO) { printf("-I- " __VA_ARGS__); } }
#define TRACE_WARNING(...) { if (dwTraceLevel >= TRACE_LEVEL_WARNING) { printf("-W- " __VA_ARGS__); } }
#define TRACE_ERROR(...) { if (dwTraceLevel >= TRACE_LEVEL_ERROR) { printf("-E- " __VA_ARGS__); } }
#define TRACE_FATAL(...) { if (dwTraceLevel >= TRACE_LEVEL_FATAL) { printf("-F- " __VA_ARGS__); while(1); } }
#define TRACE_DEBUG_WP(...) { if (dwTraceLevel >= TRACE_LEVEL_DEBUG) { printf(__VA_ARGS__); } }
#define TRACE_INFO_WP(...) { if (dwTraceLevel >= TRACE_LEVEL_INFO) { printf(__VA_ARGS__); } }
#define TRACE_WARNING_WP(...) { if (dwTraceLevel >= TRACE_LEVEL_WARNING) { printf(__VA_ARGS__); } }
#define TRACE_ERROR_WP(...) { if (dwTraceLevel >= TRACE_LEVEL_ERROR) { printf(__VA_ARGS__); } }
#define TRACE_FATAL_WP(...) { if (dwTraceLevel >= TRACE_LEVEL_FATAL) { printf(__VA_ARGS__); while(1); } }
#else
/* Trace compilation depends on TRACE_LEVEL value */
#if (TRACE_LEVEL >= TRACE_LEVEL_DEBUG)
#define TRACE_DEBUG(...) { printf("-D- " __VA_ARGS__); printf("(%s func. %s)\n\r", __FILE__, __FUNCTION__); }
#define TRACE_DEBUG_WP(...) { printf(__VA_ARGS__); }
#else
#define TRACE_DEBUG(...) { }
#define TRACE_DEBUG_WP(...) { }
#endif
#if (TRACE_LEVEL >= TRACE_LEVEL_INFO)
#define TRACE_INFO(...) { printf("-I- " __VA_ARGS__); }
#define TRACE_INFO_WP(...) { printf(__VA_ARGS__); }
#else
#define TRACE_INFO(...) { }
#define TRACE_INFO_WP(...) { }
#endif
#if (TRACE_LEVEL >= TRACE_LEVEL_WARNING)
#define TRACE_WARNING(...) { printf("-W- " __VA_ARGS__); }
#define TRACE_WARNING_WP(...) { printf(__VA_ARGS__); }
#else
#define TRACE_WARNING(...) { }
#define TRACE_WARNING_WP(...) { }
#endif
#if (TRACE_LEVEL >= TRACE_LEVEL_ERROR)
#define TRACE_ERROR(...) { printf("-E- " __VA_ARGS__); }
#define TRACE_ERROR_WP(...) { printf(__VA_ARGS__); }
#else
#define TRACE_ERROR(...) { }
#define TRACE_ERROR_WP(...) { }
#endif
#if (TRACE_LEVEL >= TRACE_LEVEL_FATAL)
#define TRACE_FATAL(...) { printf("-F- " __VA_ARGS__); while(1); }
#define TRACE_FATAL_WP(...) { printf(__VA_ARGS__); while(1); }
#else
#define TRACE_FATAL(...) { while(1); }
#define TRACE_FATAL_WP(...) { while(1); }
#endif
#endif
#if defined(USB_NO_DEBUG)
#undef TRACE_DEBUG_WP
#define TRACE_DEBUG(...) { }
#undef TRACE_INFO_WP
#define TRACE_INFO_WP(...) { }
#endif
/**
* Exported variables
*/
/** Depending on DYN_TRACES, dwTraceLevel is a modifable runtime variable or a define */
#if !defined(NOTRACE) && (DYN_TRACES == 1)
extern uint32_t dwTraceLevel ;
#endif
#endif //#ifndef TRACE_H

111
firmware/atmel_softpack_libraries/libchip_sam3s/include/twi.h Normal file
View File

@@ -0,0 +1,111 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Interface for configuration the Two Wire Interface (TWI) peripheral.
*
*/
#ifndef _TWI_
#define _TWI_
/*------------------------------------------------------------------------------
* Headers
*------------------------------------------------------------------------------*/
#include "chip.h"
#include <stdint.h>
/*----------------------------------------------------------------------------
* Macros
*----------------------------------------------------------------------------*/
/* Returns 1 if the TXRDY bit (ready to transmit data) is set in the given status register value.*/
#define TWI_STATUS_TXRDY(status) ((status & TWI_SR_TXRDY) == TWI_SR_TXRDY)
/* Returns 1 if the RXRDY bit (ready to receive data) is set in the given status register value.*/
#define TWI_STATUS_RXRDY(status) ((status & TWI_SR_RXRDY) == TWI_SR_RXRDY)
/* Returns 1 if the TXCOMP bit (transfer complete) is set in the given status register value.*/
#define TWI_STATUS_TXCOMP(status) ((status & TWI_SR_TXCOMP) == TWI_SR_TXCOMP)
#ifdef __cplusplus
extern "C" {
#endif
/*----------------------------------------------------------------------------
* External function
*----------------------------------------------------------------------------*/
extern void TWI_ConfigureMaster(Twi *pTwi, uint32_t twck, uint32_t mck);
extern void TWI_ConfigureSlave(Twi *pTwi, uint8_t slaveAddress);
extern void TWI_Stop(Twi *pTwi);
extern void TWI_StartRead(
Twi *pTwi,
uint8_t address,
uint32_t iaddress,
uint8_t isize);
extern uint8_t TWI_ReadByte(Twi *pTwi);
extern void TWI_WriteByte(Twi *pTwi, uint8_t byte);
extern void TWI_StartWrite(
Twi *pTwi,
uint8_t address,
uint32_t iaddress,
uint8_t isize,
uint8_t byte);
extern uint8_t TWI_ByteReceived(Twi *pTwi);
extern uint8_t TWI_ByteSent(Twi *pTwi);
extern uint8_t TWI_TransferComplete(Twi *pTwi);
extern void TWI_EnableIt(Twi *pTwi, uint32_t sources);
extern void TWI_DisableIt(Twi *pTwi, uint32_t sources);
extern uint32_t TWI_GetStatus(Twi *pTwi);
extern uint32_t TWI_GetMaskedStatus(Twi *pTwi);
extern void TWI_SendSTOPCondition(Twi *pTwi);
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _TWI_ */

95
firmware/atmel_softpack_libraries/libchip_sam3s/include/twid.h Normal file
View File

@@ -0,0 +1,95 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
#ifndef _TWID_
#define _TWID_
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <stdint.h>
/*----------------------------------------------------------------------------
* Definition
*----------------------------------------------------------------------------*/
/** TWI driver is currently busy. */
#define TWID_ERROR_BUSY 1
#ifdef __cplusplus
extern "C" {
#endif
/*----------------------------------------------------------------------------
* Types
*----------------------------------------------------------------------------*/
/** \brief TWI driver structure. Holds the internal state of the driver.*/
typedef struct _Twid
{
/** Pointer to the underlying TWI peripheral.*/
Twi *pTwi ;
/** Current asynchronous transfer being processed.*/
Async *pTransfer ;
} Twid;
/*----------------------------------------------------------------------------
* Export functions
*----------------------------------------------------------------------------*/
extern void TWID_Initialize( Twid *pTwid, Twi *pTwi ) ;
extern void TWID_Handler( Twid *pTwid ) ;
extern uint8_t TWID_Read(
Twid *pTwid,
uint8_t address,
uint32_t iaddress,
uint8_t isize,
uint8_t *pData,
uint32_t num,
Async *pAsync);
extern uint8_t TWID_Write(
Twid *pTwid,
uint8_t address,
uint32_t iaddress,
uint8_t isize,
uint8_t *pData,
uint32_t num,
Async *pAsync);
#ifdef __cplusplus
}
#endif
#endif //#ifndef TWID_H

133
firmware/atmel_softpack_libraries/libchip_sam3s/include/usart.h Normal file
View File

@@ -0,0 +1,133 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \par Purpose
*
* This module provides several definitions and methods for using an USART
* peripheral.
*
* \par Usage
*
* -# Enable the USART peripheral clock in the PMC.
* -# Enable the required USART PIOs (see pio.h).
* -# Configure the UART by calling USART_Configure.
* -# Enable the transmitter and/or the receiver of the USART using
* USART_SetTransmitterEnabled and USART_SetReceiverEnabled.
* -# Send data through the USART using the USART_Write and
* USART_WriteBuffer methods.
* -# Receive data from the USART using the USART_Read and
* USART_ReadBuffer functions; the availability of data can be polled
* with USART_IsDataAvailable.
* -# Disable the transmitter and/or the receiver of the USART with
* USART_SetTransmitterEnabled and USART_SetReceiverEnabled.
*/
#ifndef _USART_
#define _USART_
/*------------------------------------------------------------------------------
* Headers
*------------------------------------------------------------------------------*/
#include "chip.h"
#include <stdint.h>
/*------------------------------------------------------------------------------
* Definitions
*------------------------------------------------------------------------------*/
/** \section USART_mode USART modes
* This section lists several common operating modes for an USART peripheral.
*
* \b Modes
* - USART_MODE_ASYNCHRONOUS
* - USART_MODE_IRDA
*/
/** Basic asynchronous mode, i.e. 8 bits no parity.*/
#define USART_MODE_ASYNCHRONOUS (US_MR_CHRL_8_BIT | US_MR_PAR_NO)
/** IRDA mode*/
#define USART_MODE_IRDA (AT91C_US_USMODE_IRDA | AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE | AT91C_US_FILTER)
/** SPI mode*/
#define AT91C_US_USMODE_SPIM 0xE
#define US_SPI_CPOL_0 (0x0<<16)
#define US_SPI_CPHA_0 (0x0<<8)
#define US_SPI_CPOL_1 (0x1<<16)
#define US_SPI_CPHA_1 (0x1<<8)
#define US_SPI_BPMODE_0 (US_SPI_CPOL_0|US_SPI_CPHA_1)
#define US_SPI_BPMODE_1 (US_SPI_CPOL_0|US_SPI_CPHA_0)
#define US_SPI_BPMODE_2 (US_SPI_CPOL_1|US_SPI_CPHA_1)
#define US_SPI_BPMODE_3 (US_SPI_CPOL_1|US_SPI_CPHA_0)
#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------------------------------------------*/
/* Exported functions */
/*------------------------------------------------------------------------------*/
extern void USART_Configure( Usart *usart, uint32_t mode, uint32_t baudrate, uint32_t masterClock ) ;
extern uint32_t USART_GetStatus( Usart *usart ) ;
extern void USART_EnableIt( Usart *usart,uint32_t mode ) ;
extern void USART_DisableIt( Usart *usart,uint32_t mode ) ;
extern void USART_SetTransmitterEnabled( Usart *usart, uint8_t enabled ) ;
extern void USART_SetReceiverEnabled( Usart *usart, uint8_t enabled ) ;
extern void USART_Write( Usart *usart, uint16_t data, volatile uint32_t timeOut ) ;
extern uint8_t USART_WriteBuffer( Usart *usart, void *buffer, uint32_t size ) ;
extern uint16_t USART_Read( Usart *usart, volatile uint32_t timeOut ) ;
extern uint8_t USART_ReadBuffer( Usart *usart, void *buffer, uint32_t size ) ;
extern uint8_t USART_IsDataAvailable( Usart *usart ) ;
extern void USART_SetIrdaFilter(Usart *pUsart, uint8_t filter);
extern void USART_PutChar( Usart *usart, uint8_t c ) ;
extern uint32_t USART_IsRxReady( Usart *usart ) ;
extern uint8_t USART_GetChar( Usart *usart ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _USART_ */

74
firmware/atmel_softpack_libraries/libchip_sam3s/include/wdt.h Normal file
View File

@@ -0,0 +1,74 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* \section Purpose
* Interface for Watchdog Timer (WDT) controller.
*
* \section Usage
* -# Enable watchdog with given mode using \ref WDT_Enable().
* -# Disable watchdog using \ref WDT_Disable()
* -# Restart the watchdog using \ref WDT_Restart().
* -# Get watchdog status using \ref WDT_GetStatus().
* -# Caculate watchdog period value using \ref WDT_GetPeriod().
*/
#ifndef _WDT_
#define _WDT_
#include "chip.h"
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
extern void WDT_Enable( Wdt* pWDT, uint32_t dwMode ) ;
extern void WDT_Disable( Wdt* pWDT ) ;
extern void WDT_Restart( Wdt* pWDT ) ;
extern uint32_t WDT_GetStatus( Wdt* pWDT ) ;
extern uint32_t WDT_GetPeriod( uint32_t dwMs ) ;
#ifdef __cplusplus
}
#endif
#endif /* #ifndef _WDT_ */

BIN
firmware/atmel_softpack_libraries/libchip_sam3s/lib/libchip_sam3s1_gcc_dbg.a Normal file
View File

Binary file not shown.

488
firmware/atmel_softpack_libraries/libchip_sam3s/lib/libchip_sam3s1_gcc_dbg.a.txt Normal file
View File

@@ -0,0 +1,488 @@
USBD_HAL.o:
00000000 b endpoints
U iprintf
U PMC_DisablePeripheral
U PMC_EnablePeripheral
U PMC_IsPeriphEnabled
00000000 t UDP_AddWr
00000000 t UDP_ClearRxFlag
00000000 t UDP_DisablePeripheralClock
00000000 t UDP_DisableTransceiver
00000000 t UDP_DisableUsbClock
00000000 t UDP_EnablePeripheralClock
00000000 t UDP_EnableTransceiver
00000000 t UDP_EnableUsbClock
00000000 t UDP_EndOfTransfer
00000000 t UDP_EndpointHandler
00000000 t UDP_IsTransferFinished
00000000 t UDP_MblUpdate
00000000 t UDP_MblWriteFifo
00000000 t UDP_Read
00000000 t UDP_ReadPayload
00000000 t UDP_ReadRequest
00000000 t UDP_Write
00000000 t UDP_WritePayload
U USBD_GetState
00000000 T USBD_HAL_Activate
00000000 T USBD_HAL_CancelIo
00000000 T USBD_HAL_ConfigureEP
00000000 T USBD_HAL_Connect
00000000 T USBD_HAL_Disconnect
00000000 T USBD_HAL_Halt
00000000 T USBD_HAL_Init
00000000 T USBD_HAL_IsHighSpeed
00000000 T USBD_HAL_Read
00000000 T USBD_HAL_RemoteWakeUp
00000000 T USBD_HAL_ResetEPs
00000000 T USBD_HAL_SetAddress
00000000 T USBD_HAL_SetConfiguration
00000000 T USBD_HAL_SetTransferCallback
00000000 T USBD_HAL_SetupMblTransfer
00000000 T USBD_HAL_Stall
00000000 T USBD_HAL_Suspend
00000000 T USBD_HAL_Write
00000000 T USBD_IrqHandler
U USBD_RequestHandler
U USBD_ResetHandler
U USBD_ResumeHandler
U USBD_SuspendHandler
U USBEndpointDescriptor_GetDirection
U USBEndpointDescriptor_GetMaxPacketSize
U USBEndpointDescriptor_GetNumber
U USBEndpointDescriptor_GetType
U USBGenericRequest_GetDirection
acc.o:
00000000 T ACC_Configure
00000000 T ACC_GetComparisionResult
00000000 T ACC_SetComparisionPair
U __assert_func
00000034 r __FUNCTION__.6748
crccu.o:
00000000 T CRCCU_ComputeCrc
00000000 T CRCCU_Configure
00000000 T CRCCU_ResetCrcValue
pio_it.o:
00000000 b _aIntSources
U __assert_func
00000038 b _dwNumSources
0000007c r __FUNCTION__.6752
00000090 r __FUNCTION__.6775
000000a0 r __FUNCTION__.6779
000000b0 r __FUNCTION__.6788
00000000 t NVIC_ClearPendingIRQ
00000000 t NVIC_DisableIRQ
00000000 t NVIC_EnableIRQ
00000000 t NVIC_SetPriority
00000000 T PIOA_IrqHandler
00000000 T PIOB_IrqHandler
U PIO_CaptureHandler
00000000 T PIOC_IrqHandler
00000000 T PIO_ConfigureIt
00000000 T PIO_DisableIt
00000000 T PIO_EnableIt
00000000 T PIO_InitializeInterrupts
00000000 T PioInterruptHandler
U PMC_EnablePeripheral
twi.o:
U __assert_func
000000c8 r __FUNCTION__.6747
000000dc r __FUNCTION__.6762
000000f0 r __FUNCTION__.6766
000000fc r __FUNCTION__.6773
0000010c r __FUNCTION__.6777
0000011c r __FUNCTION__.6782
0000012c r __FUNCTION__.6790
0000013c r __FUNCTION__.6804
0000014c r __FUNCTION__.6809
0000015c r __FUNCTION__.6813
0000016c r __FUNCTION__.6818
00000180 r __FUNCTION__.6822
00000000 T TWI_ByteReceived
00000000 T TWI_ByteSent
00000000 T TWI_ConfigureMaster
00000000 T TWI_ConfigureSlave
00000000 T TWI_DisableIt
00000000 T TWI_EnableIt
00000000 T TWI_GetMaskedStatus
00000000 T TWI_GetStatus
00000000 T TWI_ReadByte
00000000 T TWI_SendSTOPCondition
00000000 T TWI_StartRead
00000000 T TWI_StartWrite
00000000 T TWI_Stop
00000000 T TWI_TransferComplete
00000000 T TWI_WriteByte
pio.o:
00000000 T PIO_Clear
00000000 T PIO_Configure
00000000 T PIO_Get
00000000 T PIO_GetOutputDataStatus
00000000 T PIO_Set
00000000 T PIO_SetDebounceFilter
00000000 t PIO_SetInput
00000000 t PIO_SetOutput
00000000 t PIO_SetPeripheralA
00000000 t PIO_SetPeripheralB
00000000 t PIO_SetPeripheralC
00000000 t PIO_SetPeripheralD
U PMC_EnablePeripheral
async.o:
00000000 T ASYNC_IsFinished
exceptions.o:
00000000 W ACC_IrqHandler
00000000 W ADC_IrqHandler
00000000 W BusFault_Handler
00000000 W CRCCU_IrqHandler
00000000 W DAC_IrqHandler
00000000 W DebugMon_Handler
00000000 W EEFC_IrqHandler
00000000 W HardFault_Handler
00000000 T IrqHandlerNotUsed
00000000 W MCI_IrqHandler
00000000 W MemManage_Handler
00000000 W NMI_Handler
00000000 W PendSV_Handler
00000000 W PIOA_IrqHandler
00000000 W PIOB_IrqHandler
00000000 W PIOC_IrqHandler
00000000 W PMC_IrqHandler
00000000 W PWM_IrqHandler
00000000 W RSTC_IrqHandler
00000000 W RTC_IrqHandler
00000000 W RTT_IrqHandler
00000000 W SMC_IrqHandler
00000000 W SPI_IrqHandler
00000000 W SSC_IrqHandler
00000000 W SUPC_IrqHandler
00000000 W SVC_Handler
00000000 W SysTick_Handler
00000000 W TC0_IrqHandler
00000000 W TC1_IrqHandler
00000000 W TC2_IrqHandler
00000000 W TC3_IrqHandler
00000000 W TC4_IrqHandler
00000000 W TC5_IrqHandler
00000000 W TWI0_IrqHandler
00000000 W TWI1_IrqHandler
00000000 W UART0_IrqHandler
00000000 W UART1_IrqHandler
00000000 W UsageFault_Handler
00000000 W USART0_IrqHandler
00000000 W USART1_IrqHandler
00000000 W USBD_IrqHandler
00000000 W WDT_IrqHandler
adc.o:
00000000 T ADC_CfgChannelMode
00000000 T ADC_cfgFrequency
00000000 T ADC_CfgLowRes
00000000 T ADC_CfgPowerSave
00000000 T ADC_CfgTiming
00000000 T ADC_CfgTrigering
00000000 T ADC_check
00000000 T ADC_GetConvertedData
00000000 T ADC_Initialize
00000000 T ADC_IsChannelInterruptStatusSet
00000000 T ADC_IsInterruptMasked
00000000 T ADC_IsStatusSet
00000000 T ADC_ReadBuffer
00000000 T ADC_SetCompareChannel
00000000 T ADC_SetCompareMode
00000000 T ADC_SetComparisonWindow
U __assert_func
00000000 t calcul_startup
00000118 r __FUNCTION__.6781
00000130 r __FUNCTION__.6786
U iprintf
spi_pdc.o:
U PMC_DisablePeripheral
U PMC_EnablePeripheral
U SPI_Configure
U SPI_ConfigureNPCS
00000000 T SPID_Configure
00000000 T SPID_ConfigureCS
00000000 T SPID_Handler
U SPI_DisableIt
00000000 T SPID_IsBusy
00000000 T SPID_SendCommand
U SPI_Enable
U SPI_EnableIt
U SPI_PdcDisableRx
U SPI_PdcDisableTx
U SPI_PdcEnableRx
U SPI_PdcEnableTx
U SPI_PdcSetRx
U SPI_PdcSetTx
efc.o:
U __assert_func
00000000 T EFC_ComputeAddress
00000000 T EFC_DisableFrdyIt
00000000 T EFC_EnableFrdyIt
00000000 T EFC_GetResult
00000000 T EFC_GetStatus
00000000 T EFC_PerformCommand
00000000 T EFC_SetWaitState
00000000 T EFC_StartCommand
00000000 T EFC_TranslateAddress
00000110 r __FUNCTION__.6765
00000128 r __FUNCTION__.6773
0000013c r __FUNCTION__.6785
00000000 b IAP_PerformCommand.6803
dacc.o:
U __assert_func
00000000 T DACC_Initialize
00000000 T DACC_SetConversionData
00000000 T DACC_WriteBuffer
00000034 r __FUNCTION__.6752
flashd.o:
00000000 b _adwPageBuffer
U __assert_func
00000000 d _aucPageBuffer
00000000 t ComputeLockRange
00000100 b _dwUseIAP
U EFC_ComputeAddress
U EFC_DisableFrdyIt
U EFC_GetResult
U EFC_PerformCommand
U EFC_SetWaitState
U EFC_StartCommand
U EFC_TranslateAddress
00000000 T FLASHD_ClearGPNVM
00000000 T FLASHD_Erase
00000000 T FLASHD_Initialize
00000000 T FLASHD_IsGPNVMSet
00000000 T FLASHD_IsLocked
00000000 T FLASHD_Lock
00000000 T FLASHD_ReadUniqueID
00000000 T FLASHD_SetGPNVM
00000000 T FLASHD_Unlock
00000000 T FLASHD_Write
00000130 r __FUNCTION__.6944
00000140 r __FUNCTION__.6960
00000150 r __FUNCTION__.7012
00000160 r __FUNCTION__.7021
00000174 r __FUNCTION__.7025
00000184 r __FUNCTION__.7029
00000198 r __FUNCTION__.7034
U memcpy
pmc.o:
U __assert_func
00000020 r __FUNCTION__.6742
00000038 r __FUNCTION__.6746
00000050 r __FUNCTION__.6768
00000000 T PMC_DisableAllPeripherals
00000000 T PMC_DisablePeripheral
00000000 T PMC_EnableAllPeripherals
00000000 T PMC_EnablePeripheral
00000000 T PMC_IsPeriphEnabled
twid.o:
U __assert_func
0000014c r __FUNCTION__.6752
0000015c r __FUNCTION__.6759
0000016c r __FUNCTION__.6772
00000178 r __FUNCTION__.6794
U iprintf
U TWI_ByteReceived
U TWI_ByteSent
00000000 T TWID_Handler
00000000 T TWID_Initialize
U TWI_DisableIt
00000000 T TWID_Read
00000000 T TWID_Write
U TWI_EnableIt
U TWI_GetMaskedStatus
U TWI_ReadByte
U TWI_SendSTOPCondition
U TWI_StartRead
U TWI_StartWrite
U TWI_Stop
U TWI_TransferComplete
U TWI_WriteByte
rtt.o:
U __assert_func
0000003c r __FUNCTION__.6750
0000004c r __FUNCTION__.6758
00000000 T RTT_EnableIT
00000000 T RTT_GetStatus
00000000 T RTT_GetTime
00000000 T RTT_SetAlarm
00000000 T RTT_SetPrescaler
spi.o:
U PMC_EnablePeripheral
00000000 T SPI_Configure
00000000 T SPI_ConfigureNPCS
00000000 T SPI_Disable
00000000 T SPI_DisableIt
00000000 T SPI_Enable
00000000 T SPI_EnableIt
00000000 T SPI_GetStatus
00000000 T SPI_IsFinished
00000000 T SPI_PdcDisableRx
00000000 T SPI_PdcDisableTx
00000000 T SPI_PdcEnableRx
00000000 T SPI_PdcEnableTx
00000000 T SPI_PdcSetRx
00000000 T SPI_PdcSetTx
00000000 T SPI_Read
00000000 T SPI_ReadBuffer
00000000 T SPI_Write
00000000 T SPI_WriteBuffer
tc.o:
U __assert_func
0000005c r __FUNCTION__.6745
0000006c r __FUNCTION__.6751
00000078 r __FUNCTION__.6757
00000000 T TC_Configure
00000000 T TC_FindMckDivisor
00000000 T TC_Start
00000000 T TC_Stop
pwmc.o:
U __assert_func
00000000 t FindClockConfiguration
00000200 r __FUNCTION__.6746
00000218 r __FUNCTION__.6757
00000230 r __FUNCTION__.6772
0000024c r __FUNCTION__.6783
00000264 r __FUNCTION__.6794
00000278 r __FUNCTION__.6801
0000028c r __FUNCTION__.6883
000002ac r __FUNCTION__.6889
00000000 T PWMC_ConfigureChannel
00000000 T PWMC_ConfigureChannelExt
00000000 T PWMC_ConfigureClocks
00000000 T PWMC_ConfigureComparisonUnit
00000000 T PWMC_ConfigureEventLineMode
00000000 T PWMC_ConfigureSyncChannel
00000000 T PWMC_DisableChannel
00000000 T PWMC_DisableChannelIt
00000000 T PWMC_DisableIt
00000000 T PWMC_DisableOverrideOutput
00000000 T PWMC_EnableChannel
00000000 T PWMC_EnableChannelIt
00000000 T PWMC_EnableFaultProtection
00000000 T PWMC_EnableIt
00000000 T PWMC_EnableOverrideOutput
00000000 T PWMC_FaultClear
00000000 T PWMC_SetDeadTime
00000000 T PWMC_SetDutyCycle
00000000 T PWMC_SetFaultMode
00000000 T PWMC_SetFaultProtectionValue
00000000 T PWMC_SetOverrideValue
00000000 T PWMC_SetPeriod
00000000 T PWMC_SetSyncChannelUpdatePeriod
00000000 T PWMC_SetSyncChannelUpdateUnlock
00000000 T PWMC_WriteBuffer
rtc.o:
U __assert_func
00000058 r __FUNCTION__.6743
00000068 r __FUNCTION__.6752
00000078 r __FUNCTION__.6757
00000000 T RTC_ClearSCCR
00000000 T RTC_DisableIt
00000000 T RTC_EnableIt
00000000 T RTC_GetDate
00000000 T RTC_GetHourMode
00000000 T RTC_GetSR
00000000 T RTC_GetTime
00000000 T RTC_SetDate
00000000 T RTC_SetDateAlarm
00000000 T RTC_SetHourMode
00000000 T RTC_SetTime
00000000 T RTC_SetTimeAlarm
ssc.o:
00000000 T SSC_Configure
00000000 T SSC_ConfigureReceiver
00000000 T SSC_ConfigureTransmitter
00000000 T SSC_DisableInterrupts
00000000 T SSC_DisableReceiver
00000000 T SSC_DisableTransmitter
00000000 T SSC_EnableInterrupts
00000000 T SSC_EnableReceiver
00000000 T SSC_EnableTransmitter
00000000 T SSC_Read
00000000 T SSC_ReadBuffer
00000000 T SSC_Write
00000000 T SSC_WriteBuffer
pio_capture.o:
U __assert_func
0000008c r __FUNCTION__.6759
00000000 b _PioCaptureCopy
00000000 T PIO_CaptureDisable
00000000 T PIO_CaptureDisableIt
00000000 T PIO_CaptureEnable
00000000 T PIO_CaptureEnableIt
00000000 T PIO_CaptureHandler
00000000 T PIO_CaptureInit
U PMC_EnablePeripheral
usart.o:
U __assert_func
00000068 r __FUNCTION__.6969
U iprintf
00000000 T USART_Configure
00000000 T USART_DisableIt
00000000 T USART_EnableIt
00000000 T USART_GetChar
00000000 T USART_GetStatus
00000000 T USART_IsDataAvailable
00000000 T USART_IsRxReady
00000000 T USART_PutChar
00000000 T USART_Read
00000000 T USART_ReadBuffer
00000000 T USART_SetIrdaFilter
00000000 T USART_SetReceiverEnabled
00000000 T USART_SetTransmitterEnabled
00000000 T USART_Write
00000000 T USART_WriteBuffer
wdt.o:
00000000 T WDT_Disable
00000000 T WDT_Enable
00000000 T WDT_GetPeriod
00000000 T WDT_GetStatus
00000000 T WDT_Restart
core_cm3.o:
00000000 T __get_BASEPRI
00000000 T __get_CONTROL
00000000 T __get_FAULTMASK
00000000 T __get_MSP
00000000 T __get_PRIMASK
00000000 T __get_PSP
00000000 T __LDREXB
00000000 T __LDREXH
00000000 T __LDREXW
00000000 T __RBIT
00000000 T __REV
00000000 T __REV16
00000000 T __REVSH
00000000 T __set_BASEPRI
00000000 T __set_CONTROL
00000000 T __set_FAULTMASK
00000000 T __set_MSP
00000000 T __set_PRIMASK
00000000 T __set_PSP
00000000 T __STREXB
00000000 T __STREXH
00000000 T __STREXW

BIN
firmware/atmel_softpack_libraries/libchip_sam3s/lib/libchip_sam3s1_gcc_rel.a Normal file
View File

Binary file not shown.

460
firmware/atmel_softpack_libraries/libchip_sam3s/lib/libchip_sam3s1_gcc_rel.a.txt Normal file
View File

@@ -0,0 +1,460 @@
USBD_HAL.o:
00000000 b endpoints
U PMC_DisablePeripheral
U PMC_EnablePeripheral
U PMC_IsPeriphEnabled
00000000 t UDP_ClearRxFlag
00000000 t UDP_EnablePeripheralClock
00000000 t UDP_EndOfTransfer
00000000 t UDP_MblWriteFifo
00000000 t UDP_WritePayload
U USBD_GetState
00000000 T USBD_HAL_Activate
00000000 T USBD_HAL_CancelIo
00000000 T USBD_HAL_ConfigureEP
00000000 T USBD_HAL_Connect
00000000 T USBD_HAL_Disconnect
00000000 T USBD_HAL_Halt
00000000 T USBD_HAL_Init
00000000 T USBD_HAL_IsHighSpeed
00000000 T USBD_HAL_Read
00000000 T USBD_HAL_RemoteWakeUp
00000000 T USBD_HAL_ResetEPs
00000000 T USBD_HAL_SetAddress
00000000 T USBD_HAL_SetConfiguration
00000000 T USBD_HAL_SetTransferCallback
00000000 T USBD_HAL_SetupMblTransfer
00000000 T USBD_HAL_Stall
00000000 T USBD_HAL_Suspend
00000000 T USBD_HAL_Write
00000000 T USBD_IrqHandler
U USBD_RequestHandler
U USBD_ResetHandler
U USBD_ResumeHandler
U USBD_SuspendHandler
U USBEndpointDescriptor_GetDirection
U USBEndpointDescriptor_GetMaxPacketSize
U USBEndpointDescriptor_GetNumber
U USBEndpointDescriptor_GetType
U USBGenericRequest_GetDirection
acc.o:
00000000 T ACC_Configure
00000000 T ACC_GetComparisionResult
00000000 T ACC_SetComparisionPair
U __assert_func
00000000 r __FUNCTION__.6748
crccu.o:
00000000 T CRCCU_ComputeCrc
00000000 T CRCCU_Configure
00000000 T CRCCU_ResetCrcValue
pio_it.o:
00000004 b _aIntSources
U __assert_func
00000000 b _dwNumSources
00000000 r __FUNCTION__.6752
00000014 r __FUNCTION__.6775
00000024 r __FUNCTION__.6779
00000031 r __FUNCTION__.6788
00000000 T PIOA_IrqHandler
00000000 T PIOB_IrqHandler
U PIO_CaptureHandler
00000000 T PIOC_IrqHandler
00000000 T PIO_ConfigureIt
00000000 T PIO_DisableIt
00000000 T PIO_EnableIt
00000000 T PIO_InitializeInterrupts
00000000 T PioInterruptHandler
U PMC_EnablePeripheral
twi.o:
U __assert_func
00000000 r __FUNCTION__.6747
00000014 r __FUNCTION__.6762
00000027 r __FUNCTION__.6766
00000030 r __FUNCTION__.6773
0000003e r __FUNCTION__.6777
0000004b r __FUNCTION__.6782
00000059 r __FUNCTION__.6790
00000068 r __FUNCTION__.6804
00000075 r __FUNCTION__.6809
00000083 r __FUNCTION__.6813
00000091 r __FUNCTION__.6818
000000a5 r __FUNCTION__.6822
00000000 T TWI_ByteReceived
00000000 T TWI_ByteSent
00000000 T TWI_ConfigureMaster
00000000 T TWI_ConfigureSlave
00000000 T TWI_DisableIt
00000000 T TWI_EnableIt
00000000 T TWI_GetMaskedStatus
00000000 T TWI_GetStatus
00000000 T TWI_ReadByte
00000000 T TWI_SendSTOPCondition
00000000 T TWI_StartRead
00000000 T TWI_StartWrite
00000000 T TWI_Stop
00000000 T TWI_TransferComplete
00000000 T TWI_WriteByte
pio.o:
00000000 T PIO_Clear
00000000 T PIO_Configure
00000000 T PIO_Get
00000000 T PIO_GetOutputDataStatus
00000000 T PIO_Set
00000000 T PIO_SetDebounceFilter
U PMC_EnablePeripheral
async.o:
00000000 T ASYNC_IsFinished
exceptions.o:
00000000 W ACC_IrqHandler
00000000 W ADC_IrqHandler
00000000 W BusFault_Handler
00000000 W CRCCU_IrqHandler
00000000 W DAC_IrqHandler
00000000 W DebugMon_Handler
00000000 W EEFC_IrqHandler
00000000 W HardFault_Handler
00000000 T IrqHandlerNotUsed
00000000 W MCI_IrqHandler
00000000 W MemManage_Handler
00000000 W NMI_Handler
00000000 W PendSV_Handler
00000000 W PIOA_IrqHandler
00000000 W PIOB_IrqHandler
00000000 W PIOC_IrqHandler
00000000 W PMC_IrqHandler
00000000 W PWM_IrqHandler
00000000 W RSTC_IrqHandler
00000000 W RTC_IrqHandler
00000000 W RTT_IrqHandler
00000000 W SMC_IrqHandler
00000000 W SPI_IrqHandler
00000000 W SSC_IrqHandler
00000000 W SUPC_IrqHandler
00000000 W SVC_Handler
00000000 W SysTick_Handler
00000000 W TC0_IrqHandler
00000000 W TC1_IrqHandler
00000000 W TC2_IrqHandler
00000000 W TC3_IrqHandler
00000000 W TC4_IrqHandler
00000000 W TC5_IrqHandler
00000000 W TWI0_IrqHandler
00000000 W TWI1_IrqHandler
00000000 W UART0_IrqHandler
00000000 W UART1_IrqHandler
00000000 W UsageFault_Handler
00000000 W USART0_IrqHandler
00000000 W USART1_IrqHandler
00000000 W USBD_IrqHandler
00000000 W WDT_IrqHandler
adc.o:
00000000 T ADC_CfgChannelMode
00000000 T ADC_cfgFrequency
00000000 T ADC_CfgLowRes
00000000 T ADC_CfgPowerSave
00000000 T ADC_CfgTiming
00000000 T ADC_CfgTrigering
00000000 T ADC_check
00000000 T ADC_GetConvertedData
00000000 T ADC_Initialize
00000000 T ADC_IsChannelInterruptStatusSet
00000000 T ADC_IsInterruptMasked
00000000 T ADC_IsStatusSet
00000000 T ADC_ReadBuffer
00000000 T ADC_SetCompareChannel
00000000 T ADC_SetCompareMode
00000000 T ADC_SetComparisonWindow
U __assert_func
00000000 t calcul_startup
00000000 r __FUNCTION__.6781
00000015 r __FUNCTION__.6786
U iprintf
spi_pdc.o:
U PMC_DisablePeripheral
U PMC_EnablePeripheral
U SPI_Configure
U SPI_ConfigureNPCS
00000000 T SPID_Configure
00000000 T SPID_ConfigureCS
00000000 T SPID_Handler
U SPI_DisableIt
00000000 T SPID_IsBusy
00000000 T SPID_SendCommand
U SPI_Enable
U SPI_EnableIt
U SPI_PdcDisableRx
U SPI_PdcDisableTx
U SPI_PdcEnableRx
U SPI_PdcEnableTx
U SPI_PdcSetRx
U SPI_PdcSetTx
efc.o:
U __assert_func
00000000 T EFC_ComputeAddress
00000000 T EFC_DisableFrdyIt
00000000 T EFC_EnableFrdyIt
00000000 T EFC_GetResult
00000000 T EFC_GetStatus
00000000 T EFC_PerformCommand
00000000 T EFC_SetWaitState
00000000 T EFC_StartCommand
00000000 T EFC_TranslateAddress
00000000 r __FUNCTION__.6765
00000015 r __FUNCTION__.6773
00000028 r __FUNCTION__.6785
00000000 b IAP_PerformCommand.6803
dacc.o:
U __assert_func
00000000 T DACC_Initialize
00000000 T DACC_SetConversionData
00000000 T DACC_WriteBuffer
00000000 r __FUNCTION__.6752
flashd.o:
00000004 b _adwPageBuffer
U __assert_func
00000000 t ComputeLockRange
00000000 b _dwUseIAP
U EFC_ComputeAddress
U EFC_DisableFrdyIt
U EFC_GetResult
U EFC_PerformCommand
U EFC_SetWaitState
U EFC_StartCommand
U EFC_TranslateAddress
00000000 T FLASHD_ClearGPNVM
00000000 T FLASHD_Erase
00000000 T FLASHD_Initialize
00000000 T FLASHD_IsGPNVMSet
00000000 T FLASHD_IsLocked
00000000 T FLASHD_Lock
00000000 T FLASHD_ReadUniqueID
00000000 T FLASHD_SetGPNVM
00000000 T FLASHD_Unlock
00000000 T FLASHD_Write
00000000 r __FUNCTION__.6960
0000000d r __FUNCTION__.7012
0000001d r __FUNCTION__.7021
0000002f r __FUNCTION__.7025
0000003f r __FUNCTION__.7029
00000051 r __FUNCTION__.7034
U memcpy
pmc.o:
U __assert_func
00000000 r __FUNCTION__.6742
00000015 r __FUNCTION__.6746
0000002b r __FUNCTION__.6768
00000000 T PMC_DisableAllPeripherals
00000000 T PMC_DisablePeripheral
00000000 T PMC_EnableAllPeripherals
00000000 T PMC_EnablePeripheral
00000000 T PMC_IsPeriphEnabled
twid.o:
U __assert_func
00000000 r __FUNCTION__.6752
00000010 r __FUNCTION__.6759
0000001d r __FUNCTION__.6772
00000027 r __FUNCTION__.6794
U TWI_ByteReceived
U TWI_ByteSent
00000000 T TWID_Handler
00000000 T TWID_Initialize
U TWI_DisableIt
00000000 T TWID_Read
00000000 T TWID_Write
U TWI_EnableIt
U TWI_GetMaskedStatus
U TWI_ReadByte
U TWI_SendSTOPCondition
U TWI_StartRead
U TWI_StartWrite
U TWI_Stop
U TWI_TransferComplete
U TWI_WriteByte
rtt.o:
U __assert_func
00000000 r __FUNCTION__.6750
0000000d r __FUNCTION__.6758
00000000 T RTT_EnableIT
00000000 T RTT_GetStatus
00000000 T RTT_GetTime
00000000 T RTT_SetAlarm
00000000 T RTT_SetPrescaler
spi.o:
U PMC_EnablePeripheral
00000000 T SPI_Configure
00000000 T SPI_ConfigureNPCS
00000000 T SPI_Disable
00000000 T SPI_DisableIt
00000000 T SPI_Enable
00000000 T SPI_EnableIt
00000000 T SPI_GetStatus
00000000 T SPI_IsFinished
00000000 T SPI_PdcDisableRx
00000000 T SPI_PdcDisableTx
00000000 T SPI_PdcEnableRx
00000000 T SPI_PdcEnableTx
00000000 T SPI_PdcSetRx
00000000 T SPI_PdcSetTx
00000000 T SPI_Read
00000000 T SPI_ReadBuffer
00000000 T SPI_Write
00000000 T SPI_WriteBuffer
tc.o:
U __assert_func
00000000 r __FUNCTION__.6745
0000000d r __FUNCTION__.6751
00000016 r __FUNCTION__.6757
00000000 T TC_Configure
00000000 T TC_FindMckDivisor
00000000 T TC_Start
00000000 T TC_Stop
pwmc.o:
U __assert_func
00000000 t FindClockConfiguration
0000002c r __FUNCTION__.6746
00000043 r __FUNCTION__.6757
00000059 r __FUNCTION__.6772
00000072 r __FUNCTION__.6783
00000087 r __FUNCTION__.6794
00000099 r __FUNCTION__.6801
000000aa r __FUNCTION__.6883
000000c7 r __FUNCTION__.6889
00000000 T PWMC_ConfigureChannel
00000000 T PWMC_ConfigureChannelExt
00000000 T PWMC_ConfigureClocks
00000000 T PWMC_ConfigureComparisonUnit
00000000 T PWMC_ConfigureEventLineMode
00000000 T PWMC_ConfigureSyncChannel
00000000 T PWMC_DisableChannel
00000000 T PWMC_DisableChannelIt
00000000 T PWMC_DisableIt
00000000 T PWMC_DisableOverrideOutput
00000000 T PWMC_EnableChannel
00000000 T PWMC_EnableChannelIt
00000000 T PWMC_EnableFaultProtection
00000000 T PWMC_EnableIt
00000000 T PWMC_EnableOverrideOutput
00000000 T PWMC_FaultClear
00000000 T PWMC_SetDeadTime
00000000 T PWMC_SetDutyCycle
00000000 T PWMC_SetFaultMode
00000000 T PWMC_SetFaultProtectionValue
00000000 T PWMC_SetOverrideValue
00000000 T PWMC_SetPeriod
00000000 T PWMC_SetSyncChannelUpdatePeriod
00000000 T PWMC_SetSyncChannelUpdateUnlock
00000000 T PWMC_WriteBuffer
rtc.o:
U __assert_func
00000000 r __FUNCTION__.6743
00000010 r __FUNCTION__.6752
0000001d r __FUNCTION__.6757
00000000 T RTC_ClearSCCR
00000000 T RTC_DisableIt
00000000 T RTC_EnableIt
00000000 T RTC_GetDate
00000000 T RTC_GetHourMode
00000000 T RTC_GetSR
00000000 T RTC_GetTime
00000000 T RTC_SetDate
00000000 T RTC_SetDateAlarm
00000000 T RTC_SetHourMode
00000000 T RTC_SetTime
00000000 T RTC_SetTimeAlarm
ssc.o:
00000000 T SSC_Configure
00000000 T SSC_ConfigureReceiver
00000000 T SSC_ConfigureTransmitter
00000000 T SSC_DisableInterrupts
00000000 T SSC_DisableReceiver
00000000 T SSC_DisableTransmitter
00000000 T SSC_EnableInterrupts
00000000 T SSC_EnableReceiver
00000000 T SSC_EnableTransmitter
00000000 T SSC_Read
00000000 T SSC_ReadBuffer
00000000 T SSC_Write
00000000 T SSC_WriteBuffer
pio_capture.o:
U __assert_func
00000000 r __FUNCTION__.6759
00000000 b _PioCaptureCopy
00000000 T PIO_CaptureDisable
00000000 T PIO_CaptureDisableIt
00000000 T PIO_CaptureEnable
00000000 T PIO_CaptureEnableIt
00000000 T PIO_CaptureHandler
00000000 T PIO_CaptureInit
U PMC_EnablePeripheral
usart.o:
U __assert_func
00000000 r __FUNCTION__.6969
00000000 T USART_Configure
00000000 T USART_DisableIt
00000000 T USART_EnableIt
00000000 T USART_GetChar
00000000 T USART_GetStatus
00000000 T USART_IsDataAvailable
00000000 T USART_IsRxReady
00000000 T USART_PutChar
00000000 T USART_Read
00000000 T USART_ReadBuffer
00000000 T USART_SetIrdaFilter
00000000 T USART_SetReceiverEnabled
00000000 T USART_SetTransmitterEnabled
00000000 T USART_Write
00000000 T USART_WriteBuffer
wdt.o:
00000000 T WDT_Disable
00000000 T WDT_Enable
00000000 T WDT_GetPeriod
00000000 T WDT_GetStatus
00000000 T WDT_Restart
core_cm3.o:
00000000 T __get_BASEPRI
00000000 T __get_CONTROL
00000000 T __get_FAULTMASK
00000000 T __get_MSP
00000000 T __get_PRIMASK
00000000 T __get_PSP
00000000 T __LDREXB
00000000 T __LDREXH
00000000 T __LDREXW
00000000 T __RBIT
00000000 T __REV
00000000 T __REV16
00000000 T __REVSH
00000000 T __set_BASEPRI
00000000 T __set_CONTROL
00000000 T __set_FAULTMASK
00000000 T __set_MSP
00000000 T __set_PRIMASK
00000000 T __set_PSP
00000000 T __STREXB
00000000 T __STREXH
00000000 T __STREXW

BIN
firmware/atmel_softpack_libraries/libchip_sam3s/lib/libchip_sam3s2_gcc_dbg.a Normal file
View File

Binary file not shown.

488
firmware/atmel_softpack_libraries/libchip_sam3s/lib/libchip_sam3s2_gcc_dbg.a.txt Normal file
View File

@@ -0,0 +1,488 @@
USBD_HAL.o:
00000000 b endpoints
U iprintf
U PMC_DisablePeripheral
U PMC_EnablePeripheral
U PMC_IsPeriphEnabled
00000000 t UDP_AddWr
00000000 t UDP_ClearRxFlag
00000000 t UDP_DisablePeripheralClock
00000000 t UDP_DisableTransceiver
00000000 t UDP_DisableUsbClock
00000000 t UDP_EnablePeripheralClock
00000000 t UDP_EnableTransceiver
00000000 t UDP_EnableUsbClock
00000000 t UDP_EndOfTransfer
00000000 t UDP_EndpointHandler
00000000 t UDP_IsTransferFinished
00000000 t UDP_MblUpdate
00000000 t UDP_MblWriteFifo
00000000 t UDP_Read
00000000 t UDP_ReadPayload
00000000 t UDP_ReadRequest
00000000 t UDP_Write
00000000 t UDP_WritePayload
U USBD_GetState
00000000 T USBD_HAL_Activate
00000000 T USBD_HAL_CancelIo
00000000 T USBD_HAL_ConfigureEP
00000000 T USBD_HAL_Connect
00000000 T USBD_HAL_Disconnect
00000000 T USBD_HAL_Halt
00000000 T USBD_HAL_Init
00000000 T USBD_HAL_IsHighSpeed
00000000 T USBD_HAL_Read
00000000 T USBD_HAL_RemoteWakeUp
00000000 T USBD_HAL_ResetEPs
00000000 T USBD_HAL_SetAddress
00000000 T USBD_HAL_SetConfiguration
00000000 T USBD_HAL_SetTransferCallback
00000000 T USBD_HAL_SetupMblTransfer
00000000 T USBD_HAL_Stall
00000000 T USBD_HAL_Suspend
00000000 T USBD_HAL_Write
00000000 T USBD_IrqHandler
U USBD_RequestHandler
U USBD_ResetHandler
U USBD_ResumeHandler
U USBD_SuspendHandler
U USBEndpointDescriptor_GetDirection
U USBEndpointDescriptor_GetMaxPacketSize
U USBEndpointDescriptor_GetNumber
U USBEndpointDescriptor_GetType
U USBGenericRequest_GetDirection
acc.o:
00000000 T ACC_Configure
00000000 T ACC_GetComparisionResult
00000000 T ACC_SetComparisionPair
U __assert_func
00000034 r __FUNCTION__.6748
crccu.o:
00000000 T CRCCU_ComputeCrc
00000000 T CRCCU_Configure
00000000 T CRCCU_ResetCrcValue
pio_it.o:
00000000 b _aIntSources
U __assert_func
00000038 b _dwNumSources
0000007c r __FUNCTION__.6752
00000090 r __FUNCTION__.6775
000000a0 r __FUNCTION__.6779
000000b0 r __FUNCTION__.6788
00000000 t NVIC_ClearPendingIRQ
00000000 t NVIC_DisableIRQ
00000000 t NVIC_EnableIRQ
00000000 t NVIC_SetPriority
00000000 T PIOA_IrqHandler
00000000 T PIOB_IrqHandler
U PIO_CaptureHandler
00000000 T PIOC_IrqHandler
00000000 T PIO_ConfigureIt
00000000 T PIO_DisableIt
00000000 T PIO_EnableIt
00000000 T PIO_InitializeInterrupts
00000000 T PioInterruptHandler
U PMC_EnablePeripheral
twi.o:
U __assert_func
000000c8 r __FUNCTION__.6747
000000dc r __FUNCTION__.6762
000000f0 r __FUNCTION__.6766
000000fc r __FUNCTION__.6773
0000010c r __FUNCTION__.6777
0000011c r __FUNCTION__.6782
0000012c r __FUNCTION__.6790
0000013c r __FUNCTION__.6804
0000014c r __FUNCTION__.6809
0000015c r __FUNCTION__.6813
0000016c r __FUNCTION__.6818
00000180 r __FUNCTION__.6822
00000000 T TWI_ByteReceived
00000000 T TWI_ByteSent
00000000 T TWI_ConfigureMaster
00000000 T TWI_ConfigureSlave
00000000 T TWI_DisableIt
00000000 T TWI_EnableIt
00000000 T TWI_GetMaskedStatus
00000000 T TWI_GetStatus
00000000 T TWI_ReadByte
00000000 T TWI_SendSTOPCondition
00000000 T TWI_StartRead
00000000 T TWI_StartWrite
00000000 T TWI_Stop
00000000 T TWI_TransferComplete
00000000 T TWI_WriteByte
pio.o:
00000000 T PIO_Clear
00000000 T PIO_Configure
00000000 T PIO_Get
00000000 T PIO_GetOutputDataStatus
00000000 T PIO_Set
00000000 T PIO_SetDebounceFilter
00000000 t PIO_SetInput
00000000 t PIO_SetOutput
00000000 t PIO_SetPeripheralA
00000000 t PIO_SetPeripheralB
00000000 t PIO_SetPeripheralC
00000000 t PIO_SetPeripheralD
U PMC_EnablePeripheral
async.o:
00000000 T ASYNC_IsFinished
exceptions.o:
00000000 W ACC_IrqHandler
00000000 W ADC_IrqHandler
00000000 W BusFault_Handler
00000000 W CRCCU_IrqHandler
00000000 W DAC_IrqHandler
00000000 W DebugMon_Handler
00000000 W EEFC_IrqHandler
00000000 W HardFault_Handler
00000000 T IrqHandlerNotUsed
00000000 W MCI_IrqHandler
00000000 W MemManage_Handler
00000000 W NMI_Handler
00000000 W PendSV_Handler
00000000 W PIOA_IrqHandler
00000000 W PIOB_IrqHandler
00000000 W PIOC_IrqHandler
00000000 W PMC_IrqHandler
00000000 W PWM_IrqHandler
00000000 W RSTC_IrqHandler
00000000 W RTC_IrqHandler
00000000 W RTT_IrqHandler
00000000 W SMC_IrqHandler
00000000 W SPI_IrqHandler
00000000 W SSC_IrqHandler
00000000 W SUPC_IrqHandler
00000000 W SVC_Handler
00000000 W SysTick_Handler
00000000 W TC0_IrqHandler
00000000 W TC1_IrqHandler
00000000 W TC2_IrqHandler
00000000 W TC3_IrqHandler
00000000 W TC4_IrqHandler
00000000 W TC5_IrqHandler
00000000 W TWI0_IrqHandler
00000000 W TWI1_IrqHandler
00000000 W UART0_IrqHandler
00000000 W UART1_IrqHandler
00000000 W UsageFault_Handler
00000000 W USART0_IrqHandler
00000000 W USART1_IrqHandler
00000000 W USBD_IrqHandler
00000000 W WDT_IrqHandler
adc.o:
00000000 T ADC_CfgChannelMode
00000000 T ADC_cfgFrequency
00000000 T ADC_CfgLowRes
00000000 T ADC_CfgPowerSave
00000000 T ADC_CfgTiming
00000000 T ADC_CfgTrigering
00000000 T ADC_check
00000000 T ADC_GetConvertedData
00000000 T ADC_Initialize
00000000 T ADC_IsChannelInterruptStatusSet
00000000 T ADC_IsInterruptMasked
00000000 T ADC_IsStatusSet
00000000 T ADC_ReadBuffer
00000000 T ADC_SetCompareChannel
00000000 T ADC_SetCompareMode
00000000 T ADC_SetComparisonWindow
U __assert_func
00000000 t calcul_startup
00000118 r __FUNCTION__.6781
00000130 r __FUNCTION__.6786
U iprintf
spi_pdc.o:
U PMC_DisablePeripheral
U PMC_EnablePeripheral
U SPI_Configure
U SPI_ConfigureNPCS
00000000 T SPID_Configure
00000000 T SPID_ConfigureCS
00000000 T SPID_Handler
U SPI_DisableIt
00000000 T SPID_IsBusy
00000000 T SPID_SendCommand
U SPI_Enable
U SPI_EnableIt
U SPI_PdcDisableRx
U SPI_PdcDisableTx
U SPI_PdcEnableRx
U SPI_PdcEnableTx
U SPI_PdcSetRx
U SPI_PdcSetTx
efc.o:
U __assert_func
00000000 T EFC_ComputeAddress
00000000 T EFC_DisableFrdyIt
00000000 T EFC_EnableFrdyIt
00000000 T EFC_GetResult
00000000 T EFC_GetStatus
00000000 T EFC_PerformCommand
00000000 T EFC_SetWaitState
00000000 T EFC_StartCommand
00000000 T EFC_TranslateAddress
00000110 r __FUNCTION__.6765
00000128 r __FUNCTION__.6773
0000013c r __FUNCTION__.6785
00000000 b IAP_PerformCommand.6803
dacc.o:
U __assert_func
00000000 T DACC_Initialize
00000000 T DACC_SetConversionData
00000000 T DACC_WriteBuffer
00000034 r __FUNCTION__.6752
flashd.o:
00000000 b _adwPageBuffer
U __assert_func
00000000 d _aucPageBuffer
00000000 t ComputeLockRange
00000100 b _dwUseIAP
U EFC_ComputeAddress
U EFC_DisableFrdyIt
U EFC_GetResult
U EFC_PerformCommand
U EFC_SetWaitState
U EFC_StartCommand
U EFC_TranslateAddress
00000000 T FLASHD_ClearGPNVM
00000000 T FLASHD_Erase
00000000 T FLASHD_Initialize
00000000 T FLASHD_IsGPNVMSet
00000000 T FLASHD_IsLocked
00000000 T FLASHD_Lock
00000000 T FLASHD_ReadUniqueID
00000000 T FLASHD_SetGPNVM
00000000 T FLASHD_Unlock
00000000 T FLASHD_Write
00000130 r __FUNCTION__.6944
00000140 r __FUNCTION__.6960
00000150 r __FUNCTION__.7012
00000160 r __FUNCTION__.7021
00000174 r __FUNCTION__.7025
00000184 r __FUNCTION__.7029
00000198 r __FUNCTION__.7034
U memcpy
pmc.o:
U __assert_func
00000020 r __FUNCTION__.6742
00000038 r __FUNCTION__.6746
00000050 r __FUNCTION__.6768
00000000 T PMC_DisableAllPeripherals
00000000 T PMC_DisablePeripheral
00000000 T PMC_EnableAllPeripherals
00000000 T PMC_EnablePeripheral
00000000 T PMC_IsPeriphEnabled
twid.o:
U __assert_func
0000014c r __FUNCTION__.6752
0000015c r __FUNCTION__.6759
0000016c r __FUNCTION__.6772
00000178 r __FUNCTION__.6794
U iprintf
U TWI_ByteReceived
U TWI_ByteSent
00000000 T TWID_Handler
00000000 T TWID_Initialize
U TWI_DisableIt
00000000 T TWID_Read
00000000 T TWID_Write
U TWI_EnableIt
U TWI_GetMaskedStatus
U TWI_ReadByte
U TWI_SendSTOPCondition
U TWI_StartRead
U TWI_StartWrite
U TWI_Stop
U TWI_TransferComplete
U TWI_WriteByte
rtt.o:
U __assert_func
0000003c r __FUNCTION__.6750
0000004c r __FUNCTION__.6758
00000000 T RTT_EnableIT
00000000 T RTT_GetStatus
00000000 T RTT_GetTime
00000000 T RTT_SetAlarm
00000000 T RTT_SetPrescaler
spi.o:
U PMC_EnablePeripheral
00000000 T SPI_Configure
00000000 T SPI_ConfigureNPCS
00000000 T SPI_Disable
00000000 T SPI_DisableIt
00000000 T SPI_Enable
00000000 T SPI_EnableIt
00000000 T SPI_GetStatus
00000000 T SPI_IsFinished
00000000 T SPI_PdcDisableRx
00000000 T SPI_PdcDisableTx
00000000 T SPI_PdcEnableRx
00000000 T SPI_PdcEnableTx
00000000 T SPI_PdcSetRx
00000000 T SPI_PdcSetTx
00000000 T SPI_Read
00000000 T SPI_ReadBuffer
00000000 T SPI_Write
00000000 T SPI_WriteBuffer
tc.o:
U __assert_func
0000005c r __FUNCTION__.6745
0000006c r __FUNCTION__.6751
00000078 r __FUNCTION__.6757
00000000 T TC_Configure
00000000 T TC_FindMckDivisor
00000000 T TC_Start
00000000 T TC_Stop
pwmc.o:
U __assert_func
00000000 t FindClockConfiguration
00000200 r __FUNCTION__.6746
00000218 r __FUNCTION__.6757
00000230 r __FUNCTION__.6772
0000024c r __FUNCTION__.6783
00000264 r __FUNCTION__.6794
00000278 r __FUNCTION__.6801
0000028c r __FUNCTION__.6883
000002ac r __FUNCTION__.6889
00000000 T PWMC_ConfigureChannel
00000000 T PWMC_ConfigureChannelExt
00000000 T PWMC_ConfigureClocks
00000000 T PWMC_ConfigureComparisonUnit
00000000 T PWMC_ConfigureEventLineMode
00000000 T PWMC_ConfigureSyncChannel
00000000 T PWMC_DisableChannel
00000000 T PWMC_DisableChannelIt
00000000 T PWMC_DisableIt
00000000 T PWMC_DisableOverrideOutput
00000000 T PWMC_EnableChannel
00000000 T PWMC_EnableChannelIt
00000000 T PWMC_EnableFaultProtection
00000000 T PWMC_EnableIt
00000000 T PWMC_EnableOverrideOutput
00000000 T PWMC_FaultClear
00000000 T PWMC_SetDeadTime
00000000 T PWMC_SetDutyCycle
00000000 T PWMC_SetFaultMode
00000000 T PWMC_SetFaultProtectionValue
00000000 T PWMC_SetOverrideValue
00000000 T PWMC_SetPeriod
00000000 T PWMC_SetSyncChannelUpdatePeriod
00000000 T PWMC_SetSyncChannelUpdateUnlock
00000000 T PWMC_WriteBuffer
rtc.o:
U __assert_func
00000058 r __FUNCTION__.6743
00000068 r __FUNCTION__.6752
00000078 r __FUNCTION__.6757
00000000 T RTC_ClearSCCR
00000000 T RTC_DisableIt
00000000 T RTC_EnableIt
00000000 T RTC_GetDate
00000000 T RTC_GetHourMode
00000000 T RTC_GetSR
00000000 T RTC_GetTime
00000000 T RTC_SetDate
00000000 T RTC_SetDateAlarm
00000000 T RTC_SetHourMode
00000000 T RTC_SetTime
00000000 T RTC_SetTimeAlarm
ssc.o:
00000000 T SSC_Configure
00000000 T SSC_ConfigureReceiver
00000000 T SSC_ConfigureTransmitter
00000000 T SSC_DisableInterrupts
00000000 T SSC_DisableReceiver
00000000 T SSC_DisableTransmitter
00000000 T SSC_EnableInterrupts
00000000 T SSC_EnableReceiver
00000000 T SSC_EnableTransmitter
00000000 T SSC_Read
00000000 T SSC_ReadBuffer
00000000 T SSC_Write
00000000 T SSC_WriteBuffer
pio_capture.o:
U __assert_func
0000008c r __FUNCTION__.6759
00000000 b _PioCaptureCopy
00000000 T PIO_CaptureDisable
00000000 T PIO_CaptureDisableIt
00000000 T PIO_CaptureEnable
00000000 T PIO_CaptureEnableIt
00000000 T PIO_CaptureHandler
00000000 T PIO_CaptureInit
U PMC_EnablePeripheral
usart.o:
U __assert_func
00000068 r __FUNCTION__.6969
U iprintf
00000000 T USART_Configure
00000000 T USART_DisableIt
00000000 T USART_EnableIt
00000000 T USART_GetChar
00000000 T USART_GetStatus
00000000 T USART_IsDataAvailable
00000000 T USART_IsRxReady
00000000 T USART_PutChar
00000000 T USART_Read
00000000 T USART_ReadBuffer
00000000 T USART_SetIrdaFilter
00000000 T USART_SetReceiverEnabled
00000000 T USART_SetTransmitterEnabled
00000000 T USART_Write
00000000 T USART_WriteBuffer
wdt.o:
00000000 T WDT_Disable
00000000 T WDT_Enable
00000000 T WDT_GetPeriod
00000000 T WDT_GetStatus
00000000 T WDT_Restart
core_cm3.o:
00000000 T __get_BASEPRI
00000000 T __get_CONTROL
00000000 T __get_FAULTMASK
00000000 T __get_MSP
00000000 T __get_PRIMASK
00000000 T __get_PSP
00000000 T __LDREXB
00000000 T __LDREXH
00000000 T __LDREXW
00000000 T __RBIT
00000000 T __REV
00000000 T __REV16
00000000 T __REVSH
00000000 T __set_BASEPRI
00000000 T __set_CONTROL
00000000 T __set_FAULTMASK
00000000 T __set_MSP
00000000 T __set_PRIMASK
00000000 T __set_PSP
00000000 T __STREXB
00000000 T __STREXH
00000000 T __STREXW

BIN
firmware/atmel_softpack_libraries/libchip_sam3s/lib/libchip_sam3s2_gcc_rel.a Normal file
View File

Binary file not shown.

460
firmware/atmel_softpack_libraries/libchip_sam3s/lib/libchip_sam3s2_gcc_rel.a.txt Normal file
View File

@@ -0,0 +1,460 @@
USBD_HAL.o:
00000000 b endpoints
U PMC_DisablePeripheral
U PMC_EnablePeripheral
U PMC_IsPeriphEnabled
00000000 t UDP_ClearRxFlag
00000000 t UDP_EnablePeripheralClock
00000000 t UDP_EndOfTransfer
00000000 t UDP_MblWriteFifo
00000000 t UDP_WritePayload
U USBD_GetState
00000000 T USBD_HAL_Activate
00000000 T USBD_HAL_CancelIo
00000000 T USBD_HAL_ConfigureEP
00000000 T USBD_HAL_Connect
00000000 T USBD_HAL_Disconnect
00000000 T USBD_HAL_Halt
00000000 T USBD_HAL_Init
00000000 T USBD_HAL_IsHighSpeed
00000000 T USBD_HAL_Read
00000000 T USBD_HAL_RemoteWakeUp
00000000 T USBD_HAL_ResetEPs
00000000 T USBD_HAL_SetAddress
00000000 T USBD_HAL_SetConfiguration
00000000 T USBD_HAL_SetTransferCallback
00000000 T USBD_HAL_SetupMblTransfer
00000000 T USBD_HAL_Stall
00000000 T USBD_HAL_Suspend
00000000 T USBD_HAL_Write
00000000 T USBD_IrqHandler
U USBD_RequestHandler
U USBD_ResetHandler
U USBD_ResumeHandler
U USBD_SuspendHandler
U USBEndpointDescriptor_GetDirection
U USBEndpointDescriptor_GetMaxPacketSize
U USBEndpointDescriptor_GetNumber
U USBEndpointDescriptor_GetType
U USBGenericRequest_GetDirection
acc.o:
00000000 T ACC_Configure
00000000 T ACC_GetComparisionResult
00000000 T ACC_SetComparisionPair
U __assert_func
00000000 r __FUNCTION__.6748
crccu.o:
00000000 T CRCCU_ComputeCrc
00000000 T CRCCU_Configure
00000000 T CRCCU_ResetCrcValue
pio_it.o:
00000004 b _aIntSources
U __assert_func
00000000 b _dwNumSources
00000000 r __FUNCTION__.6752
00000014 r __FUNCTION__.6775
00000024 r __FUNCTION__.6779
00000031 r __FUNCTION__.6788
00000000 T PIOA_IrqHandler
00000000 T PIOB_IrqHandler
U PIO_CaptureHandler
00000000 T PIOC_IrqHandler
00000000 T PIO_ConfigureIt
00000000 T PIO_DisableIt
00000000 T PIO_EnableIt
00000000 T PIO_InitializeInterrupts
00000000 T PioInterruptHandler
U PMC_EnablePeripheral
twi.o:
U __assert_func
00000000 r __FUNCTION__.6747
00000014 r __FUNCTION__.6762
00000027 r __FUNCTION__.6766
00000030 r __FUNCTION__.6773
0000003e r __FUNCTION__.6777
0000004b r __FUNCTION__.6782
00000059 r __FUNCTION__.6790
00000068 r __FUNCTION__.6804
00000075 r __FUNCTION__.6809
00000083 r __FUNCTION__.6813
00000091 r __FUNCTION__.6818
000000a5 r __FUNCTION__.6822
00000000 T TWI_ByteReceived
00000000 T TWI_ByteSent
00000000 T TWI_ConfigureMaster
00000000 T TWI_ConfigureSlave
00000000 T TWI_DisableIt
00000000 T TWI_EnableIt
00000000 T TWI_GetMaskedStatus
00000000 T TWI_GetStatus
00000000 T TWI_ReadByte
00000000 T TWI_SendSTOPCondition
00000000 T TWI_StartRead
00000000 T TWI_StartWrite
00000000 T TWI_Stop
00000000 T TWI_TransferComplete
00000000 T TWI_WriteByte
pio.o:
00000000 T PIO_Clear
00000000 T PIO_Configure
00000000 T PIO_Get
00000000 T PIO_GetOutputDataStatus
00000000 T PIO_Set
00000000 T PIO_SetDebounceFilter
U PMC_EnablePeripheral
async.o:
00000000 T ASYNC_IsFinished
exceptions.o:
00000000 W ACC_IrqHandler
00000000 W ADC_IrqHandler
00000000 W BusFault_Handler
00000000 W CRCCU_IrqHandler
00000000 W DAC_IrqHandler
00000000 W DebugMon_Handler
00000000 W EEFC_IrqHandler
00000000 W HardFault_Handler
00000000 T IrqHandlerNotUsed
00000000 W MCI_IrqHandler
00000000 W MemManage_Handler
00000000 W NMI_Handler
00000000 W PendSV_Handler
00000000 W PIOA_IrqHandler
00000000 W PIOB_IrqHandler
00000000 W PIOC_IrqHandler
00000000 W PMC_IrqHandler
00000000 W PWM_IrqHandler
00000000 W RSTC_IrqHandler
00000000 W RTC_IrqHandler
00000000 W RTT_IrqHandler
00000000 W SMC_IrqHandler
00000000 W SPI_IrqHandler
00000000 W SSC_IrqHandler
00000000 W SUPC_IrqHandler
00000000 W SVC_Handler
00000000 W SysTick_Handler
00000000 W TC0_IrqHandler
00000000 W TC1_IrqHandler
00000000 W TC2_IrqHandler
00000000 W TC3_IrqHandler
00000000 W TC4_IrqHandler
00000000 W TC5_IrqHandler
00000000 W TWI0_IrqHandler
00000000 W TWI1_IrqHandler
00000000 W UART0_IrqHandler
00000000 W UART1_IrqHandler
00000000 W UsageFault_Handler
00000000 W USART0_IrqHandler
00000000 W USART1_IrqHandler
00000000 W USBD_IrqHandler
00000000 W WDT_IrqHandler
adc.o:
00000000 T ADC_CfgChannelMode
00000000 T ADC_cfgFrequency
00000000 T ADC_CfgLowRes
00000000 T ADC_CfgPowerSave
00000000 T ADC_CfgTiming
00000000 T ADC_CfgTrigering
00000000 T ADC_check
00000000 T ADC_GetConvertedData
00000000 T ADC_Initialize
00000000 T ADC_IsChannelInterruptStatusSet
00000000 T ADC_IsInterruptMasked
00000000 T ADC_IsStatusSet
00000000 T ADC_ReadBuffer
00000000 T ADC_SetCompareChannel
00000000 T ADC_SetCompareMode
00000000 T ADC_SetComparisonWindow
U __assert_func
00000000 t calcul_startup
00000000 r __FUNCTION__.6781
00000015 r __FUNCTION__.6786
U iprintf
spi_pdc.o:
U PMC_DisablePeripheral
U PMC_EnablePeripheral
U SPI_Configure
U SPI_ConfigureNPCS
00000000 T SPID_Configure
00000000 T SPID_ConfigureCS
00000000 T SPID_Handler
U SPI_DisableIt
00000000 T SPID_IsBusy
00000000 T SPID_SendCommand
U SPI_Enable
U SPI_EnableIt
U SPI_PdcDisableRx
U SPI_PdcDisableTx
U SPI_PdcEnableRx
U SPI_PdcEnableTx
U SPI_PdcSetRx
U SPI_PdcSetTx
efc.o:
U __assert_func
00000000 T EFC_ComputeAddress
00000000 T EFC_DisableFrdyIt
00000000 T EFC_EnableFrdyIt
00000000 T EFC_GetResult
00000000 T EFC_GetStatus
00000000 T EFC_PerformCommand
00000000 T EFC_SetWaitState
00000000 T EFC_StartCommand
00000000 T EFC_TranslateAddress
00000000 r __FUNCTION__.6765
00000015 r __FUNCTION__.6773
00000028 r __FUNCTION__.6785
00000000 b IAP_PerformCommand.6803
dacc.o:
U __assert_func
00000000 T DACC_Initialize
00000000 T DACC_SetConversionData
00000000 T DACC_WriteBuffer
00000000 r __FUNCTION__.6752
flashd.o:
00000004 b _adwPageBuffer
U __assert_func
00000000 t ComputeLockRange
00000000 b _dwUseIAP
U EFC_ComputeAddress
U EFC_DisableFrdyIt
U EFC_GetResult
U EFC_PerformCommand
U EFC_SetWaitState
U EFC_StartCommand
U EFC_TranslateAddress
00000000 T FLASHD_ClearGPNVM
00000000 T FLASHD_Erase
00000000 T FLASHD_Initialize
00000000 T FLASHD_IsGPNVMSet
00000000 T FLASHD_IsLocked
00000000 T FLASHD_Lock
00000000 T FLASHD_ReadUniqueID
00000000 T FLASHD_SetGPNVM
00000000 T FLASHD_Unlock
00000000 T FLASHD_Write
00000000 r __FUNCTION__.6960
0000000d r __FUNCTION__.7012
0000001d r __FUNCTION__.7021
0000002f r __FUNCTION__.7025
0000003f r __FUNCTION__.7029
00000051 r __FUNCTION__.7034
U memcpy
pmc.o:
U __assert_func
00000000 r __FUNCTION__.6742
00000015 r __FUNCTION__.6746
0000002b r __FUNCTION__.6768
00000000 T PMC_DisableAllPeripherals
00000000 T PMC_DisablePeripheral
00000000 T PMC_EnableAllPeripherals
00000000 T PMC_EnablePeripheral
00000000 T PMC_IsPeriphEnabled
twid.o:
U __assert_func
00000000 r __FUNCTION__.6752
00000010 r __FUNCTION__.6759
0000001d r __FUNCTION__.6772
00000027 r __FUNCTION__.6794
U TWI_ByteReceived
U TWI_ByteSent
00000000 T TWID_Handler
00000000 T TWID_Initialize
U TWI_DisableIt
00000000 T TWID_Read
00000000 T TWID_Write
U TWI_EnableIt
U TWI_GetMaskedStatus
U TWI_ReadByte
U TWI_SendSTOPCondition
U TWI_StartRead
U TWI_StartWrite
U TWI_Stop
U TWI_TransferComplete
U TWI_WriteByte
rtt.o:
U __assert_func
00000000 r __FUNCTION__.6750
0000000d r __FUNCTION__.6758
00000000 T RTT_EnableIT
00000000 T RTT_GetStatus
00000000 T RTT_GetTime
00000000 T RTT_SetAlarm
00000000 T RTT_SetPrescaler
spi.o:
U PMC_EnablePeripheral
00000000 T SPI_Configure
00000000 T SPI_ConfigureNPCS
00000000 T SPI_Disable
00000000 T SPI_DisableIt
00000000 T SPI_Enable
00000000 T SPI_EnableIt
00000000 T SPI_GetStatus
00000000 T SPI_IsFinished
00000000 T SPI_PdcDisableRx
00000000 T SPI_PdcDisableTx
00000000 T SPI_PdcEnableRx
00000000 T SPI_PdcEnableTx
00000000 T SPI_PdcSetRx
00000000 T SPI_PdcSetTx
00000000 T SPI_Read
00000000 T SPI_ReadBuffer
00000000 T SPI_Write
00000000 T SPI_WriteBuffer
tc.o:
U __assert_func
00000000 r __FUNCTION__.6745
0000000d r __FUNCTION__.6751
00000016 r __FUNCTION__.6757
00000000 T TC_Configure
00000000 T TC_FindMckDivisor
00000000 T TC_Start
00000000 T TC_Stop
pwmc.o:
U __assert_func
00000000 t FindClockConfiguration
0000002c r __FUNCTION__.6746
00000043 r __FUNCTION__.6757
00000059 r __FUNCTION__.6772
00000072 r __FUNCTION__.6783
00000087 r __FUNCTION__.6794
00000099 r __FUNCTION__.6801
000000aa r __FUNCTION__.6883
000000c7 r __FUNCTION__.6889
00000000 T PWMC_ConfigureChannel
00000000 T PWMC_ConfigureChannelExt
00000000 T PWMC_ConfigureClocks
00000000 T PWMC_ConfigureComparisonUnit
00000000 T PWMC_ConfigureEventLineMode
00000000 T PWMC_ConfigureSyncChannel
00000000 T PWMC_DisableChannel
00000000 T PWMC_DisableChannelIt
00000000 T PWMC_DisableIt
00000000 T PWMC_DisableOverrideOutput
00000000 T PWMC_EnableChannel
00000000 T PWMC_EnableChannelIt
00000000 T PWMC_EnableFaultProtection
00000000 T PWMC_EnableIt
00000000 T PWMC_EnableOverrideOutput
00000000 T PWMC_FaultClear
00000000 T PWMC_SetDeadTime
00000000 T PWMC_SetDutyCycle
00000000 T PWMC_SetFaultMode
00000000 T PWMC_SetFaultProtectionValue
00000000 T PWMC_SetOverrideValue
00000000 T PWMC_SetPeriod
00000000 T PWMC_SetSyncChannelUpdatePeriod
00000000 T PWMC_SetSyncChannelUpdateUnlock
00000000 T PWMC_WriteBuffer
rtc.o:
U __assert_func
00000000 r __FUNCTION__.6743
00000010 r __FUNCTION__.6752
0000001d r __FUNCTION__.6757
00000000 T RTC_ClearSCCR
00000000 T RTC_DisableIt
00000000 T RTC_EnableIt
00000000 T RTC_GetDate
00000000 T RTC_GetHourMode
00000000 T RTC_GetSR
00000000 T RTC_GetTime
00000000 T RTC_SetDate
00000000 T RTC_SetDateAlarm
00000000 T RTC_SetHourMode
00000000 T RTC_SetTime
00000000 T RTC_SetTimeAlarm
ssc.o:
00000000 T SSC_Configure
00000000 T SSC_ConfigureReceiver
00000000 T SSC_ConfigureTransmitter
00000000 T SSC_DisableInterrupts
00000000 T SSC_DisableReceiver
00000000 T SSC_DisableTransmitter
00000000 T SSC_EnableInterrupts
00000000 T SSC_EnableReceiver
00000000 T SSC_EnableTransmitter
00000000 T SSC_Read
00000000 T SSC_ReadBuffer
00000000 T SSC_Write
00000000 T SSC_WriteBuffer
pio_capture.o:
U __assert_func
00000000 r __FUNCTION__.6759
00000000 b _PioCaptureCopy
00000000 T PIO_CaptureDisable
00000000 T PIO_CaptureDisableIt
00000000 T PIO_CaptureEnable
00000000 T PIO_CaptureEnableIt
00000000 T PIO_CaptureHandler
00000000 T PIO_CaptureInit
U PMC_EnablePeripheral
usart.o:
U __assert_func
00000000 r __FUNCTION__.6969
00000000 T USART_Configure
00000000 T USART_DisableIt
00000000 T USART_EnableIt
00000000 T USART_GetChar
00000000 T USART_GetStatus
00000000 T USART_IsDataAvailable
00000000 T USART_IsRxReady
00000000 T USART_PutChar
00000000 T USART_Read
00000000 T USART_ReadBuffer
00000000 T USART_SetIrdaFilter
00000000 T USART_SetReceiverEnabled
00000000 T USART_SetTransmitterEnabled
00000000 T USART_Write
00000000 T USART_WriteBuffer
wdt.o:
00000000 T WDT_Disable
00000000 T WDT_Enable
00000000 T WDT_GetPeriod
00000000 T WDT_GetStatus
00000000 T WDT_Restart
core_cm3.o:
00000000 T __get_BASEPRI
00000000 T __get_CONTROL
00000000 T __get_FAULTMASK
00000000 T __get_MSP
00000000 T __get_PRIMASK
00000000 T __get_PSP
00000000 T __LDREXB
00000000 T __LDREXH
00000000 T __LDREXW
00000000 T __RBIT
00000000 T __REV
00000000 T __REV16
00000000 T __REVSH
00000000 T __set_BASEPRI
00000000 T __set_CONTROL
00000000 T __set_FAULTMASK
00000000 T __set_MSP
00000000 T __set_PRIMASK
00000000 T __set_PSP
00000000 T __STREXB
00000000 T __STREXH
00000000 T __STREXW

BIN
firmware/atmel_softpack_libraries/libchip_sam3s/lib/libchip_sam3s4_gcc_dbg.a Normal file
View File

Binary file not shown.

488
firmware/atmel_softpack_libraries/libchip_sam3s/lib/libchip_sam3s4_gcc_dbg.a.txt Normal file
View File

@@ -0,0 +1,488 @@
USBD_HAL.o:
00000000 b endpoints
U iprintf
U PMC_DisablePeripheral
U PMC_EnablePeripheral
U PMC_IsPeriphEnabled
00000000 t UDP_AddWr
00000000 t UDP_ClearRxFlag
00000000 t UDP_DisablePeripheralClock
00000000 t UDP_DisableTransceiver
00000000 t UDP_DisableUsbClock
00000000 t UDP_EnablePeripheralClock
00000000 t UDP_EnableTransceiver
00000000 t UDP_EnableUsbClock
00000000 t UDP_EndOfTransfer
00000000 t UDP_EndpointHandler
00000000 t UDP_IsTransferFinished
00000000 t UDP_MblUpdate
00000000 t UDP_MblWriteFifo
00000000 t UDP_Read
00000000 t UDP_ReadPayload
00000000 t UDP_ReadRequest
00000000 t UDP_Write
00000000 t UDP_WritePayload
U USBD_GetState
00000000 T USBD_HAL_Activate
00000000 T USBD_HAL_CancelIo
00000000 T USBD_HAL_ConfigureEP
00000000 T USBD_HAL_Connect
00000000 T USBD_HAL_Disconnect
00000000 T USBD_HAL_Halt
00000000 T USBD_HAL_Init
00000000 T USBD_HAL_IsHighSpeed
00000000 T USBD_HAL_Read
00000000 T USBD_HAL_RemoteWakeUp
00000000 T USBD_HAL_ResetEPs
00000000 T USBD_HAL_SetAddress
00000000 T USBD_HAL_SetConfiguration
00000000 T USBD_HAL_SetTransferCallback
00000000 T USBD_HAL_SetupMblTransfer
00000000 T USBD_HAL_Stall
00000000 T USBD_HAL_Suspend
00000000 T USBD_HAL_Write
00000000 T USBD_IrqHandler
U USBD_RequestHandler
U USBD_ResetHandler
U USBD_ResumeHandler
U USBD_SuspendHandler
U USBEndpointDescriptor_GetDirection
U USBEndpointDescriptor_GetMaxPacketSize
U USBEndpointDescriptor_GetNumber
U USBEndpointDescriptor_GetType
U USBGenericRequest_GetDirection
acc.o:
00000000 T ACC_Configure
00000000 T ACC_GetComparisionResult
00000000 T ACC_SetComparisionPair
U __assert_func
00000034 r __FUNCTION__.6748
crccu.o:
00000000 T CRCCU_ComputeCrc
00000000 T CRCCU_Configure
00000000 T CRCCU_ResetCrcValue
pio_it.o:
00000000 b _aIntSources
U __assert_func
00000038 b _dwNumSources
0000007c r __FUNCTION__.6752
00000090 r __FUNCTION__.6775
000000a0 r __FUNCTION__.6779
000000b0 r __FUNCTION__.6788
00000000 t NVIC_ClearPendingIRQ
00000000 t NVIC_DisableIRQ
00000000 t NVIC_EnableIRQ
00000000 t NVIC_SetPriority
00000000 T PIOA_IrqHandler
00000000 T PIOB_IrqHandler
U PIO_CaptureHandler
00000000 T PIOC_IrqHandler
00000000 T PIO_ConfigureIt
00000000 T PIO_DisableIt
00000000 T PIO_EnableIt
00000000 T PIO_InitializeInterrupts
00000000 T PioInterruptHandler
U PMC_EnablePeripheral
twi.o:
U __assert_func
000000c8 r __FUNCTION__.6747
000000dc r __FUNCTION__.6762
000000f0 r __FUNCTION__.6766
000000fc r __FUNCTION__.6773
0000010c r __FUNCTION__.6777
0000011c r __FUNCTION__.6782
0000012c r __FUNCTION__.6790
0000013c r __FUNCTION__.6804
0000014c r __FUNCTION__.6809
0000015c r __FUNCTION__.6813
0000016c r __FUNCTION__.6818
00000180 r __FUNCTION__.6822
00000000 T TWI_ByteReceived
00000000 T TWI_ByteSent
00000000 T TWI_ConfigureMaster
00000000 T TWI_ConfigureSlave
00000000 T TWI_DisableIt
00000000 T TWI_EnableIt
00000000 T TWI_GetMaskedStatus
00000000 T TWI_GetStatus
00000000 T TWI_ReadByte
00000000 T TWI_SendSTOPCondition
00000000 T TWI_StartRead
00000000 T TWI_StartWrite
00000000 T TWI_Stop
00000000 T TWI_TransferComplete
00000000 T TWI_WriteByte
pio.o:
00000000 T PIO_Clear
00000000 T PIO_Configure
00000000 T PIO_Get
00000000 T PIO_GetOutputDataStatus
00000000 T PIO_Set
00000000 T PIO_SetDebounceFilter
00000000 t PIO_SetInput
00000000 t PIO_SetOutput
00000000 t PIO_SetPeripheralA
00000000 t PIO_SetPeripheralB
00000000 t PIO_SetPeripheralC
00000000 t PIO_SetPeripheralD
U PMC_EnablePeripheral
async.o:
00000000 T ASYNC_IsFinished
exceptions.o:
00000000 W ACC_IrqHandler
00000000 W ADC_IrqHandler
00000000 W BusFault_Handler
00000000 W CRCCU_IrqHandler
00000000 W DAC_IrqHandler
00000000 W DebugMon_Handler
00000000 W EEFC_IrqHandler
00000000 W HardFault_Handler
00000000 T IrqHandlerNotUsed
00000000 W MCI_IrqHandler
00000000 W MemManage_Handler
00000000 W NMI_Handler
00000000 W PendSV_Handler
00000000 W PIOA_IrqHandler
00000000 W PIOB_IrqHandler
00000000 W PIOC_IrqHandler
00000000 W PMC_IrqHandler
00000000 W PWM_IrqHandler
00000000 W RSTC_IrqHandler
00000000 W RTC_IrqHandler
00000000 W RTT_IrqHandler
00000000 W SMC_IrqHandler
00000000 W SPI_IrqHandler
00000000 W SSC_IrqHandler
00000000 W SUPC_IrqHandler
00000000 W SVC_Handler
00000000 W SysTick_Handler
00000000 W TC0_IrqHandler
00000000 W TC1_IrqHandler
00000000 W TC2_IrqHandler
00000000 W TC3_IrqHandler
00000000 W TC4_IrqHandler
00000000 W TC5_IrqHandler
00000000 W TWI0_IrqHandler
00000000 W TWI1_IrqHandler
00000000 W UART0_IrqHandler
00000000 W UART1_IrqHandler
00000000 W UsageFault_Handler
00000000 W USART0_IrqHandler
00000000 W USART1_IrqHandler
00000000 W USBD_IrqHandler
00000000 W WDT_IrqHandler
adc.o:
00000000 T ADC_CfgChannelMode
00000000 T ADC_cfgFrequency
00000000 T ADC_CfgLowRes
00000000 T ADC_CfgPowerSave
00000000 T ADC_CfgTiming
00000000 T ADC_CfgTrigering
00000000 T ADC_check
00000000 T ADC_GetConvertedData
00000000 T ADC_Initialize
00000000 T ADC_IsChannelInterruptStatusSet
00000000 T ADC_IsInterruptMasked
00000000 T ADC_IsStatusSet
00000000 T ADC_ReadBuffer
00000000 T ADC_SetCompareChannel
00000000 T ADC_SetCompareMode
00000000 T ADC_SetComparisonWindow
U __assert_func
00000000 t calcul_startup
00000118 r __FUNCTION__.6781
00000130 r __FUNCTION__.6786
U iprintf
spi_pdc.o:
U PMC_DisablePeripheral
U PMC_EnablePeripheral
U SPI_Configure
U SPI_ConfigureNPCS
00000000 T SPID_Configure
00000000 T SPID_ConfigureCS
00000000 T SPID_Handler
U SPI_DisableIt
00000000 T SPID_IsBusy
00000000 T SPID_SendCommand
U SPI_Enable
U SPI_EnableIt
U SPI_PdcDisableRx
U SPI_PdcDisableTx
U SPI_PdcEnableRx
U SPI_PdcEnableTx
U SPI_PdcSetRx
U SPI_PdcSetTx
efc.o:
U __assert_func
00000000 T EFC_ComputeAddress
00000000 T EFC_DisableFrdyIt
00000000 T EFC_EnableFrdyIt
00000000 T EFC_GetResult
00000000 T EFC_GetStatus
00000000 T EFC_PerformCommand
00000000 T EFC_SetWaitState
00000000 T EFC_StartCommand
00000000 T EFC_TranslateAddress
00000110 r __FUNCTION__.6765
00000128 r __FUNCTION__.6773
0000013c r __FUNCTION__.6785
00000000 b IAP_PerformCommand.6803
dacc.o:
U __assert_func
00000000 T DACC_Initialize
00000000 T DACC_SetConversionData
00000000 T DACC_WriteBuffer
00000034 r __FUNCTION__.6752
flashd.o:
00000000 b _adwPageBuffer
U __assert_func
00000000 d _aucPageBuffer
00000000 t ComputeLockRange
00000100 b _dwUseIAP
U EFC_ComputeAddress
U EFC_DisableFrdyIt
U EFC_GetResult
U EFC_PerformCommand
U EFC_SetWaitState
U EFC_StartCommand
U EFC_TranslateAddress
00000000 T FLASHD_ClearGPNVM
00000000 T FLASHD_Erase
00000000 T FLASHD_Initialize
00000000 T FLASHD_IsGPNVMSet
00000000 T FLASHD_IsLocked
00000000 T FLASHD_Lock
00000000 T FLASHD_ReadUniqueID
00000000 T FLASHD_SetGPNVM
00000000 T FLASHD_Unlock
00000000 T FLASHD_Write
00000130 r __FUNCTION__.6944
00000140 r __FUNCTION__.6960
00000150 r __FUNCTION__.7012
00000160 r __FUNCTION__.7021
00000174 r __FUNCTION__.7025
00000184 r __FUNCTION__.7029
00000198 r __FUNCTION__.7034
U memcpy
pmc.o:
U __assert_func
00000020 r __FUNCTION__.6742
00000038 r __FUNCTION__.6746
00000050 r __FUNCTION__.6768
00000000 T PMC_DisableAllPeripherals
00000000 T PMC_DisablePeripheral
00000000 T PMC_EnableAllPeripherals
00000000 T PMC_EnablePeripheral
00000000 T PMC_IsPeriphEnabled
twid.o:
U __assert_func
0000014c r __FUNCTION__.6752
0000015c r __FUNCTION__.6759
0000016c r __FUNCTION__.6772
00000178 r __FUNCTION__.6794
U iprintf
U TWI_ByteReceived
U TWI_ByteSent
00000000 T TWID_Handler
00000000 T TWID_Initialize
U TWI_DisableIt
00000000 T TWID_Read
00000000 T TWID_Write
U TWI_EnableIt
U TWI_GetMaskedStatus
U TWI_ReadByte
U TWI_SendSTOPCondition
U TWI_StartRead
U TWI_StartWrite
U TWI_Stop
U TWI_TransferComplete
U TWI_WriteByte
rtt.o:
U __assert_func
0000003c r __FUNCTION__.6750
0000004c r __FUNCTION__.6758
00000000 T RTT_EnableIT
00000000 T RTT_GetStatus
00000000 T RTT_GetTime
00000000 T RTT_SetAlarm
00000000 T RTT_SetPrescaler
spi.o:
U PMC_EnablePeripheral
00000000 T SPI_Configure
00000000 T SPI_ConfigureNPCS
00000000 T SPI_Disable
00000000 T SPI_DisableIt
00000000 T SPI_Enable
00000000 T SPI_EnableIt
00000000 T SPI_GetStatus
00000000 T SPI_IsFinished
00000000 T SPI_PdcDisableRx
00000000 T SPI_PdcDisableTx
00000000 T SPI_PdcEnableRx
00000000 T SPI_PdcEnableTx
00000000 T SPI_PdcSetRx
00000000 T SPI_PdcSetTx
00000000 T SPI_Read
00000000 T SPI_ReadBuffer
00000000 T SPI_Write
00000000 T SPI_WriteBuffer
tc.o:
U __assert_func
0000005c r __FUNCTION__.6745
0000006c r __FUNCTION__.6751
00000078 r __FUNCTION__.6757
00000000 T TC_Configure
00000000 T TC_FindMckDivisor
00000000 T TC_Start
00000000 T TC_Stop
pwmc.o:
U __assert_func
00000000 t FindClockConfiguration
00000200 r __FUNCTION__.6746
00000218 r __FUNCTION__.6757
00000230 r __FUNCTION__.6772
0000024c r __FUNCTION__.6783
00000264 r __FUNCTION__.6794
00000278 r __FUNCTION__.6801
0000028c r __FUNCTION__.6883
000002ac r __FUNCTION__.6889
00000000 T PWMC_ConfigureChannel
00000000 T PWMC_ConfigureChannelExt
00000000 T PWMC_ConfigureClocks
00000000 T PWMC_ConfigureComparisonUnit
00000000 T PWMC_ConfigureEventLineMode
00000000 T PWMC_ConfigureSyncChannel
00000000 T PWMC_DisableChannel
00000000 T PWMC_DisableChannelIt
00000000 T PWMC_DisableIt
00000000 T PWMC_DisableOverrideOutput
00000000 T PWMC_EnableChannel
00000000 T PWMC_EnableChannelIt
00000000 T PWMC_EnableFaultProtection
00000000 T PWMC_EnableIt
00000000 T PWMC_EnableOverrideOutput
00000000 T PWMC_FaultClear
00000000 T PWMC_SetDeadTime
00000000 T PWMC_SetDutyCycle
00000000 T PWMC_SetFaultMode
00000000 T PWMC_SetFaultProtectionValue
00000000 T PWMC_SetOverrideValue
00000000 T PWMC_SetPeriod
00000000 T PWMC_SetSyncChannelUpdatePeriod
00000000 T PWMC_SetSyncChannelUpdateUnlock
00000000 T PWMC_WriteBuffer
rtc.o:
U __assert_func
00000058 r __FUNCTION__.6743
00000068 r __FUNCTION__.6752
00000078 r __FUNCTION__.6757
00000000 T RTC_ClearSCCR
00000000 T RTC_DisableIt
00000000 T RTC_EnableIt
00000000 T RTC_GetDate
00000000 T RTC_GetHourMode
00000000 T RTC_GetSR
00000000 T RTC_GetTime
00000000 T RTC_SetDate
00000000 T RTC_SetDateAlarm
00000000 T RTC_SetHourMode
00000000 T RTC_SetTime
00000000 T RTC_SetTimeAlarm
ssc.o:
00000000 T SSC_Configure
00000000 T SSC_ConfigureReceiver
00000000 T SSC_ConfigureTransmitter
00000000 T SSC_DisableInterrupts
00000000 T SSC_DisableReceiver
00000000 T SSC_DisableTransmitter
00000000 T SSC_EnableInterrupts
00000000 T SSC_EnableReceiver
00000000 T SSC_EnableTransmitter
00000000 T SSC_Read
00000000 T SSC_ReadBuffer
00000000 T SSC_Write
00000000 T SSC_WriteBuffer
pio_capture.o:
U __assert_func
0000008c r __FUNCTION__.6759
00000000 b _PioCaptureCopy
00000000 T PIO_CaptureDisable
00000000 T PIO_CaptureDisableIt
00000000 T PIO_CaptureEnable
00000000 T PIO_CaptureEnableIt
00000000 T PIO_CaptureHandler
00000000 T PIO_CaptureInit
U PMC_EnablePeripheral
usart.o:
U __assert_func
00000068 r __FUNCTION__.6969
U iprintf
00000000 T USART_Configure
00000000 T USART_DisableIt
00000000 T USART_EnableIt
00000000 T USART_GetChar
00000000 T USART_GetStatus
00000000 T USART_IsDataAvailable
00000000 T USART_IsRxReady
00000000 T USART_PutChar
00000000 T USART_Read
00000000 T USART_ReadBuffer
00000000 T USART_SetIrdaFilter
00000000 T USART_SetReceiverEnabled
00000000 T USART_SetTransmitterEnabled
00000000 T USART_Write
00000000 T USART_WriteBuffer
wdt.o:
00000000 T WDT_Disable
00000000 T WDT_Enable
00000000 T WDT_GetPeriod
00000000 T WDT_GetStatus
00000000 T WDT_Restart
core_cm3.o:
00000000 T __get_BASEPRI
00000000 T __get_CONTROL
00000000 T __get_FAULTMASK
00000000 T __get_MSP
00000000 T __get_PRIMASK
00000000 T __get_PSP
00000000 T __LDREXB
00000000 T __LDREXH
00000000 T __LDREXW
00000000 T __RBIT
00000000 T __REV
00000000 T __REV16
00000000 T __REVSH
00000000 T __set_BASEPRI
00000000 T __set_CONTROL
00000000 T __set_FAULTMASK
00000000 T __set_MSP
00000000 T __set_PRIMASK
00000000 T __set_PSP
00000000 T __STREXB
00000000 T __STREXH
00000000 T __STREXW

BIN
firmware/atmel_softpack_libraries/libchip_sam3s/lib/libchip_sam3s4_gcc_rel.a Normal file
View File

Binary file not shown.

460
firmware/atmel_softpack_libraries/libchip_sam3s/lib/libchip_sam3s4_gcc_rel.a.txt Normal file
View File

@@ -0,0 +1,460 @@
USBD_HAL.o:
00000000 b endpoints
U PMC_DisablePeripheral
U PMC_EnablePeripheral
U PMC_IsPeriphEnabled
00000000 t UDP_ClearRxFlag
00000000 t UDP_EnablePeripheralClock
00000000 t UDP_EndOfTransfer
00000000 t UDP_MblWriteFifo
00000000 t UDP_WritePayload
U USBD_GetState
00000000 T USBD_HAL_Activate
00000000 T USBD_HAL_CancelIo
00000000 T USBD_HAL_ConfigureEP
00000000 T USBD_HAL_Connect
00000000 T USBD_HAL_Disconnect
00000000 T USBD_HAL_Halt
00000000 T USBD_HAL_Init
00000000 T USBD_HAL_IsHighSpeed
00000000 T USBD_HAL_Read
00000000 T USBD_HAL_RemoteWakeUp
00000000 T USBD_HAL_ResetEPs
00000000 T USBD_HAL_SetAddress
00000000 T USBD_HAL_SetConfiguration
00000000 T USBD_HAL_SetTransferCallback
00000000 T USBD_HAL_SetupMblTransfer
00000000 T USBD_HAL_Stall
00000000 T USBD_HAL_Suspend
00000000 T USBD_HAL_Write
00000000 T USBD_IrqHandler
U USBD_RequestHandler
U USBD_ResetHandler
U USBD_ResumeHandler
U USBD_SuspendHandler
U USBEndpointDescriptor_GetDirection
U USBEndpointDescriptor_GetMaxPacketSize
U USBEndpointDescriptor_GetNumber
U USBEndpointDescriptor_GetType
U USBGenericRequest_GetDirection
acc.o:
00000000 T ACC_Configure
00000000 T ACC_GetComparisionResult
00000000 T ACC_SetComparisionPair
U __assert_func
00000000 r __FUNCTION__.6748
crccu.o:
00000000 T CRCCU_ComputeCrc
00000000 T CRCCU_Configure
00000000 T CRCCU_ResetCrcValue
pio_it.o:
00000004 b _aIntSources
U __assert_func
00000000 b _dwNumSources
00000000 r __FUNCTION__.6752
00000014 r __FUNCTION__.6775
00000024 r __FUNCTION__.6779
00000031 r __FUNCTION__.6788
00000000 T PIOA_IrqHandler
00000000 T PIOB_IrqHandler
U PIO_CaptureHandler
00000000 T PIOC_IrqHandler
00000000 T PIO_ConfigureIt
00000000 T PIO_DisableIt
00000000 T PIO_EnableIt
00000000 T PIO_InitializeInterrupts
00000000 T PioInterruptHandler
U PMC_EnablePeripheral
twi.o:
U __assert_func
00000000 r __FUNCTION__.6747
00000014 r __FUNCTION__.6762
00000027 r __FUNCTION__.6766
00000030 r __FUNCTION__.6773
0000003e r __FUNCTION__.6777
0000004b r __FUNCTION__.6782
00000059 r __FUNCTION__.6790
00000068 r __FUNCTION__.6804
00000075 r __FUNCTION__.6809
00000083 r __FUNCTION__.6813
00000091 r __FUNCTION__.6818
000000a5 r __FUNCTION__.6822
00000000 T TWI_ByteReceived
00000000 T TWI_ByteSent
00000000 T TWI_ConfigureMaster
00000000 T TWI_ConfigureSlave
00000000 T TWI_DisableIt
00000000 T TWI_EnableIt
00000000 T TWI_GetMaskedStatus
00000000 T TWI_GetStatus
00000000 T TWI_ReadByte
00000000 T TWI_SendSTOPCondition
00000000 T TWI_StartRead
00000000 T TWI_StartWrite
00000000 T TWI_Stop
00000000 T TWI_TransferComplete
00000000 T TWI_WriteByte
pio.o:
00000000 T PIO_Clear
00000000 T PIO_Configure
00000000 T PIO_Get
00000000 T PIO_GetOutputDataStatus
00000000 T PIO_Set
00000000 T PIO_SetDebounceFilter
U PMC_EnablePeripheral
async.o:
00000000 T ASYNC_IsFinished
exceptions.o:
00000000 W ACC_IrqHandler
00000000 W ADC_IrqHandler
00000000 W BusFault_Handler
00000000 W CRCCU_IrqHandler
00000000 W DAC_IrqHandler
00000000 W DebugMon_Handler
00000000 W EEFC_IrqHandler
00000000 W HardFault_Handler
00000000 T IrqHandlerNotUsed
00000000 W MCI_IrqHandler
00000000 W MemManage_Handler
00000000 W NMI_Handler
00000000 W PendSV_Handler
00000000 W PIOA_IrqHandler
00000000 W PIOB_IrqHandler
00000000 W PIOC_IrqHandler
00000000 W PMC_IrqHandler
00000000 W PWM_IrqHandler
00000000 W RSTC_IrqHandler
00000000 W RTC_IrqHandler
00000000 W RTT_IrqHandler
00000000 W SMC_IrqHandler
00000000 W SPI_IrqHandler
00000000 W SSC_IrqHandler
00000000 W SUPC_IrqHandler
00000000 W SVC_Handler
00000000 W SysTick_Handler
00000000 W TC0_IrqHandler
00000000 W TC1_IrqHandler
00000000 W TC2_IrqHandler
00000000 W TC3_IrqHandler
00000000 W TC4_IrqHandler
00000000 W TC5_IrqHandler
00000000 W TWI0_IrqHandler
00000000 W TWI1_IrqHandler
00000000 W UART0_IrqHandler
00000000 W UART1_IrqHandler
00000000 W UsageFault_Handler
00000000 W USART0_IrqHandler
00000000 W USART1_IrqHandler
00000000 W USBD_IrqHandler
00000000 W WDT_IrqHandler
adc.o:
00000000 T ADC_CfgChannelMode
00000000 T ADC_cfgFrequency
00000000 T ADC_CfgLowRes
00000000 T ADC_CfgPowerSave
00000000 T ADC_CfgTiming
00000000 T ADC_CfgTrigering
00000000 T ADC_check
00000000 T ADC_GetConvertedData
00000000 T ADC_Initialize
00000000 T ADC_IsChannelInterruptStatusSet
00000000 T ADC_IsInterruptMasked
00000000 T ADC_IsStatusSet
00000000 T ADC_ReadBuffer
00000000 T ADC_SetCompareChannel
00000000 T ADC_SetCompareMode
00000000 T ADC_SetComparisonWindow
U __assert_func
00000000 t calcul_startup
00000000 r __FUNCTION__.6781
00000015 r __FUNCTION__.6786
U iprintf
spi_pdc.o:
U PMC_DisablePeripheral
U PMC_EnablePeripheral
U SPI_Configure
U SPI_ConfigureNPCS
00000000 T SPID_Configure
00000000 T SPID_ConfigureCS
00000000 T SPID_Handler
U SPI_DisableIt
00000000 T SPID_IsBusy
00000000 T SPID_SendCommand
U SPI_Enable
U SPI_EnableIt
U SPI_PdcDisableRx
U SPI_PdcDisableTx
U SPI_PdcEnableRx
U SPI_PdcEnableTx
U SPI_PdcSetRx
U SPI_PdcSetTx
efc.o:
U __assert_func
00000000 T EFC_ComputeAddress
00000000 T EFC_DisableFrdyIt
00000000 T EFC_EnableFrdyIt
00000000 T EFC_GetResult
00000000 T EFC_GetStatus
00000000 T EFC_PerformCommand
00000000 T EFC_SetWaitState
00000000 T EFC_StartCommand
00000000 T EFC_TranslateAddress
00000000 r __FUNCTION__.6765
00000015 r __FUNCTION__.6773
00000028 r __FUNCTION__.6785
00000000 b IAP_PerformCommand.6803
dacc.o:
U __assert_func
00000000 T DACC_Initialize
00000000 T DACC_SetConversionData
00000000 T DACC_WriteBuffer
00000000 r __FUNCTION__.6752
flashd.o:
00000004 b _adwPageBuffer
U __assert_func
00000000 t ComputeLockRange
00000000 b _dwUseIAP
U EFC_ComputeAddress
U EFC_DisableFrdyIt
U EFC_GetResult
U EFC_PerformCommand
U EFC_SetWaitState
U EFC_StartCommand
U EFC_TranslateAddress
00000000 T FLASHD_ClearGPNVM
00000000 T FLASHD_Erase
00000000 T FLASHD_Initialize
00000000 T FLASHD_IsGPNVMSet
00000000 T FLASHD_IsLocked
00000000 T FLASHD_Lock
00000000 T FLASHD_ReadUniqueID
00000000 T FLASHD_SetGPNVM
00000000 T FLASHD_Unlock
00000000 T FLASHD_Write
00000000 r __FUNCTION__.6960
0000000d r __FUNCTION__.7012
0000001d r __FUNCTION__.7021
0000002f r __FUNCTION__.7025
0000003f r __FUNCTION__.7029
00000051 r __FUNCTION__.7034
U memcpy
pmc.o:
U __assert_func
00000000 r __FUNCTION__.6742
00000015 r __FUNCTION__.6746
0000002b r __FUNCTION__.6768
00000000 T PMC_DisableAllPeripherals
00000000 T PMC_DisablePeripheral
00000000 T PMC_EnableAllPeripherals
00000000 T PMC_EnablePeripheral
00000000 T PMC_IsPeriphEnabled
twid.o:
U __assert_func
00000000 r __FUNCTION__.6752
00000010 r __FUNCTION__.6759
0000001d r __FUNCTION__.6772
00000027 r __FUNCTION__.6794
U TWI_ByteReceived
U TWI_ByteSent
00000000 T TWID_Handler
00000000 T TWID_Initialize
U TWI_DisableIt
00000000 T TWID_Read
00000000 T TWID_Write
U TWI_EnableIt
U TWI_GetMaskedStatus
U TWI_ReadByte
U TWI_SendSTOPCondition
U TWI_StartRead
U TWI_StartWrite
U TWI_Stop
U TWI_TransferComplete
U TWI_WriteByte
rtt.o:
U __assert_func
00000000 r __FUNCTION__.6750
0000000d r __FUNCTION__.6758
00000000 T RTT_EnableIT
00000000 T RTT_GetStatus
00000000 T RTT_GetTime
00000000 T RTT_SetAlarm
00000000 T RTT_SetPrescaler
spi.o:
U PMC_EnablePeripheral
00000000 T SPI_Configure
00000000 T SPI_ConfigureNPCS
00000000 T SPI_Disable
00000000 T SPI_DisableIt
00000000 T SPI_Enable
00000000 T SPI_EnableIt
00000000 T SPI_GetStatus
00000000 T SPI_IsFinished
00000000 T SPI_PdcDisableRx
00000000 T SPI_PdcDisableTx
00000000 T SPI_PdcEnableRx
00000000 T SPI_PdcEnableTx
00000000 T SPI_PdcSetRx
00000000 T SPI_PdcSetTx
00000000 T SPI_Read
00000000 T SPI_ReadBuffer
00000000 T SPI_Write
00000000 T SPI_WriteBuffer
tc.o:
U __assert_func
00000000 r __FUNCTION__.6745
0000000d r __FUNCTION__.6751
00000016 r __FUNCTION__.6757
00000000 T TC_Configure
00000000 T TC_FindMckDivisor
00000000 T TC_Start
00000000 T TC_Stop
pwmc.o:
U __assert_func
00000000 t FindClockConfiguration
0000002c r __FUNCTION__.6746
00000043 r __FUNCTION__.6757
00000059 r __FUNCTION__.6772
00000072 r __FUNCTION__.6783
00000087 r __FUNCTION__.6794
00000099 r __FUNCTION__.6801
000000aa r __FUNCTION__.6883
000000c7 r __FUNCTION__.6889
00000000 T PWMC_ConfigureChannel
00000000 T PWMC_ConfigureChannelExt
00000000 T PWMC_ConfigureClocks
00000000 T PWMC_ConfigureComparisonUnit
00000000 T PWMC_ConfigureEventLineMode
00000000 T PWMC_ConfigureSyncChannel
00000000 T PWMC_DisableChannel
00000000 T PWMC_DisableChannelIt
00000000 T PWMC_DisableIt
00000000 T PWMC_DisableOverrideOutput
00000000 T PWMC_EnableChannel
00000000 T PWMC_EnableChannelIt
00000000 T PWMC_EnableFaultProtection
00000000 T PWMC_EnableIt
00000000 T PWMC_EnableOverrideOutput
00000000 T PWMC_FaultClear
00000000 T PWMC_SetDeadTime
00000000 T PWMC_SetDutyCycle
00000000 T PWMC_SetFaultMode
00000000 T PWMC_SetFaultProtectionValue
00000000 T PWMC_SetOverrideValue
00000000 T PWMC_SetPeriod
00000000 T PWMC_SetSyncChannelUpdatePeriod
00000000 T PWMC_SetSyncChannelUpdateUnlock
00000000 T PWMC_WriteBuffer
rtc.o:
U __assert_func
00000000 r __FUNCTION__.6743
00000010 r __FUNCTION__.6752
0000001d r __FUNCTION__.6757
00000000 T RTC_ClearSCCR
00000000 T RTC_DisableIt
00000000 T RTC_EnableIt
00000000 T RTC_GetDate
00000000 T RTC_GetHourMode
00000000 T RTC_GetSR
00000000 T RTC_GetTime
00000000 T RTC_SetDate
00000000 T RTC_SetDateAlarm
00000000 T RTC_SetHourMode
00000000 T RTC_SetTime
00000000 T RTC_SetTimeAlarm
ssc.o:
00000000 T SSC_Configure
00000000 T SSC_ConfigureReceiver
00000000 T SSC_ConfigureTransmitter
00000000 T SSC_DisableInterrupts
00000000 T SSC_DisableReceiver
00000000 T SSC_DisableTransmitter
00000000 T SSC_EnableInterrupts
00000000 T SSC_EnableReceiver
00000000 T SSC_EnableTransmitter
00000000 T SSC_Read
00000000 T SSC_ReadBuffer
00000000 T SSC_Write
00000000 T SSC_WriteBuffer
pio_capture.o:
U __assert_func
00000000 r __FUNCTION__.6759
00000000 b _PioCaptureCopy
00000000 T PIO_CaptureDisable
00000000 T PIO_CaptureDisableIt
00000000 T PIO_CaptureEnable
00000000 T PIO_CaptureEnableIt
00000000 T PIO_CaptureHandler
00000000 T PIO_CaptureInit
U PMC_EnablePeripheral
usart.o:
U __assert_func
00000000 r __FUNCTION__.6969
00000000 T USART_Configure
00000000 T USART_DisableIt
00000000 T USART_EnableIt
00000000 T USART_GetChar
00000000 T USART_GetStatus
00000000 T USART_IsDataAvailable
00000000 T USART_IsRxReady
00000000 T USART_PutChar
00000000 T USART_Read
00000000 T USART_ReadBuffer
00000000 T USART_SetIrdaFilter
00000000 T USART_SetReceiverEnabled
00000000 T USART_SetTransmitterEnabled
00000000 T USART_Write
00000000 T USART_WriteBuffer
wdt.o:
00000000 T WDT_Disable
00000000 T WDT_Enable
00000000 T WDT_GetPeriod
00000000 T WDT_GetStatus
00000000 T WDT_Restart
core_cm3.o:
00000000 T __get_BASEPRI
00000000 T __get_CONTROL
00000000 T __get_FAULTMASK
00000000 T __get_MSP
00000000 T __get_PRIMASK
00000000 T __get_PSP
00000000 T __LDREXB
00000000 T __LDREXH
00000000 T __LDREXW
00000000 T __RBIT
00000000 T __REV
00000000 T __REV16
00000000 T __REVSH
00000000 T __set_BASEPRI
00000000 T __set_CONTROL
00000000 T __set_FAULTMASK
00000000 T __set_MSP
00000000 T __set_PRIMASK
00000000 T __set_PSP
00000000 T __STREXB
00000000 T __STREXH
00000000 T __STREXW

1690
firmware/atmel_softpack_libraries/libchip_sam3s/source/USBD_HAL.c Normal file
View File

File diff suppressed because it is too large Load Diff

162
firmware/atmel_softpack_libraries/libchip_sam3s/source/acc.c Normal file
View File

@@ -0,0 +1,162 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/** \addtogroup acc_module Working with ACC
* The ACC driver provides the interface to configure and use the ACC peripheral.\n
*
* It applies comparison on two inputs and gives a compare output.
*
* To Enable a ACC Comparison,the user has to follow these few steps:
* <ul>
* <li> Enable ACC peripheral clock by setting the corresponding bit in PMC_PCER1
* (PMC Peripheral Clock Enable Register 1)
* </li>
* <li> Reset the controller by asserting ACC_CR_SWRST in ACC_CR(ACC Control Register)
</li>
* <li> Configure the mode as following steps: </li>
* -# Select inputs for SELMINUS and SELPLUS in ACC_MR (ACC Mode Register).
* -# Enable Analog Comparator by setting ACEN in ACC_MR.
* -# Configure Edge Type to detect different compare output.
* </li>
* <li> Wait until the automatic mask period expires by polling MASK bit in
* ACC_ISR.
* </ul>
*
* For more accurate information, please look at the ACC section of the
* Datasheet.
*
* Related files :\n
* \ref acc.c\n
* \ref acc.h\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* Implementation of Analog Comparator Controller (ACC).
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Initialize the ACC controller
*
* \param pAcc Pointer to an Acc instance.
* \param idAcc ACC identifier
* \param ucSelplus input connected to inp, 0~7
* \param ucSelminus input connected to inm,0~7
* \param wAc_en Analog comprator enabled/disabled
* \param wEdge CF flag triggering mode
* \param wInvert INVert comparator output,use pattern defined in the device header file
*/
extern void ACC_Configure( Acc *pAcc, uint8_t idAcc, uint8_t ucSelplus, uint8_t ucSelminus,
uint16_t wAc_en, uint16_t wEdge, uint16_t wInvert )
{
/* Enable peripheral clock*/
PMC->PMC_PCER1 = 1 << (idAcc - 32) ;
/* Reset the controller */
pAcc->ACC_CR |= ACC_CR_SWRST ;
/* Write to the MR register */
ACC_CfgModeReg( pAcc,
( (ucSelplus<<ACC_MR_SELPLUS_Pos) & ACC_MR_SELPLUS_Msk ) |
( (ucSelminus<<ACC_MR_SELMINUS_Pos) & ACC_MR_SELMINUS_Msk ) |
( (wAc_en<<8) & ACC_MR_ACEN ) |
( (wEdge<<ACC_MR_EDGETYP_Pos) & ACC_MR_EDGETYP_Msk ) |
( (wInvert<<12) & ACC_MR_INV ) ) ;
/* set hysteresis and current option*/
pAcc->ACC_ACR = (ACC_ACR_ISEL_HISP | ((0x01 << ACC_ACR_HYST_Pos) & ACC_ACR_HYST_Msk));
/* Automatic Output Masking Period*/
while ( pAcc->ACC_ISR & (uint32_t)ACC_ISR_MASK ) ;
}
/**
* Return the Channel Converted Data
* \param pAcc Pointer to an Acc instance.
* \param selplus input applied on ACC SELPLUS
* \param selminus input applied on ACC SELMINUS
*/
extern void ACC_SetComparisionPair( Acc *pAcc, uint8_t ucSelplus, uint8_t ucSelminus )
{
uint32_t dwTemp ;
assert( ucSelplus < 8 && ucSelminus < 8 ) ;
dwTemp = pAcc->ACC_MR ;
pAcc->ACC_MR = dwTemp & (uint32_t) ((~ACC_MR_SELMINUS_Msk) & (~ACC_MR_SELPLUS_Msk));
pAcc->ACC_MR |= ( ((ucSelplus << ACC_MR_SELPLUS_Pos) & ACC_MR_SELPLUS_Msk) |
((ucSelminus << ACC_MR_SELMINUS_Pos) & ACC_MR_SELMINUS_Msk) ) ;
}
/**
* Return Comparison Result
* \param pAcc Pointer to an Acc instance.
* \param status value of ACC_ISR
*/
extern uint32_t ACC_GetComparisionResult( Acc *pAcc, uint32_t dwStatus )
{
uint32_t dwTemp = pAcc->ACC_MR ;
if ( (dwTemp & ACC_MR_INV) == ACC_MR_INV )
{
if ( dwStatus & ACC_ISR_SCO )
{
return 0 ; /* inn>inp*/
}
else
{
return 1 ;/* inp>inn*/
}
}
else
{
if ( dwStatus & ACC_ISR_SCO )
{
return 1 ; /* inp>inn*/
}
else
{
return 0 ;/* inn>inp*/
}
}
}

417
firmware/atmel_softpack_libraries/libchip_sam3s/source/adc.c Normal file
View File

@@ -0,0 +1,417 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/** \addtogroup adc_module Working with ADC
* The ADC driver provides the interface to configure and use the ADC peripheral.
* \n
*
* It converts the analog input to digital format. The converted result could be
* 12bit or 10bit. The ADC supports up to 16 analog lines.
*
* To Enable a ADC conversion,the user has to follow these few steps:
* <ul>
* <li> Select an appropriate reference voltage on ADVREF </li>
* <li> Configure the ADC according to its requirements and special needs,which
* could be broken down into several parts:
* -# Select the resolution by setting or clearing ADC_MR_LOWRES bit in
* ADC_MR (Mode Register)
* -# Set ADC clock by setting ADC_MR_PRESCAL bits in ADC_MR, the clock is
* calculated with ADCClock = MCK / ( (PRESCAL+1) * 2 )
* -# Set Startup Time,Tracking Clock cycles and Transfer Clock respectively
* in ADC_MR.
</li>
* <li> Start conversion by setting ADC_CR_START in ADC_CR. </li>
* </ul>
*
* For more accurate information, please look at the ADC section of the
* Datasheet.
*
* Related files :\n
* \ref adc.c\n
* \ref adc.h\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* Implementation of Analog-to-Digital Converter (ADC).
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Initialize the ADC controller
*
* \param pAdc Pointer to an Adc instance.
* \param idAdc ADC Index
* \param trgEn trigger mode, software or Hardware
* \param trgSel hardware trigger selection
* \param sleepMode sleep mode selection
* \param resolution resolution selection 10 bits or 12 bits
* \param mckClock value of MCK in Hz
* \param adcClock value of the ADC clock in Hz
* \param startup value of the start up time (in ADCClock) (see datasheet)
* \param tracking Tracking Time (in ADCClock cycle)
*/
extern void ADC_Initialize( Adc* pAdc, uint32_t idAdc )
{
/* Enable peripheral clock*/
PMC->PMC_PCER0 = 1 << idAdc;
/* Reset the controller */
pAdc->ADC_CR = ADC_CR_SWRST;
/* Reset Mode Register set to default */
/* TrackTime set to 0 */
/* Transfer set to 1 */
/* settling set to 3 */
pAdc->ADC_MR = ADC_MR_TRANSFER(1) | ADC_MR_TRACKTIM(0) | ADC_MR_SETTLING(3);
}
/**
* \brief Initialize the ADC Timing
*/
extern void ADC_CfgTiming( Adc* pAdc, uint32_t tracking, uint32_t settling, uint32_t transfer )
{
pAdc->ADC_MR = ADC_MR_TRANSFER( transfer )
| ADC_MR_SETTLING( settling )
| ADC_MR_TRACKTIM( tracking ) ;
}
/**
* \brief Initialize the ADC Timing
*/
extern void ADC_cfgFrequency( Adc* pAdc, uint32_t startup, uint32_t prescal )
{
pAdc->ADC_MR |= ADC_MR_PRESCAL( prescal )
| ( (startup<<ADC_MR_STARTUP_Pos) & ADC_MR_STARTUP_Msk);
}
/**
* \brief Initialize the ADC Trigering
*/
extern void ADC_CfgTrigering( Adc* pAdc, uint32_t trgEn, uint32_t trgSel, uint32_t freeRun )
{
pAdc->ADC_MR |= ((trgEn<<0) & ADC_MR_TRGEN)
| ((trgSel<<ADC_MR_TRGSEL_Pos) & ADC_MR_TRGSEL_Msk)
| ((freeRun<<7) & ADC_MR_FREERUN) ;
}
/**
* \brief Initialize the ADC Low Res
*/
extern void ADC_CfgLowRes( Adc* pAdc, uint32_t resolution )
{
pAdc->ADC_MR |= (resolution<<4) & ADC_MR_LOWRES;
}
/**
* \brief Initialize the ADC PowerSave
*/
extern void ADC_CfgPowerSave( Adc* pAdc, uint32_t sleep, uint32_t fwup )
{
pAdc->ADC_MR |= ( ((sleep<<5) & ADC_MR_SLEEP)
| ((fwup<<6) & ADC_MR_FWUP) );
}
/**
* \brief Initialize the ADC Channel Mode
*/
extern void ADC_CfgChannelMode( Adc* pAdc, uint32_t useq, uint32_t anach )
{
pAdc->ADC_MR |= ( ((anach<<23) & ADC_MR_ANACH)
| ((useq <<31) & (uint32_t)ADC_MR_USEQ) );
}
/**
* \brief calcul_startup
*/
static uint32_t calcul_startup( uint32_t startup )
{
uint32_t startup_value=0;
if( startup == 0 )
startup_value = 0;
else if( startup == 1 )
startup_value = 8;
else if( startup == 2 )
startup_value = 16;
else if( startup == 3 )
startup_value = 24;
else if( startup == 4 )
startup_value = 64;
else if( startup == 5 )
startup_value = 80;
else if( startup == 6 )
startup_value = 96;
else if( startup == 7 )
startup_value = 112;
else if( startup == 8 )
startup_value = 512;
else if( startup == 9 )
startup_value = 576;
else if( startup == 10 )
startup_value = 640;
else if( startup == 11 )
startup_value = 704;
else if( startup == 12 )
startup_value = 768;
else if( startup == 13 )
startup_value = 832;
else if( startup == 14 )
startup_value = 896;
else if( startup == 15 )
startup_value = 960;
return startup_value;
}
/**
* \brief ADC check
*/
extern void ADC_check( Adc* pAdc, uint32_t mck_freq )
{
uint32_t adc_freq;
uint32_t prescal;
uint32_t startup;
/* ADCClock = MCK / ( (PRESCAL+1) * 2 ) */
prescal = (( pAdc->ADC_MR & ADC_MR_PRESCAL_Msk) >> ADC_MR_PRESCAL_Pos);
adc_freq = mck_freq / ((prescal+1)*2);
printf("ADC clock frequency = %d Hz\r\n", (int)adc_freq );
if( adc_freq < ADC_FREQ_MIN )
{
printf("adc frequency too low (out of specification: %d Hz)\r\n", (int)ADC_FREQ_MIN);
}
if( adc_freq > ADC_FREQ_MAX )
{
printf("adc frequency too high (out of specification: %d Hz)\r\n", (int)ADC_FREQ_MAX);
}
startup = (( pAdc->ADC_MR & ADC_MR_STARTUP_Msk) >> ADC_MR_STARTUP_Pos);
if( !(pAdc->ADC_MR & ADC_MR_SLEEP_SLEEP) )
{
/* 40µs */
if( ADC_STARTUP_NORM * adc_freq / 1000000 > calcul_startup(startup) )
{
printf("Startup time too small: %d, programmed: %d\r\n", (int)(ADC_STARTUP_NORM * adc_freq / 1000000), (int)calcul_startup(startup));
}
}
else
{
if(pAdc->ADC_MR & ADC_MR_FREERUN_ON)
{
printf("FreeRun forbidden in sleep mode\n\r");
}
if( !(pAdc->ADC_MR & ADC_MR_FWUP_ON) )
{
/* Sleep 40µs */
if( ADC_STARTUP_NORM * adc_freq / 1000000 > calcul_startup(startup) )
{
printf("Startup time too small: %d, programmed: %d\r\n", (int)(ADC_STARTUP_NORM * adc_freq / 1000000), (int)(calcul_startup(startup)));
}
}
else
{
if( pAdc->ADC_MR & ADC_MR_FWUP_ON )
{
/* Fast Wake Up Sleep Mode: 12µs */
if( ADC_STARTUP_FAST * adc_freq / 1000000 > calcul_startup(startup) )
{
printf("Startup time too small: %d, programmed: %d\r\n", (int)(ADC_STARTUP_NORM * adc_freq / 1000000), (int)(calcul_startup(startup)));
}
}
}
}
}
/**
* Return the Channel Converted Data
*
* \param pAdc Pointer to an Adc instance.
* \param channel channel to get converted value
*/
extern uint32_t ADC_GetConvertedData( Adc* pAdc, uint32_t dwChannel )
{
uint32_t dwData = 0;
assert( dwChannel < 16 ) ;
if ( 15 >= dwChannel )
{
dwData=*(pAdc->ADC_CDR+dwChannel) ;
}
return dwData ;
}
/**
* Set compare channel
*
* \param pAdc Pointer to an Adc instance.
* \param channel channel number to be set,16 for all channels
*/
extern void ADC_SetCompareChannel( Adc* pAdc, uint32_t dwChannel )
{
assert( dwChannel <= 16 ) ;
if ( dwChannel < 16 )
{
pAdc->ADC_EMR &= (uint32_t)~(ADC_EMR_CMPALL);
pAdc->ADC_EMR &= (uint32_t)~(ADC_EMR_CMPSEL_Msk);
pAdc->ADC_EMR |= (dwChannel << ADC_EMR_CMPSEL_Pos);
}
else
{
pAdc->ADC_EMR |= ADC_EMR_CMPALL;
}
}
/**
* Set compare mode
*
* \param pAdc Pointer to an Adc instance.
* \param mode compare mode
*/
extern void ADC_SetCompareMode( Adc* pAdc, uint32_t dwMode )
{
pAdc->ADC_EMR &= (uint32_t)~(ADC_EMR_CMPMODE_Msk);
pAdc->ADC_EMR |= (dwMode & ADC_EMR_CMPMODE_Msk) ;
}
/**
* Set comparsion window,one thereshold each time
*
* \param pAdc Pointer to an Adc instance.
* \param hi_lo Comparison Window
*/
extern void ADC_SetComparisonWindow( Adc* pAdc, uint32_t dwHi_Lo )
{
pAdc->ADC_CWR = dwHi_Lo ;
}
/**----------------------------------------------------------------------------
* Test if ADC Interrupt is Masked
*
* \param pAdc Pointer to an Adc instance.
* \param flag flag to be tested
*
* \return 1 if interrupt is masked, otherwise 0
*/
uint32_t ADC_IsInterruptMasked( Adc* pAdc, uint32_t dwFlag )
{
return (ADC_GetInterruptMaskStatus( pAdc ) & dwFlag) ;
}
/**----------------------------------------------------------------------------
* Test if ADC Status is Set
*
* \param pAdc Pointer to an Adc instance.
* \param flag flag to be tested
*
* \return 1 if the staus is set; 0 otherwise
*/
extern uint32_t ADC_IsStatusSet( Adc* pAdc, uint32_t dwFlag )
{
return (ADC_GetStatus( pAdc ) & dwFlag) ;
}
/**----------------------------------------------------------------------------
* Test if ADC channel interrupt Status is Set
*
* \param adc_sr Value of SR register
* \param channel Channel to be tested
*
* \return 1 if interrupt status is set, otherwise 0
*/
extern uint32_t ADC_IsChannelInterruptStatusSet( uint32_t dwAdc_sr, uint32_t dwChannel )
{
uint32_t dwStatus ;
if ( (dwAdc_sr & ((uint32_t)1 << dwChannel)) == ((uint32_t)1 << dwChannel) )
{
dwStatus = 1 ;
}
else
{
dwStatus = 0 ;
}
return dwStatus ;
}
/**
* \brief Read converted data through PDC channel
*
* \param pADC the pointer of adc peripheral
* \param pBuffer the destination buffer
* \param dwSize the size of the buffer
*/
extern uint32_t ADC_ReadBuffer( Adc* pADC, int16_t *pwBuffer, uint32_t dwSize )
{
/* Check if the first PDC bank is free*/
if ( (pADC->ADC_RCR == 0) && (pADC->ADC_RNCR == 0) )
{
pADC->ADC_RPR = (uint32_t)pwBuffer ;
pADC->ADC_RCR = dwSize ;
pADC->ADC_PTCR = ADC_PTCR_RXTEN;
return 1;
}
/* Check if the second PDC bank is free*/
else
{
if ( pADC->ADC_RNCR == 0 )
{
pADC->ADC_RNPR = (uint32_t)pwBuffer ;
pADC->ADC_RNCR = dwSize ;
return 1 ;
}
else
{
return 0 ;
}
}
}

53
firmware/atmel_softpack_libraries/libchip_sam3s/source/async.c Normal file
View File

@@ -0,0 +1,53 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Provide a routine for asynchronos transfer.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
/*----------------------------------------------------------------------------
* Global functions
*----------------------------------------------------------------------------*/
/**
* \brief Returns 1 if the given transfer has ended; otherwise returns 0.
* \param pAsync Pointer to an Async instance.
*/
uint32_t ASYNC_IsFinished( Async* pAsync )
{
return (pAsync->status != ASYNC_STATUS_PENDING) ;
}

112
firmware/atmel_softpack_libraries/libchip_sam3s/source/crccu.c Normal file
View File

@@ -0,0 +1,112 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/** \addtogroup crccu_module Working with CRCCU
* The CRCCU driver provides the interface to configure and use the CRCCU
* peripheral.
*
* It performs a CRC computation on a Memory Area. CRC computation is performed
* from the LSB to MSB bit. Three different polynomials are available:
* CCIT802.3, CASTAGNOLI and CCIT16.
*
* To computes CRC of a buffer, the user has to follow these few steps:
* <ul>
* <li>Reset initial CRC by setting RESET bit in CRCCU_CRC_CR,</li>
* <li>Configure CRC descriptor and working mode,</li>
* <li>Start to compute CRC by setting DMAEN in CRCCU_DMA_EN,</li>
* <li>Get CRC value in CRCCU_CRC_SR.</li>
* </ul>
*
* For more accurate information, please look at the CRCCU section of the
* Datasheet.
*
* Related files :\n
* \ref crccu.c\n
* \ref crccu.h.\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* Implementation of Cyclic Redundancy Check Calculation Unit (CRCCU).
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
/*----------------------------------------------------------------------------
* Definitions
*----------------------------------------------------------------------------*/
#define CRCCU_TIMEOUT 0xFFFFFFFF
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Reset initial CRC to 0xFFFFFFFF.
*/
extern void CRCCU_ResetCrcValue( Crccu* pCrccu )
{
pCrccu->CRCCU_CR = CRCCU_CR_RESET;
}
/**
* \brief Configure the CRCCU.
*
* \param dscrAddr CRC decscriptor address.
* \param mode CRC work mode
*/
extern void CRCCU_Configure( Crccu* pCrccu, uint32_t dwDscrAddr, uint32_t dwMode )
{
pCrccu->CRCCU_DSCR = dwDscrAddr ;
pCrccu->CRCCU_MR = dwMode ;
}
/**
* \brief Start to compute the CRC of a buffer.
*
* \return The CRC of the buffer.
*/
extern uint32_t CRCCU_ComputeCrc( Crccu* pCrccu )
{
uint32_t dwTimeout = 0 ;
pCrccu->CRCCU_DMA_EN = CRCCU_DMA_EN_DMAEN ;
while ( ((pCrccu->CRCCU_DMA_SR & CRCCU_DMA_SR_DMASR) == CRCCU_DMA_SR_DMASR) &&
(dwTimeout++ < CRCCU_TIMEOUT) ) ;
return (pCrccu->CRCCU_SR) ;
}

183
firmware/atmel_softpack_libraries/libchip_sam3s/source/dacc.c Normal file
View File

@@ -0,0 +1,183 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/** \addtogroup dacc_module Working with DACC
* The DACC driver provides the interface to configure and use the DACC peripheral.\n
*
* The DACC(Digital-to-Analog Converter Controller) converts digital code to analog output.
* The data to be converted are sent in a common register for all channels. It offers up to 2
* analog outputs.The output voltage ranges from (1/6)ADVREF to (5/6)ADVREF.
*
* To Enable a DACC conversion,the user has to follow these few steps:
* <ul>
* <li> Select an appropriate reference voltage on ADVREF </li>
* <li> Configure the DACC according to its requirements and special needs,which could be
broken down into several parts:
* -# Enable DACC in free running mode by clearing TRGEN in DACC_MR;
* -# Configure Startup Time and Refresh Period through setting STARTUP and REFRESH fields
* in DACC_MR; The refresh mechanism is used to protect the output analog value from
* decreasing.
* -# Enable channels and write digital code to DACC_CDR,in free running mode, the conversion
* is started right after at least one channel is enabled and data is written .
</li>
* </ul>
*
* For more accurate information, please look at the DACC section of the
* Datasheet.
*
* Related files :\n
* \ref DACC.c\n
* \ref DACC.h\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* Implementation of Digital-to-Analog Converter Controller (DACC).
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <stdint.h>
#include <assert.h>
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Initialize the DACC controller
* \param pDACC Pointer to an DACC instance.
* \param idDACC identifier of DAC peripheral
* \param trgEn trigger mode, free running mode or external Hardware trigger
* \param word transfer size,word or half word
* \param trgSel hardware trigger selection
* \param sleepMode sleep mode selection
* \param mck value of MCK in Hz
* \param refresh refresh period
* \param user_sel user channel selection ,0 or 1
* \param tag_mode tag for channel number
* \param startup value of the start up time (in DACCClock) (see datasheet)
*/
extern void DACC_Initialize( Dacc* pDACC,
uint8_t idDACC,
uint8_t trgEn,
uint8_t trgSel,
uint8_t word,
uint8_t sleepMode,
uint32_t mck,
uint8_t refresh, /* refresh period */
uint8_t user_sel, /* user channel selection */
uint32_t tag_mode, /* using tag for channel number */
uint32_t startup
)
{
assert( 1024*refresh*1000/(mck>>1) < 20 ) ;
/* Enable peripheral clock*/
PMC->PMC_PCER0 = 1 << idDACC;
/* Reset the controller */
DACC_SoftReset(pDACC);
/* Write to the MR register */
DACC_CfgModeReg( pDACC,
( (trgEn<<0) & DACC_MR_TRGEN)
| DACC_MR_TRGSEL(trgSel)
| ( (word<<4) & DACC_MR_WORD)
| ( (sleepMode<<5) & DACC_MR_SLEEP)
| DACC_MR_REFRESH(refresh)
| ( (user_sel<<DACC_MR_USER_SEL_Pos)& DACC_MR_USER_SEL_Msk)
| ( (tag_mode<<20) & DACC_MR_TAG)
| ( (startup<<DACC_MR_STARTUP_Pos) & DACC_MR_STARTUP_Msk));
}
/**
* Set the Conversion Data
* \param pDACC Pointer to an Dacc instance.
* \param data date to be converted.
*/
extern void DACC_SetConversionData( Dacc* pDACC, uint32_t dwData )
{
uint32_t dwMR = pDACC->DACC_MR ;
if ( dwMR & DACC_MR_WORD )
{
pDACC->DACC_CDR = dwData ;
}
else
{
pDACC->DACC_CDR = (dwData&0xFFFF) ;
}
}
/**
* \brief Write converted data through PDC channel
* \param pDACC the pointer of DACC peripheral
* \param pBuffer the destination buffer
* \param size the size of the buffer
*/
extern uint32_t DACC_WriteBuffer( Dacc* pDACC, uint16_t *pwBuffer, uint32_t dwSize )
{
/* Check if the first PDC bank is free*/
if ( (pDACC->DACC_TCR == 0) && (pDACC->DACC_TNCR == 0) )
{
pDACC->DACC_TPR = (uint32_t)pwBuffer ;
pDACC->DACC_TCR = dwSize ;
pDACC->DACC_PTCR = DACC_PTCR_TXTEN ;
return 1 ;
}
/* Check if the second PDC bank is free*/
else
{
if (pDACC->DACC_TNCR == 0)
{
pDACC->DACC_TNPR = (uint32_t)pwBuffer ;
pDACC->DACC_TNCR = dwSize ;
return 1 ;
}
else
{
return 0 ;
}
}
}

289
firmware/atmel_softpack_libraries/libchip_sam3s/source/efc.c Normal file
View File

@@ -0,0 +1,289 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/** \addtogroup efc_module Working with EEFC
* The EEFC driver provides the interface to configure and use the EEFC
* peripheral.
*
* The user needs to set the number of wait states depending on the frequency used.\n
* Configure number of cycles for flash read/write operations in the FWS field of EEFC_FMR.
*
* It offers a function to send flash command to EEFC and waits for the
* flash to be ready.
*
* To send flash command, the user could do in either of following way:
* <ul>
* <li>Write a correct key, command and argument in EEFC_FCR. </li>
* <li>Or, Use IAP (In Application Programming) function which is executed from
* ROM directly, this allows flash programming to be done by code running in flash.</li>
* <li>Once the command is achieved, it can be detected even by polling EEFC_FSR or interrupt.
* </ul>
*
* The command argument could be a page number,GPNVM number or nothing, it depends on
* the command itself. Some useful functions in this driver could help user tranlate physical
* flash address into a page number and vice verse.
*
* For more accurate information, please look at the EEFC section of the
* Datasheet.
*
* Related files :\n
* \ref efc.c\n
* \ref efc.h.\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* Implementation of Enhanced Embedded Flash Controller (EEFC).
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <assert.h>
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Enables the flash ready interrupt source on the EEFC peripheral.
*
* \param efc Pointer to a Efc instance
*/
extern void EFC_EnableFrdyIt( Efc* efc )
{
efc->EEFC_FMR |= EEFC_FMR_FRDY ;
}
/**
* \brief Disables the flash ready interrupt source on the EEFC peripheral.
*
* \param efc Pointer to a Efc instance
*/
extern void EFC_DisableFrdyIt( Efc* efc )
{
efc->EEFC_FMR &= ~((uint32_t)EEFC_FMR_FRDY) ;
}
/**
* \brief Set read/write wait state on the EEFC perpherial.
*
* \param efc Pointer to a Efc instance
* \param cycles the number of wait states in cycle.
*/
extern void EFC_SetWaitState( Efc* efc, uint8_t ucCycles )
{
uint32_t dwValue ;
dwValue = efc->EEFC_FMR ;
dwValue &= ~((uint32_t)EEFC_FMR_FWS_Msk) ;
dwValue |= EEFC_FMR_FWS(ucCycles);
efc->EEFC_FMR = dwValue ;
}
/**
* \brief Returns the current status of the EEFC.
*
* \note Keep in mind that this function clears the value of some status bits (LOCKE, PROGE).
*
* \param efc Pointer to a Efc instance
*/
extern uint32_t EFC_GetStatus( Efc* efc )
{
return efc->EEFC_FSR ;
}
/**
* \brief Returns the result of the last executed command.
*
* \param efc Pointer to a Efc instance
*/
extern uint32_t EFC_GetResult( Efc* efc )
{
return efc->EEFC_FRR ;
}
/**
* \brief Translates the given address page and offset values.
* \note The resulting values are stored in the provided variables if they are not null.
*
* \param efc Pointer to a Efc instance
* \param address Address to translate.
* \param pPage First page accessed.
* \param pOffset Byte offset in first page.
*/
extern void EFC_TranslateAddress( Efc** ppEfc, uint32_t dwAddress, uint16_t* pwPage, uint16_t* pwOffset )
{
Efc *pEfc ;
uint16_t wPage ;
uint16_t wOffset ;
assert( dwAddress >= IFLASH_ADDR ) ;
assert( dwAddress <= (IFLASH_ADDR + IFLASH_SIZE) ) ;
pEfc = EFC ;
wPage = (dwAddress - IFLASH_ADDR) / IFLASH_PAGE_SIZE;
wOffset = (dwAddress - IFLASH_ADDR) % IFLASH_PAGE_SIZE;
TRACE_DEBUG( "Translated 0x%08X to page=%d and offset=%d\n\r", dwAddress, wPage, wOffset ) ;
/* Store values */
if ( pEfc )
{
*ppEfc = pEfc ;
}
if ( pwPage )
{
*pwPage = wPage ;
}
if ( pwOffset )
{
*pwOffset = wOffset ;
}
}
/**
* \brief Computes the address of a flash access given the page and offset.
*
* \param efc Pointer to a Efc instance
* \param page Page number.
* \param offset Byte offset inside page.
* \param pAddress Computed address (optional).
*/
extern void EFC_ComputeAddress( Efc *efc, uint16_t wPage, uint16_t wOffset, uint32_t *pdwAddress )
{
uint32_t dwAddress ;
assert( efc ) ;
assert( wPage <= IFLASH_NB_OF_PAGES ) ;
assert( wOffset < IFLASH_PAGE_SIZE ) ;
/* Compute address */
dwAddress = IFLASH_ADDR + wPage * IFLASH_PAGE_SIZE + wOffset ;
/* Store result */
if ( pdwAddress != NULL )
{
*pdwAddress = dwAddress ;
}
}
/**
* \brief Starts the executing the given command on the EEFC and returns as soon as the command is started.
*
* \note It does NOT set the FMCN field automatically.
* \param efc Pointer to a Efc instance
* \param command Command to execute.
* \param argument Command argument (should be 0 if not used).
*/
extern void EFC_StartCommand( Efc* efc, uint32_t dwCommand, uint32_t dwArgument )
{
/* Check command & argument */
switch ( dwCommand )
{
case EFC_FCMD_WP:
case EFC_FCMD_WPL:
case EFC_FCMD_EWP:
case EFC_FCMD_EWPL:
case EFC_FCMD_SLB:
case EFC_FCMD_CLB:
assert( dwArgument < IFLASH_NB_OF_PAGES ) ;
break ;
case EFC_FCMD_SFB:
case EFC_FCMD_CFB:
assert( dwArgument < 2 ) ;
break;
case EFC_FCMD_GETD:
case EFC_FCMD_EA:
case EFC_FCMD_GLB:
case EFC_FCMD_GFB:
case EFC_FCMD_STUI:
assert( dwArgument == 0 ) ;
break;
default: assert( 0 ) ;
}
/* Start command Embedded flash */
assert( (efc->EEFC_FSR & EEFC_FMR_FRDY) == EEFC_FMR_FRDY ) ;
efc->EEFC_FCR = EEFC_FCR_FKEY(0x5A) | EEFC_FCR_FARG(dwArgument) | EEFC_FCR_FCMD(dwCommand) ;
}
/**
* \brief Performs the given command and wait until its completion (or an error).
*
* \param efc Pointer to a Efc instance
* \param command Command to perform.
* \param argument Optional command argument.
*
* \return 0 if successful, otherwise returns an error code.
*/
extern uint32_t EFC_PerformCommand( Efc* efc, uint32_t dwCommand, uint32_t dwArgument, uint32_t dwUseIAP )
{
if ( dwUseIAP != 0 )
{
/* Pointer on IAP function in ROM */
static uint32_t (*IAP_PerformCommand)( uint32_t, uint32_t ) ;
IAP_PerformCommand = (uint32_t (*)( uint32_t, uint32_t )) *((uint32_t*)CHIP_FLASH_IAP_ADDRESS ) ;
IAP_PerformCommand( 0, EEFC_FCR_FKEY(0x5A) | EEFC_FCR_FARG(dwArgument) | EEFC_FCR_FCMD(dwCommand) ) ;
return (efc->EEFC_FSR & (EEFC_FSR_FLOCKE | EEFC_FSR_FCMDE)) ;
}
else
{
uint32_t dwStatus ;
efc->EEFC_FCR = EEFC_FCR_FKEY(0x5A) | EEFC_FCR_FARG(dwArgument) | EEFC_FCR_FCMD(dwCommand) ;
do
{
dwStatus = efc->EEFC_FSR ;
}
while ( (dwStatus & EEFC_FSR_FRDY) != EEFC_FSR_FRDY ) ;
return ( dwStatus & (EEFC_FSR_FLOCKE | EEFC_FSR_FCMDE) ) ;
}
}

384
firmware/atmel_softpack_libraries/libchip_sam3s/source/exceptions.c Normal file
View File

@@ -0,0 +1,384 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
* This file contains the default exception handlers.
*
* \note
* The exception handler has weak aliases.
* As they are weak aliases, any function with the same name will override
* this definition.
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Default interrupt handler for not used irq.
*/
void IrqHandlerNotUsed( void )
{
while ( 1 ) ;
}
/**
* \brief Default NMI interrupt handler.
*/
WEAK void NMI_Handler( void )
{
while ( 1 ) ;
}
/**
* \brief Default HardFault interrupt handler.
*/
WEAK void HardFault_Handler( void )
{
while ( 1 ) ;
}
/**
* \brief Default MemManage interrupt handler.
*/
WEAK void MemManage_Handler( void )
{
while ( 1 ) ;
}
/**
* \brief Default BusFault interrupt handler.
*/
WEAK void BusFault_Handler( void )
{
while ( 1 ) ;
}
/**
* \brief Default UsageFault interrupt handler.
*/
WEAK void UsageFault_Handler( void )
{
while ( 1 ) ;
}
/**
* \brief Default SVC interrupt handler.
*/
WEAK void SVC_Handler( void )
{
while ( 1 ) ;
}
/**
* \brief Default DebugMon interrupt handler.
*/
WEAK void DebugMon_Handler( void )
{
while ( 1 ) ;
}
/**
* \brief Default PendSV interrupt handler.
*/
WEAK void PendSV_Handler( void )
{
while ( 1 ) ;
}
/**
* \brief Default SysTick interrupt handler.
*/
WEAK void SysTick_Handler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for Supply Controller.
*/
WEAK void SUPC_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for Reset Controller.
*/
WEAK void RSTC_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for Real Time Clock.
*/
WEAK void RTC_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for Real Time Timer.
*/
WEAK void RTT_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for Watchdog Timer.
*/
WEAK void WDT_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for PMC.
*/
WEAK void PMC_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for EEFC.
*/
WEAK void EEFC_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for UART0.
*/
WEAK void UART0_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for UART1.
*/
WEAK void UART1_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for SMC.
*/
WEAK void SMC_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for PIOA Controller.
*/
WEAK void PIOA_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for PIOB Controller.
*/
WEAK void PIOB_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for PIOC Controller.
*/
WEAK void PIOC_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for USART0.
*/
WEAK void USART0_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for USART1.
*/
WEAK void USART1_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for MCI.
*/
WEAK void MCI_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for TWI0.
*/
WEAK void TWI0_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for TWI1.
*/
WEAK void TWI1_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for SPI.
*/
WEAK void SPI_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for SSC.
*/
WEAK void SSC_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for TC0.
*/
WEAK void TC0_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for TC1.
*/
WEAK void TC1_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default interrupt handler for TC2.
*/
WEAK void TC2_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default SUPC interrupt handler for TC3.
*/
WEAK void TC3_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default SUPC interrupt handler for TC4.
*/
WEAK void TC4_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default SUPC interrupt handler for TC5.
*/
WEAK void TC5_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default SUPC interrupt handler for ADC.
*/
WEAK void ADC_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default SUPC interrupt handler for DAC.
*/
WEAK void DAC_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default SUPC interrupt handler for PWM.
*/
WEAK void PWM_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default SUPC interrupt handler for CRCCU.
*/
WEAK void CRCCU_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default SUPC interrupt handler for ACC.
*/
WEAK void ACC_IrqHandler( void )
{
while ( 1 ) ;
}
/**
* \brief Default SUPC interrupt handler for USBD.
*/
WEAK void USBD_IrqHandler( void )
{
while ( 1 ) ;
}

512
firmware/atmel_softpack_libraries/libchip_sam3s/source/flashd.c Normal file
View File

@@ -0,0 +1,512 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/** \addtogroup flashd_module Flash Memory Interface
* The flash driver manages the programming, erasing, locking and unlocking sequences
* with dedicated commands.
*
* To implement flash programing operation, the user has to follow these few steps :
* <ul>
* <li>Configue flash wait states to initializes the flash. </li>
* <li>Checks whether a region to be programmed is locked. </li>
* <li>Unlocks the user region to be programmed if the region have locked before.</li>
* <li>Erases the user page before program (optional).</li>
* <li>Writes the user page from the page buffer.</li>
* <li>Locks the region of programmed area if any.</li>
* </ul>
*
* Writing 8-bit and 16-bit data is not allowed and may lead to unpredictable data corruption.
* A check of this validity and padding for 32-bit alignment should be done in write algorithm.
* Lock/unlock range associated with the user address range is automatically translated.
*
* This security bit can be enabled through the command "Set General Purpose NVM Bit 0".
*
* A 128-bit factory programmed unique ID could be read to serve several purposes.
*
* The driver accesses the flash memory by calling the lowlevel module provided in \ref efc_module.
* For more accurate information, please look at the EEFC section of the Datasheet.
*
* Related files :\n
* \ref flashd.c\n
* \ref flashd.h.\n
* \ref efc.c\n
* \ref efc.h.\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* The flash driver provides the unified interface for flash program operations.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <string.h>
#include <assert.h>
/*----------------------------------------------------------------------------
* Local variables
*----------------------------------------------------------------------------*/
//static NO_INIT uint8_t _aucPageBuffer[IFLASH_PAGE_SIZE] ;
static NO_INIT uint32_t _adwPageBuffer[IFLASH_PAGE_SIZE/4] ;
static uint8_t* _aucPageBuffer = (uint8_t*)_adwPageBuffer;
static NO_INIT uint32_t _dwUseIAP ;
/*----------------------------------------------------------------------------
* Local macros
*----------------------------------------------------------------------------*/
#define min( a, b ) (((a) < (b)) ? (a) : (b))
/*----------------------------------------------------------------------------
* Local functions
*----------------------------------------------------------------------------*/
/**
* \brief Computes the lock range associated with the given address range.
*
* \param dwStart Start address of lock range.
* \param dwEnd End address of lock range.
* \param pdwActualStart Actual start address of lock range.
* \param pdwActualEnd Actual end address of lock range.
*/
static void ComputeLockRange( uint32_t dwStart, uint32_t dwEnd, uint32_t *pdwActualStart, uint32_t *pdwActualEnd )
{
Efc* pStartEfc ;
Efc* pEndEfc ;
uint16_t wStartPage ;
uint16_t wEndPage ;
uint16_t wNumPagesInRegion ;
uint16_t wActualStartPage ;
uint16_t wActualEndPage ;
// Convert start and end address in page numbers
EFC_TranslateAddress( &pStartEfc, dwStart, &wStartPage, 0 ) ;
EFC_TranslateAddress( &pEndEfc, dwEnd, &wEndPage, 0 ) ;
// Find out the first page of the first region to lock
wNumPagesInRegion = IFLASH_LOCK_REGION_SIZE / IFLASH_PAGE_SIZE ;
wActualStartPage = wStartPage - (wStartPage % wNumPagesInRegion) ;
wActualEndPage = wEndPage ;
if ( (wEndPage % wNumPagesInRegion) != 0 )
{
wActualEndPage += wNumPagesInRegion - (wEndPage % wNumPagesInRegion) ;
}
// Store actual page numbers
EFC_ComputeAddress( pStartEfc, wActualStartPage, 0, pdwActualStart ) ;
EFC_ComputeAddress( pEndEfc, wActualEndPage, 0, pdwActualEnd ) ;
TRACE_DEBUG( "Actual lock range is 0x%06X - 0x%06X\n\r", *pdwActualStart, *pdwActualEnd ) ;
}
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Initializes the flash driver.
*
* \param mck Master clock frequency in Hz.
*/
extern void FLASHD_Initialize( uint32_t dwMCk, uint32_t dwUseIAP )
{
EFC_DisableFrdyIt( EFC ) ;
if ( (dwMCk/1000000) >= 64 )
{
EFC_SetWaitState( EFC, 2 ) ;
}
else
{
if ( (dwMCk/1000000) >= 50 )
{
EFC_SetWaitState( EFC, 1 ) ;
}
else
{
EFC_SetWaitState( EFC, 0 ) ;
}
}
_dwUseIAP=dwUseIAP ;
}
/**
* \brief Erases the entire flash.
*
* \param address Flash start address.
* \return 0 if successful; otherwise returns an error code.
*/
extern uint32_t FLASHD_Erase( uint32_t dwAddress )
{
Efc* pEfc ;
uint16_t wPage ;
uint16_t wOffset ;
uint32_t dwError ;
assert( (dwAddress >=IFLASH_ADDR) || (dwAddress <= (IFLASH_ADDR + IFLASH_SIZE)) ) ;
// Translate write address
EFC_TranslateAddress( &pEfc, dwAddress, &wPage, &wOffset ) ;
dwError = EFC_PerformCommand( pEfc, EFC_FCMD_EA, 0, _dwUseIAP ) ;
return dwError ;
}
/**
* \brief Writes a data buffer in the internal flash
*
* \note This function works in polling mode, and thus only returns when the
* data has been effectively written.
* \param address Write address.
* \param pBuffer Data buffer.
* \param size Size of data buffer in bytes.
* \return 0 if successful, otherwise returns an error code.
*/
extern uint32_t FLASHD_Write( uint32_t dwAddress, const void *pvBuffer, uint32_t dwSize )
{
Efc* pEfc ;
uint16_t page ;
uint16_t offset ;
uint32_t writeSize ;
uint32_t pageAddress ;
uint16_t padding ;
uint32_t dwError ;
uint32_t sizeTmp ;
uint32_t *pAlignedDestination ;
uint32_t *pAlignedSource ;
assert( pvBuffer ) ;
assert( dwAddress >=IFLASH_ADDR ) ;
assert( (dwAddress + dwSize) <= (IFLASH_ADDR + IFLASH_SIZE) ) ;
/* Translate write address */
EFC_TranslateAddress( &pEfc, dwAddress, &page, &offset ) ;
/* Write all pages */
while ( dwSize > 0 )
{
/* Copy data in temporary buffer to avoid alignment problems */
writeSize = min((uint32_t)IFLASH_PAGE_SIZE - offset, dwSize ) ;
EFC_ComputeAddress(pEfc, page, 0, &pageAddress ) ;
padding = IFLASH_PAGE_SIZE - offset - writeSize ;
/* Pre-buffer data */
memcpy( _aucPageBuffer, (void *) pageAddress, offset);
/* Buffer data */
memcpy( _aucPageBuffer + offset, pvBuffer, writeSize);
/* Post-buffer data */
memcpy( _aucPageBuffer + offset + writeSize, (void *) (pageAddress + offset + writeSize), padding);
/* Write page
* Writing 8-bit and 16-bit data is not allowed and may lead to unpredictable data corruption
*/
pAlignedDestination = (uint32_t*)pageAddress ;
pAlignedSource = (uint32_t*)_adwPageBuffer ;
sizeTmp = IFLASH_PAGE_SIZE ;
while ( sizeTmp >= 4 )
{
*pAlignedDestination++ = *pAlignedSource++;
sizeTmp -= 4;
}
/* Send writing command */
dwError = EFC_PerformCommand( pEfc, EFC_FCMD_EWP, page, _dwUseIAP ) ;
if ( dwError )
{
return dwError ;
}
/* Progression */
dwAddress += IFLASH_PAGE_SIZE ;
pvBuffer = (void *)((uint32_t) pvBuffer + writeSize) ;
dwSize -= writeSize ;
page++;
offset = 0;
}
return 0 ;
}
/**
* \brief Locks all the regions in the given address range. The actual lock range is
* reported through two output parameters.
*
* \param start Start address of lock range.
* \param end End address of lock range.
* \param pActualStart Start address of the actual lock range (optional).
* \param pActualEnd End address of the actual lock range (optional).
* \return 0 if successful, otherwise returns an error code.
*/
extern uint32_t FLASHD_Lock( uint32_t start, uint32_t end, uint32_t *pActualStart, uint32_t *pActualEnd )
{
Efc *pEfc ;
uint32_t actualStart, actualEnd ;
uint16_t startPage, endPage ;
uint32_t dwError ;
uint16_t numPagesInRegion = IFLASH_LOCK_REGION_SIZE / IFLASH_PAGE_SIZE;
/* Compute actual lock range and store it */
ComputeLockRange( start, end, &actualStart, &actualEnd ) ;
if ( pActualStart != NULL )
{
*pActualStart = actualStart ;
}
if ( pActualEnd != NULL )
{
*pActualEnd = actualEnd;
}
/* Compute page numbers */
EFC_TranslateAddress( &pEfc, actualStart, &startPage, 0 ) ;
EFC_TranslateAddress( 0, actualEnd, &endPage, 0 ) ;
/* Lock all pages */
while ( startPage < endPage )
{
dwError = EFC_PerformCommand( pEfc, EFC_FCMD_SLB, startPage, _dwUseIAP ) ;
if ( dwError )
{
return dwError ;
}
startPage += numPagesInRegion;
}
return 0 ;
}
/**
* \brief Unlocks all the regions in the given address range. The actual unlock range is
* reported through two output parameters.
* \param start Start address of unlock range.
* \param end End address of unlock range.
* \param pActualStart Start address of the actual unlock range (optional).
* \param pActualEnd End address of the actual unlock range (optional).
* \return 0 if successful, otherwise returns an error code.
*/
extern uint32_t FLASHD_Unlock( uint32_t start, uint32_t end, uint32_t *pActualStart, uint32_t *pActualEnd )
{
Efc* pEfc ;
uint32_t actualStart, actualEnd ;
uint16_t startPage, endPage ;
uint32_t dwError ;
uint16_t numPagesInRegion = IFLASH_LOCK_REGION_SIZE / IFLASH_PAGE_SIZE;
// Compute actual unlock range and store it
ComputeLockRange(start, end, &actualStart, &actualEnd);
if ( pActualStart != NULL )
{
*pActualStart = actualStart ;
}
if ( pActualEnd != NULL )
{
*pActualEnd = actualEnd ;
}
// Compute page numbers
EFC_TranslateAddress( &pEfc, actualStart, &startPage, 0 ) ;
EFC_TranslateAddress( 0, actualEnd, &endPage, 0 ) ;
// Unlock all pages
while ( startPage < endPage )
{
dwError = EFC_PerformCommand( pEfc, EFC_FCMD_CLB, startPage, _dwUseIAP ) ;
if ( dwError )
{
return dwError ;
}
startPage += numPagesInRegion ;
}
return 0 ;
}
/**
* \brief Returns the number of locked regions inside the given address range.
*
* \param start Start address of range
* \param end End address of range.
*/
extern uint32_t FLASHD_IsLocked( uint32_t start, uint32_t end )
{
Efc *pEfc ;
uint16_t startPage, endPage ;
uint8_t startRegion, endRegion ;
uint32_t numPagesInRegion ;
uint32_t status ;
uint32_t dwError ;
uint32_t numLockedRegions = 0 ;
assert( end >= start ) ;
assert( (start >=IFLASH_ADDR) && (end <= IFLASH_ADDR + IFLASH_SIZE) ) ;
// Compute page numbers
EFC_TranslateAddress( &pEfc, start, &startPage, 0 ) ;
EFC_TranslateAddress( 0, end, &endPage, 0 ) ;
// Compute region numbers
numPagesInRegion = IFLASH_LOCK_REGION_SIZE / IFLASH_PAGE_SIZE ;
startRegion = startPage / numPagesInRegion ;
endRegion = endPage / numPagesInRegion ;
if ((endPage % numPagesInRegion) != 0)
{
endRegion++ ;
}
// Retrieve lock status
dwError = EFC_PerformCommand( pEfc, EFC_FCMD_GLB, 0, _dwUseIAP ) ;
assert( !dwError ) ;
status = EFC_GetResult( pEfc ) ;
// Check status of each involved region
while ( startRegion < endRegion )
{
if ( (status & (1 << startRegion)) != 0 )
{
numLockedRegions++ ;
}
startRegion++ ;
}
return numLockedRegions ;
}
/**
* \brief Check if the given GPNVM bit is set or not.
*
* \param gpnvm GPNVM bit index.
* \returns 1 if the given GPNVM bit is currently set; otherwise returns 0.
*/
extern uint32_t FLASHD_IsGPNVMSet( uint8_t ucGPNVM )
{
uint32_t dwError ;
uint32_t dwStatus ;
assert( ucGPNVM < 2 ) ;
/* Get GPNVMs status */
dwError = EFC_PerformCommand( EFC, EFC_FCMD_GFB, 0, _dwUseIAP ) ;
assert( !dwError ) ;
dwStatus = EFC_GetResult( EFC ) ;
/* Check if GPNVM is set */
if ( (dwStatus & (1 << ucGPNVM)) != 0 )
{
return 1 ;
}
else
{
return 0 ;
}
}
/**
* \brief Sets the selected GPNVM bit.
*
* \param gpnvm GPNVM bit index.
* \returns 0 if successful; otherwise returns an error code.
*/
extern uint32_t FLASHD_SetGPNVM( uint8_t ucGPNVM )
{
assert( ucGPNVM < 2 ) ;
if ( !FLASHD_IsGPNVMSet( ucGPNVM ) )
{
return EFC_PerformCommand( EFC, EFC_FCMD_SFB, ucGPNVM, _dwUseIAP ) ;
}
else
{
return 0 ;
}
}
/**
* \brief Clears the selected GPNVM bit.
*
* \param gpnvm GPNVM bit index.
* \returns 0 if successful; otherwise returns an error code.
*/
extern uint32_t FLASHD_ClearGPNVM( uint8_t ucGPNVM )
{
assert( ucGPNVM < 2 ) ;
if ( FLASHD_IsGPNVMSet( ucGPNVM ) )
{
return EFC_PerformCommand( EFC, EFC_FCMD_CFB, ucGPNVM, _dwUseIAP ) ;
}
else
{
return 0 ;
}
}
/**
* \brief Read the unique ID.
*
* \param uniqueID pointer on a 4bytes char containing the unique ID value.
* \returns 0 if successful; otherwise returns an error code.
*/
extern uint32_t FLASHD_ReadUniqueID( uint32_t* pdwUniqueID )
{
uint32_t dwError ;
assert( pdwUniqueID != NULL ) ;
pdwUniqueID[0] = 0 ;
pdwUniqueID[1] = 0 ;
pdwUniqueID[2] = 0 ;
pdwUniqueID[3] = 0 ;
EFC_StartCommand( EFC, EFC_FCMD_STUI, 0 ) ;
pdwUniqueID[0] = *(uint32_t*) IFLASH_ADDR;
pdwUniqueID[1] = *(uint32_t*)(IFLASH_ADDR + 4) ;
pdwUniqueID[2] = *(uint32_t*)(IFLASH_ADDR + 8) ;
pdwUniqueID[3] = *(uint32_t*)(IFLASH_ADDR + 12) ;
dwError = EFC_PerformCommand( EFC, EFC_FCMD_SPUI, 0, _dwUseIAP ) ;
if ( dwError )
{
return dwError ;
}
return 0 ;
}

262
firmware/atmel_softpack_libraries/libchip_sam3s/source/hsmci.c Normal file
View File

@@ -0,0 +1,262 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Implementation of High Speed MultiMedia Card Interface (HSMCI) controller,
* not using PDC nor DMA to transfer data.
*
*/
/*---------------------------------------------------------------------------
* Headers
*---------------------------------------------------------------------------*/
#include "chip.h"
#include <assert.h>
/*---------------------------------------------------------------------------
* Local macros
*---------------------------------------------------------------------------*/
/** Reset MCI */
#define MCI_RESET(pMciHw) (pMciHw->HSMCI_CR = HSMCI_CR_SWRST)
/*---------------------------------------------------------------------------
* Exported functions
*---------------------------------------------------------------------------*/
/**
* Enable MCI
* \param pMciHw Pointer to a MCI peripheral.
*/
void MCI_Enable(Hsmci *pMciHw)
{
pMciHw->HSMCI_CR = HSMCI_CR_MCIEN;
}
/**
* Disable MCI
* \param pMciHw Pointer to a MCI peripheral.
*/
void MCI_Disable(Hsmci *pMciHw)
{
pMciHw->HSMCI_CR = HSMCI_CR_MCIDIS;
}
/**
* Initializes a MCI driver instance and the underlying peripheral.
* \param pMci Pointer to a MCI driver instance.
* \param pMciHw Pointer to a MCI peripheral.
* \param mciId MCI peripheral identifier.
*/
void MCI_Init( Mcid *pMci, Hsmci *pMciHw, uint8_t mciId, uint32_t dwMCk )
{
unsigned short clkDiv;
/* Initialize the MCI driver structure */
pMci->pMciHw = pMciHw;
pMci->mciId = mciId;
pMci->semaphore = 1;
pMci->pCommand = NULL;
/* Enable the MCI peripheral */
PMC_EnablePeripheral( mciId ) ;
/* Reset the MCI */
pMciHw->HSMCI_CR = HSMCI_CR_SWRST;
/* Disable the MCI */
pMciHw->HSMCI_CR = HSMCI_CR_MCIDIS | HSMCI_CR_PWSDIS;
/* Disable all the interrupts */
pMciHw->HSMCI_IDR = 0xFFFFFFFF;
/* Set the Data Timeout Register */
pMciHw->HSMCI_DTOR = HSMCI_DTOR_DTOCYC_Msk | HSMCI_DTOR_DTOMUL_Msk ;
/* CSTOR ? */
pMciHw->HSMCI_CSTOR = HSMCI_CSTOR_CSTOCYC_Msk | HSMCI_CSTOR_CSTOMUL_Msk ;
/* Set the Mode Register: 400KHz for MCK = 48MHz (CLKDIV = 58) */
clkDiv = (dwMCk / (MCI_INITIAL_SPEED * 2)) - 1;
pMciHw->HSMCI_MR = (clkDiv | (HSMCI_MR_PWSDIV( 0x07 )) ) ;
/* Set the SDCard Register 1-bit, slot A */
pMciHw->HSMCI_SDCR = HSMCI_SDCR_SDCSEL_SLOTA | HSMCI_SDCR_SDCBUS_1 ;
/* Enable the MCI and the Power Saving */
pMciHw->HSMCI_CR = HSMCI_CR_MCIEN;
/* Configure MCI */
pMciHw->HSMCI_CFG = HSMCI_CFG_FIFOMODE
| ((1 << 4) & HSMCI_CFG_FERRCTRL);
/* Disable the MCI peripheral clock. */
PMC_DisablePeripheral(mciId);
}
/**
* Configure the MCI CLKDIV in the MCI_MR register. The max. for MCI clock is
* MCK/2 and corresponds to CLKDIV = 0
* \param pMci Pointer to the low level MCI driver.
* \param mciSpeed MCI clock speed in Hz, 0 will not change current speed.
* \param mck MCK to generate MCI Clock, in Hz
* \return The actual speed used, 0 for fail.
*/
uint32_t MCI_SetSpeed( Mcid* pMci, uint32_t mciSpeed, uint32_t mck )
{
Hsmci *pMciHw = pMci->pMciHw;
uint32_t mciMr;
uint32_t clkdiv;
uint8_t mciDis;
assert(pMci);
assert(pMciHw);
PMC_EnablePeripheral(pMci->mciId);
mciDis = PMC_IsPeriphEnabled(pMci->mciId);
mciMr = pMciHw->HSMCI_MR & (~(uint32_t)HSMCI_MR_CLKDIV_Msk);
/* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)
* divided by (2*(CLKDIV+1))
* mciSpeed = MCK / (2*(CLKDIV+1)) */
if (mciSpeed > 0)
{
clkdiv = (mck / 2 / mciSpeed);
/* Speed should not bigger than expired one */
if (mciSpeed < mck/2/clkdiv)
{
clkdiv ++;
}
if ( clkdiv > 0 )
{
clkdiv -= 1;
}
assert( (clkdiv & 0xFFFFFF00) == 0 ) ; /* "mciSpeed too small" */
}
else
{
clkdiv = 0 ;
}
/* Actual MCI speed */
mciSpeed = mck / 2 / (clkdiv + 1);
/* Modify MR */
pMciHw->HSMCI_MR = mciMr | clkdiv;
if ( mciDis )
{
PMC_DisablePeripheral( pMci->mciId ) ;
}
return (mciSpeed);
}
/**
* Configure the MCI_CFG to enable the HS mode
* \param pMci Pointer to the low level MCI driver.
* \param hsEnable 1 to enable, 0 to disable HS mode.
*/
uint8_t MCI_EnableHsMode(Mcid* pMci, uint8_t hsEnable)
{
Hsmci *pMciHw = pMci->pMciHw;
uint32_t cfgr;
uint8_t mciDis;
uint8_t rc = 0;
assert(pMci);
assert(pMci->pMciHw);
PMC_EnablePeripheral(pMci->mciId);
mciDis = PMC_IsPeriphEnabled(pMci->mciId);
cfgr = pMciHw->HSMCI_CFG;
if (hsEnable == 1)
{
cfgr |= HSMCI_CFG_HSMODE;
}
else
{
if (hsEnable == 0)
{
cfgr &= ~(uint32_t)HSMCI_CFG_HSMODE;
}
else
{
rc = ((cfgr & HSMCI_CFG_HSMODE) != 0);
}
}
pMciHw->HSMCI_CFG = cfgr;
if (mciDis)
{
PMC_DisablePeripheral(pMci->mciId);
}
return rc;
}
/**
* Configure the MCI SDCBUS in the MCI_SDCR register. Only two modes available
*
* \param pMci Pointer to the low level MCI driver.
* \param busWidth MCI bus width mode. 00: 1-bit, 10: 4-bit, 11: 8-bit.
*/
uint32_t MCI_SetBusWidth(Mcid*pMci, uint32_t busWidth)
{
Hsmci *pMciHw = pMci->pMciHw;
uint32_t mciSdcr;
uint8_t mciDis;
assert(pMci);
assert(pMci->pMciHw);
if( (busWidth != HSMCI_SDCR_SDCBUS_1) && (busWidth != HSMCI_SDCR_SDCBUS_4) && (busWidth != HSMCI_SDCR_SDCBUS_8) )
{
return (uint32_t)-1;
}
busWidth &= HSMCI_SDCR_SDCBUS_Msk ;
PMC_EnablePeripheral(pMci->mciId);
mciDis = PMC_IsPeriphEnabled(pMci->mciId);
mciSdcr = (pMciHw->HSMCI_SDCR & ~(uint32_t)(HSMCI_SDCR_SDCBUS_Msk));
pMciHw->HSMCI_SDCR = mciSdcr | busWidth;
if (mciDis)
{
PMC_DisablePeripheral(pMci->mciId);
}
return 0;
}

305
firmware/atmel_softpack_libraries/libchip_sam3s/source/hsmci_pdc.c Normal file
View File

@@ -0,0 +1,305 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Implementation of High Speed MultiMedia Card Interface (HSMCI) controller,
* using PDC to transfer data.
*
*/
/*---------------------------------------------------------------------------
* Headers
*---------------------------------------------------------------------------*/
#include "chip.h"
#include <assert.h>
/*---------------------------------------------------------------------------
* Local macros
*---------------------------------------------------------------------------*/
/** Reset MCI */
#define MCI_RESET(pMciHw) (pMciHw->HSMCI_CR = HSMCI_CR_SWRST)
/*---------------------------------------------------------------------------
* Exported functions
*---------------------------------------------------------------------------*/
/**
* Enable MCI
* \param pMciHw Pointer to a MCI peripheral.
*/
void MCI_Enable(Hsmci *pMciHw)
{
pMciHw->HSMCI_CR = HSMCI_CR_MCIEN;
}
/**
* Disable MCI
* \param pMciHw Pointer to a MCI peripheral.
*/
void MCI_Disable(Hsmci *pMciHw)
{
pMciHw->HSMCI_CR = HSMCI_CR_MCIDIS;
}
/**
* Initializes a MCI driver instance and the underlying peripheral.
* \param pMci Pointer to a MCI driver instance.
* \param pMciHw Pointer to a MCI peripheral.
* \param mciId MCI peripheral identifier.
*/
void MCI_Init( Mcid *pMci, Hsmci *pMciHw, uint8_t mciId, uint32_t dwMCk )
{
unsigned short clkDiv;
/* Initialize the MCI driver structure */
pMci->pMciHw = pMciHw;
pMci->mciId = mciId;
pMci->semaphore = 1;
pMci->pCommand = NULL;
/* Enable the MCI peripheral */
PMC_EnablePeripheral( mciId ) ;
/* Reset the MCI */
pMciHw->HSMCI_CR = HSMCI_CR_SWRST;
/* Disable the MCI */
pMciHw->HSMCI_CR = HSMCI_CR_MCIDIS | HSMCI_CR_PWSDIS;
/* Disable all the interrupts */
pMciHw->HSMCI_IDR = 0xFFFFFFFF;
/* Set the Data Timeout Register */
pMciHw->HSMCI_DTOR = HSMCI_DTOR_DTOCYC_Msk | HSMCI_DTOR_DTOMUL_Msk ;
/* CSTOR ? */
pMciHw->HSMCI_CSTOR = HSMCI_CSTOR_CSTOCYC_Msk | HSMCI_CSTOR_CSTOMUL_Msk ;
/* Set the Mode Register: 400KHz for MCK = 48MHz (CLKDIV = 58) */
clkDiv = (dwMCk / (MCI_INITIAL_SPEED * 2)) - 1;
pMciHw->HSMCI_MR = (clkDiv | (HSMCI_MR_PWSDIV( 0x07 )) ) ;
/* Set the SDCard Register 1-bit, slot A */
pMciHw->HSMCI_SDCR = HSMCI_SDCR_SDCSEL_SLOTA | HSMCI_SDCR_SDCBUS_1 ;
/* Enable the MCI and the Power Saving */
pMciHw->HSMCI_CR = HSMCI_CR_MCIEN;
/* Configure MCI */
pMciHw->HSMCI_CFG = HSMCI_CFG_FIFOMODE
| ((1 << 4) & HSMCI_CFG_FERRCTRL);
/* Disable the MCI peripheral clock. */
PMC_DisablePeripheral(mciId);
}
/**
* Reset MCI HW interface and disable it.
* \param keepSettings Keep old register settings, including
* _MR, _SDCR, _DTOR, _CSTOR, _DMA and _CFG.
*/
void MCI_Reset(Mcid *pMci, uint8_t keepSettings)
{
Hsmci *pMciHw = pMci->pMciHw;
uint8_t mciDis;
assert(pMci);
assert(pMci->pMciHw);
PMC_EnablePeripheral(pMci->mciId);
mciDis = PMC_IsPeriphEnabled(pMci->mciId);
if (keepSettings)
{
uint32_t mr, sdcr, dtor, cstor;
uint32_t cfg;
mr = pMciHw->HSMCI_MR;
sdcr = pMciHw->HSMCI_SDCR;
dtor = pMciHw->HSMCI_DTOR;
cstor = pMciHw->HSMCI_CSTOR;
cfg = pMciHw->HSMCI_CFG;
MCI_RESET(pMciHw);
MCI_Disable(pMciHw);
pMciHw->HSMCI_MR = mr;
pMciHw->HSMCI_SDCR = sdcr;
pMciHw->HSMCI_DTOR = dtor;
pMciHw->HSMCI_CSTOR = cstor;
pMciHw->HSMCI_CFG = cfg;
}
else
{
MCI_RESET(pMciHw);
MCI_Disable(pMciHw);
}
if ( mciDis )
{
PMC_DisablePeripheral( pMci->mciId ) ;
}
}
/**
* Configure the MCI CLKDIV in the MCI_MR register. The max. for MCI clock is
* MCK/2 and corresponds to CLKDIV = 0
* \param pMci Pointer to the low level MCI driver.
* \param mciSpeed MCI clock speed in Hz, 0 will not change current speed.
* \param mck MCK to generate MCI Clock, in Hz
* \return The actual speed used, 0 for fail.
*/
uint32_t MCI_SetSpeed( Mcid* pMci, uint32_t mciSpeed, uint32_t mck )
{
Hsmci *pMciHw = pMci->pMciHw;
uint32_t mciMr;
uint32_t clkdiv;
uint8_t mciDis;
assert(pMci);
assert(pMciHw);
PMC_EnablePeripheral(pMci->mciId);
mciDis = PMC_IsPeriphEnabled(pMci->mciId);
mciMr = pMciHw->HSMCI_MR & (~(uint32_t)HSMCI_MR_CLKDIV_Msk);
/* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)
* divided by (2*(CLKDIV+1))
* mciSpeed = MCK / (2*(CLKDIV+1)) */
if (mciSpeed > 0)
{
clkdiv = (mck / 2 / mciSpeed);
/* Speed should not bigger than expired one */
if (mciSpeed < mck/2/clkdiv)
{
clkdiv ++;
}
if ( clkdiv > 0 )
{
clkdiv -= 1;
}
assert( (clkdiv & 0xFFFFFF00) == 0 ) ; /* "mciSpeed too small" */
}
else
{
clkdiv = 0 ;
}
/* Actual MCI speed */
mciSpeed = mck / 2 / (clkdiv + 1);
/* Modify MR */
pMciHw->HSMCI_MR = mciMr | clkdiv;
if ( mciDis )
{
PMC_DisablePeripheral( pMci->mciId ) ;
}
return (mciSpeed);
}
/**
* Configure the MCI_CFG to enable the HS mode
* \param pMci Pointer to the low level MCI driver.
* \param hsEnable 1 to enable, 0 to disable HS mode.
*/
uint8_t MCI_EnableHsMode(Mcid* pMci, uint8_t hsEnable)
{
Hsmci *pMciHw = pMci->pMciHw;
uint32_t cfgr;
uint8_t mciDis;
uint8_t rc = 0;
assert(pMci);
assert(pMci->pMciHw);
PMC_EnablePeripheral(pMci->mciId);
mciDis = PMC_IsPeriphEnabled(pMci->mciId);
cfgr = pMciHw->HSMCI_CFG;
if (hsEnable == 1)
{
cfgr |= HSMCI_CFG_HSMODE;
}
else
{
if (hsEnable == 0)
{
cfgr &= ~(uint32_t)HSMCI_CFG_HSMODE;
}
else
{
rc = ((cfgr & HSMCI_CFG_HSMODE) != 0);
}
}
pMciHw->HSMCI_CFG = cfgr;
if (mciDis)
{
PMC_DisablePeripheral(pMci->mciId);
}
return rc;
}
/**
* Configure the MCI SDCBUS in the MCI_SDCR register. Only two modes available
*
* \param pMci Pointer to the low level MCI driver.
* \param busWidth MCI bus width mode. 00: 1-bit, 10: 4-bit, 11: 8-bit.
*/
uint32_t MCI_SetBusWidth(Mcid*pMci, uint32_t busWidth)
{
Hsmci *pMciHw = pMci->pMciHw;
uint32_t mciSdcr;
uint8_t mciDis;
assert(pMci);
assert(pMci->pMciHw);
if( (busWidth != HSMCI_SDCR_SDCBUS_1) && (busWidth != HSMCI_SDCR_SDCBUS_4) && (busWidth != HSMCI_SDCR_SDCBUS_8) )
{
return (uint32_t)-1;
}
busWidth &= HSMCI_SDCR_SDCBUS_Msk ;
PMC_EnablePeripheral(pMci->mciId);
mciDis = PMC_IsPeriphEnabled(pMci->mciId);
mciSdcr = (pMciHw->HSMCI_SDCR & ~(uint32_t)(HSMCI_SDCR_SDCBUS_Msk));
pMciHw->HSMCI_SDCR = mciSdcr | busWidth;
if (mciDis)
{
PMC_DisablePeripheral(pMci->mciId);
}
return 0;
}

453
firmware/atmel_softpack_libraries/libchip_sam3s/source/pio.c Normal file
View File

@@ -0,0 +1,453 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2010, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/** \file */
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include "pio.h"
#include "pmc.h"
/*----------------------------------------------------------------------------
* Local functions
*----------------------------------------------------------------------------*/
/**
* \brief Configures one or more pin(s) of a PIO controller as being controlled by
* peripheral A. Optionally, the corresponding internal pull-up(s) can be enabled.
*
* \param pio Pointer to a PIO controller.
* \param mask Bitmask of one or more pin(s) to configure.
* \param enablePullUp Indicates if the pin(s) internal pull-up shall be
* configured.
*/
static void PIO_SetPeripheralA(
Pio *pio,
unsigned int mask,
unsigned char enablePullUp)
{
unsigned int abcdsr;
/* Disable interrupts on the pin(s) */
pio->PIO_IDR = mask;
/* Enable the pull-up(s) if necessary */
if (enablePullUp) {
pio->PIO_PUER = mask;
}
else {
pio->PIO_PUDR = mask;
}
abcdsr = pio->PIO_ABCDSR[0];
pio->PIO_ABCDSR[0] &= (~mask & abcdsr);
abcdsr = pio->PIO_ABCDSR[1];
pio->PIO_ABCDSR[1] &= (~mask & abcdsr);
pio->PIO_PDR = mask;
}
/**
* \brief Configures one or more pin(s) of a PIO controller as being controlled by
* peripheral B. Optionally, the corresponding internal pull-up(s) can be enabled.
*
* \param pio Pointer to a PIO controller.
* \param mask Bitmask of one or more pin(s) to configure.
* \param enablePullUp Indicates if the pin(s) internal pull-up shall be
* configured.
*/
static void PIO_SetPeripheralB(
Pio *pio,
unsigned int mask,
unsigned char enablePullUp)
{
unsigned int abcdsr;
/* Disable interrupts on the pin(s) */
pio->PIO_IDR = mask;
/* Enable the pull-up(s) if necessary */
if (enablePullUp) {
pio->PIO_PUER = mask;
}
else {
pio->PIO_PUDR = mask;
}
abcdsr = pio->PIO_ABCDSR[0];
pio->PIO_ABCDSR[0] = (mask | abcdsr);
abcdsr = pio->PIO_ABCDSR[1];
pio->PIO_ABCDSR[1] &= (~mask & abcdsr);
pio->PIO_PDR = mask;
}
/**
* \brief Configures one or more pin(s) of a PIO controller as being controlled by
* peripheral C. Optionally, the corresponding internal pull-up(s) can be enabled.
*
* \param pio Pointer to a PIO controller.
* \param mask Bitmask of one or more pin(s) to configure.
* \param enablePullUp Indicates if the pin(s) internal pull-up shall be
* configured.
*/
static void PIO_SetPeripheralC(
Pio *pio,
unsigned int mask,
unsigned char enablePullUp)
{
unsigned int abcdsr;
/* Disable interrupts on the pin(s) */
pio->PIO_IDR = mask;
/* Enable the pull-up(s) if necessary */
if (enablePullUp) {
pio->PIO_PUER = mask;
}
else {
pio->PIO_PUDR = mask;
}
abcdsr = pio->PIO_ABCDSR[0];
pio->PIO_ABCDSR[0] &= (~mask & abcdsr);
abcdsr = pio->PIO_ABCDSR[1];
pio->PIO_ABCDSR[1] = (mask | abcdsr);
pio->PIO_PDR = mask;
}
/**
* \brief Configures one or more pin(s) of a PIO controller as being controlled by
* peripheral D. Optionally, the corresponding internal pull-up(s) can be enabled.
*
* \param pio Pointer to a PIO controller.
* \param mask Bitmask of one or more pin(s) to configure.
* \param enablePullUp Indicates if the pin(s) internal pull-up shall be
* configured.
*/
static void PIO_SetPeripheralD(
Pio *pio,
unsigned int mask,
unsigned char enablePullUp)
{
unsigned int abcdsr;
/* Disable interrupts on the pin(s) */
pio->PIO_IDR = mask;
/* Enable the pull-up(s) if necessary */
if (enablePullUp) {
pio->PIO_PUER = mask;
}
else {
pio->PIO_PUDR = mask;
}
abcdsr = pio->PIO_ABCDSR[0];
pio->PIO_ABCDSR[0] = (mask | abcdsr);
abcdsr = pio->PIO_ABCDSR[1];
pio->PIO_ABCDSR[1] = (mask | abcdsr);
pio->PIO_PDR = mask;
}
/**
* \brief Configures one or more pin(s) or a PIO controller as inputs. Optionally,
* the corresponding internal pull-up(s) and glitch filter(s) can be enabled.
*
* \param pio Pointer to a PIO controller.
* \param mask Bitmask indicating which pin(s) to configure as input(s).
* \param enablePullUp Indicates if the internal pull-up(s) must be enabled.
* \param enableFilter Indicates if the glitch filter(s) must be enabled.
*/
static void PIO_SetInput(
Pio *pio,
unsigned int mask,
unsigned char attribute)
{
/* Disable interrupts */
pio->PIO_IDR = mask;
/* Enable pull-up(s) if necessary */
if (attribute & PIO_PULLUP)
pio->PIO_PUER = mask;
else
pio->PIO_PUDR = mask;
/* Enable Input Filter if necessary */
if (attribute & (PIO_DEGLITCH | PIO_DEBOUNCE))
pio->PIO_IFER = mask;
else
pio->PIO_IFDR = mask;
/* Enable de-glitch or de-bounce if necessary */
if (attribute & PIO_DEGLITCH)
{
pio->PIO_IFSCDR = mask;
}
else
{
if (attribute & PIO_DEBOUNCE)
{
pio->PIO_IFSCER = mask;
}
}
/* Configure pin as input */
pio->PIO_ODR = mask;
pio->PIO_PER = mask;
}
/**
* \brief Configures one or more pin(s) of a PIO controller as outputs, with the
* given default value. Optionally, the multi-drive feature can be enabled
* on the pin(s).
*
* \param pio Pointer to a PIO controller.
* \param mask Bitmask indicating which pin(s) to configure.
* \param defaultValue Default level on the pin(s).
* \param enableMultiDrive Indicates if the pin(s) shall be configured as
* open-drain.
* \param enablePullUp Indicates if the pin shall have its pull-up activated.
*/
static void PIO_SetOutput(
Pio *pio,
unsigned int mask,
unsigned char defaultValue,
unsigned char enableMultiDrive,
unsigned char enablePullUp)
{
/* Disable interrupts */
pio->PIO_IDR = mask;
/* Enable pull-up(s) if necessary */
if (enablePullUp) {
pio->PIO_PUER = mask;
}
else {
pio->PIO_PUDR = mask;
}
/* Enable multi-drive if necessary */
if (enableMultiDrive) {
pio->PIO_MDER = mask;
}
else {
pio->PIO_MDDR = mask;
}
/* Set default value */
if (defaultValue) {
pio->PIO_SODR = mask;
}
else {
pio->PIO_CODR = mask;
}
/* Configure pin(s) as output(s) */
pio->PIO_OER = mask;
pio->PIO_PER = mask;
}
/*----------------------------------------------------------------------------
* Global functions
*----------------------------------------------------------------------------*/
/**
* \brief Configures a list of Pin instances, each of which can either hold a single
* pin or a group of pins, depending on the mask value; all pins are configured
* by this function. The size of the array must also be provided and is easily
* computed using PIO_LISTSIZE whenever its length is not known in advance.
*
* \param list Pointer to a list of Pin instances.
* \param size Size of the Pin list (calculated using PIO_LISTSIZE).
*
* \return 1 if the pins have been configured properly; otherwise 0.
*/
uint8_t PIO_Configure( const Pin *list, uint32_t size )
{
/* Configure pins */
while ( size > 0 )
{
switch ( list->type )
{
case PIO_PERIPH_A:
PIO_SetPeripheralA(list->pio,
list->mask,
(list->attribute & PIO_PULLUP) ? 1 : 0);
break;
case PIO_PERIPH_B:
PIO_SetPeripheralB(list->pio,
list->mask,
(list->attribute & PIO_PULLUP) ? 1 : 0);
break;
case PIO_PERIPH_C:
PIO_SetPeripheralC(list->pio,
list->mask,
(list->attribute & PIO_PULLUP) ? 1 : 0);
break;
case PIO_PERIPH_D:
PIO_SetPeripheralD(list->pio,
list->mask,
(list->attribute & PIO_PULLUP) ? 1 : 0);
break;
case PIO_INPUT:
PMC_EnablePeripheral(list->id);
PIO_SetInput(list->pio,
list->mask,
list->attribute);
break;
case PIO_OUTPUT_0:
case PIO_OUTPUT_1:
PIO_SetOutput(list->pio,
list->mask,
(list->type == PIO_OUTPUT_1),
(list->attribute & PIO_OPENDRAIN) ? 1 : 0,
(list->attribute & PIO_PULLUP) ? 1 : 0);
break;
default: return 0;
}
list++;
size--;
}
return 1;
}
/**
* \brief Sets a high output level on all the PIOs defined in the given Pin instance.
* This has no immediate effects on PIOs that are not output, but the PIO
* controller will memorize the value they are changed to outputs.
*
* \param pin Pointer to a Pin instance describing one or more pins.
*/
void PIO_Set(const Pin *pin)
{
pin->pio->PIO_SODR = pin->mask;
}
/**
* \brief Sets a low output level on all the PIOs defined in the given Pin instance.
* This has no immediate effects on PIOs that are not output, but the PIO
* controller will memorize the value they are changed to outputs.
*
* \param pin Pointer to a Pin instance describing one or more pins.
*/
void PIO_Clear(const Pin *pin)
{
pin->pio->PIO_CODR = pin->mask;
}
/**
* \brief Returns 1 if one or more PIO of the given Pin instance currently have
* a high level; otherwise returns 0. This method returns the actual value that
* is being read on the pin. To return the supposed output value of a pin, use
* PIO_GetOutputDataStatus() instead.
*
* \param pin Pointer to a Pin instance describing one or more pins.
*
* \return 1 if the Pin instance contains at least one PIO that currently has
* a high level; otherwise 0.
*/
unsigned char PIO_Get( const Pin *pin )
{
unsigned int reg ;
if ( (pin->type == PIO_OUTPUT_0) || (pin->type == PIO_OUTPUT_1) )
{
reg = pin->pio->PIO_ODSR ;
}
else
{
reg = pin->pio->PIO_PDSR ;
}
if ( (reg & pin->mask) == 0 )
{
return 0 ;
}
else
{
return 1 ;
}
}
/**
* \brief Returns 1 if one or more PIO of the given Pin are configured to output a
* high level (even if they are not output).
* To get the actual value of the pin, use PIO_Get() instead.
*
* \param pin Pointer to a Pin instance describing one or more pins.
*
* \return 1 if the Pin instance contains at least one PIO that is configured
* to output a high level; otherwise 0.
*/
unsigned char PIO_GetOutputDataStatus(const Pin *pin)
{
if ((pin->pio->PIO_ODSR & pin->mask) == 0) {
return 0;
}
else {
return 1;
}
}
/*
* \brief Configures Glitch or Debouncing filter for input.
*
* \param pin Pointer to a Pin instance describing one or more pins.
* \param cuttoff Cutt off frequency for debounce filter.
*/
void PIO_SetDebounceFilter( const Pin *pin, uint32_t cuttoff )
{
Pio *pio = pin->pio;
pio->PIO_IFSCER = pin->mask; /* set Debouncing, 0 bit field no effect */
pio->PIO_SCDR = ((32678/(2*(cuttoff))) - 1) & 0x3FFF; /* the lowest 14 bits work */
}

283
firmware/atmel_softpack_libraries/libchip_sam3s/source/pio_capture.c Normal file
View File

@@ -0,0 +1,283 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2010, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/** \addtogroup pio_capture_module Working with PIO Parallel Capture Mode
* The PIO Parallel Capture Mode driver provides the interface to configure and use the
* PIO Parallel Capture Mode peripheral.\n
*
* The PIO Controller integrates an interface able to read data from a CMOS digital
* image sensor, a high-speed parallel ADC, a DSP synchronous port in synchronous
* mode, etc.... For better understanding and to ease reading, the following
* description uses an example with a CMOS digital image sensor
*
* To use the PIO Parallel Capture, the user has to follow these few steps:
* <ul>
* <li> Enable PIOA peripheral clock </li>
* <li> Configure the PDC </li>
* <li> Configure the PIO Capture interrupt </li>
* <li> Enable the PDC </li>
* <li> Enable the PIO Capture </li>
* <li> Wait for interrupt </li>
* <li> Disable the interrupt </li>
* <li> Read the DATA </li>
* </ul>
*
* For more accurate information, please look at the PIO Parallel Capture Mode section of the
* Datasheet.
*
* Related files :\n
* \ref pio_capture.c\n
* \ref pio_capture.h\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* Implementation of PIO Parallel Capture.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <assert.h>
/*----------------------------------------------------------------------------
* Local Functions
*----------------------------------------------------------------------------*/
/** Copy the API structure for interrupt handler */
static SpioCaptureInit* _PioCaptureCopy;
/*----------------------------------------------------------------------------
* Global Functions
*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------*/
/**
* \brief The PIO_CaptureHandler must be called by the PIO Capture Interrupt
* Service Routine with the corresponding PIO Capture instance.
*/
/*----------------------------------------------------------------------------*/
extern void PIO_CaptureHandler( void )
{
volatile uint32_t pio_captureSr;
/* Read the status register*/
pio_captureSr = PIOA->PIO_PCISR ;
pio_captureSr &= PIOA->PIO_PCIMR ;
if (pio_captureSr & PIO_PCISR_DRDY)
{
/* Parallel Capture Mode Data Ready */
if ( _PioCaptureCopy->CbkDataReady != NULL )
{
_PioCaptureCopy->CbkDataReady( _PioCaptureCopy );
}
else
{
TRACE_DEBUG("IT PIO Capture Data Ready received (no callback)\n\r");
}
}
if (pio_captureSr & PIO_PCISR_OVRE)
{
/* Parallel Capture Mode Overrun Error */
if ( _PioCaptureCopy->CbkOverrun != NULL )
{
_PioCaptureCopy->CbkOverrun( _PioCaptureCopy );
}
else
{
TRACE_DEBUG("IT PIO Capture Overrun Error received (no callback)\n\r");
}
}
if (pio_captureSr & PIO_PCISR_RXBUFF)
{
/* Reception Buffer Full */
if ( _PioCaptureCopy->CbkBuffFull != NULL )
{
_PioCaptureCopy->CbkBuffFull( _PioCaptureCopy );
}
else
{
TRACE_DEBUG("IT PIO Capture Reception Buffer Full received (no callback)\n\r");
}
}
if (pio_captureSr & PIO_PCISR_ENDRX)
{
/* End of Reception Transfer */
if ( _PioCaptureCopy->CbkEndReception != NULL )
{
_PioCaptureCopy->CbkEndReception( _PioCaptureCopy );
}
else
{
TRACE_DEBUG("IT PIO Capture End of Reception Transfer received (no callback)\n\r");
}
}
}
/*----------------------------------------------------------------------------*/
/**
* \brief Disable Interupt of the PIO Capture
* \param itToDisable : Interrupt to disable
*/
/*----------------------------------------------------------------------------*/
void PIO_CaptureDisableIt( uint32_t itToDisable )
{
/* Parallel capture mode is enabled */
PIOA->PIO_PCIDR = itToDisable;
}
/*----------------------------------------------------------------------------*/
/**
* \brief Enable Interupt of the PIO Capture
* \param itToEnable : Interrupt to enable
*/
/*----------------------------------------------------------------------------*/
void PIO_CaptureEnableIt( uint32_t itToEnable )
{
/* Parallel capture mode is enabled */
PIOA->PIO_PCIER = itToEnable;
}
/*----------------------------------------------------------------------------*/
/**
* \brief Enable the PIO Capture
*/
/*----------------------------------------------------------------------------*/
void PIO_CaptureEnable( void )
{
/* PDC: Receive Pointer Register */
PIOA->PIO_RPR = (uint32_t)_PioCaptureCopy->pData ;
/* PDC: Receive Counter Register */
/* Starts peripheral data transfer if corresponding channel is active */
PIOA->PIO_RCR = PIO_RCR_RXCTR(_PioCaptureCopy->dPDCsize) ;
/* Parallel capture mode is enabled */
PIOA->PIO_PCMR |= PIO_PCMR_PCEN ;
}
/*----------------------------------------------------------------------------*/
/**
* \brief Disable the PIO Capture
*/
/*----------------------------------------------------------------------------*/
void PIO_CaptureDisable( void )
{
/* Parallel capture mode is disabled */
PIOA->PIO_PCMR &= (uint32_t)(~PIO_PCMR_PCEN) ;
}
/*----------------------------------------------------------------------------*/
/**
* \brief Initialize the PIO Capture
* Be careful to configure the PDC before enable interrupt on pio capture.
* Otherway, the pdc will go in interrupt handler continuously.
* \param dsize :
* 0 = The reception data in the PIO_PCRHR register is a BYTE (8-bit).
* 1 = The reception data in the PIO_PCRHR register is a HALF-WORD (16-bit).
* 2/3 = The reception data in the PIO_PCRHR register is a WORD (32-bit).
* \param alwaysSampling: ALWYS: Parallel Capture Mode Always Sampling
* 0 = The parallel capture mode samples the data when both data enables are active.
* 1 = The parallel capture mode samples the data whatever the data enables are.
* \param halfSampling: HALFS: Parallel Capture Mode Half Sampling
* 0 = The parallel capture mode samples all the data.
* 1 = The parallel capture mode samples the data only one time out of two.
* \param modeFirstSample: FRSTS: Parallel Capture Mode First Sample
* This bit is useful only if the HALFS bit is set to 1. If data are numbered
* in the order that they are received with an index from 0 to n:
* 0 = Only data with an even index are sampled.
* 1 = Only data with an odd index are sampled.
*/
/*----------------------------------------------------------------------------*/
void PIO_CaptureInit( SpioCaptureInit *pInit )
{
PMC_EnablePeripheral( ID_PIOA );
assert( (pInit->dsize < 0x4) ) ;
assert( (pInit->dPDCsize <= PIO_RPR_RXPTR_Msk) ) ;
assert( (pInit->alwaysSampling < 2) );
assert( (pInit->halfSampling < 2) );
assert( (pInit->modeFirstSample < 2) );
/* PDC: Transfer Control Register */
/* Disables the PDC transmitter channel requests */
PIOA->PIO_PTCR = PIO_PTCR_RXTDIS;
/* PDC: Receive Pointer Register */
PIOA->PIO_RPR = (uint32_t)pInit->pData;
/* PDC: Receive Counter Register */
/* Starts peripheral data transfer if corresponding channel is active */
PIOA->PIO_RCR = PIO_RCR_RXCTR(pInit->dPDCsize);
/* PDC: Transfer Control Register */
/* Enables PDC receiver channel requests if RXTDIS is not set */
PIOA->PIO_PTCR = PIO_PTCR_RXTEN ;
/* Copy the API structure for interrupt handler */
_PioCaptureCopy = pInit;
/* PIO Parallel Capture Mode */
PIOA->PIO_PCMR = PIO_PCMR_DSIZE(pInit->dsize)
| ((pInit->alwaysSampling<<9) & PIO_PCMR_ALWYS)
| ((pInit->halfSampling<<10) & PIO_PCMR_HALFS)
| ((pInit->modeFirstSample<<11) & PIO_PCMR_FRSTS);
if ( pInit->CbkDataReady != NULL )
{
PIOA->PIO_PCIER = PIO_PCISR_DRDY;
}
if ( pInit->CbkOverrun != NULL )
{
PIOA->PIO_PCIER = PIO_PCISR_OVRE;
}
if ( pInit->CbkEndReception != NULL )
{
PIOA->PIO_PCIER = PIO_PCISR_ENDRX;
}
if ( pInit->CbkBuffFull != NULL )
{
PIOA->PIO_PCIER = PIO_PCISR_RXBUFF;
}
// else
// {
// TRACE_INFO("No interruption, no callback\n\r");
// }
}

315
firmware/atmel_softpack_libraries/libchip_sam3s/source/pio_it.c Normal file
View File

@@ -0,0 +1,315 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/*
* \file
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <assert.h>
/*----------------------------------------------------------------------------
* Local definitions
*----------------------------------------------------------------------------*/
/* Maximum number of interrupt sources that can be defined. This
* constant can be increased, but the current value is the smallest possible
* that will be compatible with all existing projects. */
#define MAX_INTERRUPT_SOURCES 7
/*----------------------------------------------------------------------------
* Local types
*----------------------------------------------------------------------------*/
/**
* Describes a PIO interrupt source, including the PIO instance triggering the
* interrupt and the associated interrupt handler.
*/
typedef struct _InterruptSource
{
/* Pointer to the source pin instance. */
const Pin *pPin;
/* Interrupt handler. */
void (*handler)( const Pin* ) ;
} InterruptSource ;
/*----------------------------------------------------------------------------
* Local variables
*----------------------------------------------------------------------------*/
/* List of interrupt sources. */
static InterruptSource _aIntSources[MAX_INTERRUPT_SOURCES] ;
/* Number of currently defined interrupt sources. */
static uint32_t _dwNumSources = 0;
/*----------------------------------------------------------------------------
* Local Functions
*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------*/
/**
* \brief Stub, to handling all PIO Capture interrupts, if not defined.
*/
/*----------------------------------------------------------------------------*/
//extern WEAK void PIO_CaptureHandler( void )
//{
//}
/**
* \brief Handles all interrupts on the given PIO controller.
* \param id PIO controller ID.
* \param pPio PIO controller base address.
*/
extern void PioInterruptHandler( uint32_t id, Pio *pPio )
{
uint32_t status;
uint32_t i;
/* Read PIO controller status */
status = pPio->PIO_ISR;
status &= pPio->PIO_IMR;
/* Check pending events */
if ( status != 0 )
{
TRACE_DEBUG( "PIO interrupt on PIO controller #%" PRIu32 "\n\r", id ) ;
/* Find triggering source */
i = 0;
while ( status != 0 )
{
/* There cannot be an unconfigured source enabled. */
assert(i < _dwNumSources);
/* Source is configured on the same controller */
if (_aIntSources[i].pPin->id == id)
{
/* Source has PIOs whose statuses have changed */
if ( (status & _aIntSources[i].pPin->mask) != 0 )
{
TRACE_DEBUG( "Interrupt source #%" PRIu32 " triggered\n\r", i ) ;
_aIntSources[i].handler(_aIntSources[i].pPin);
status &= ~(_aIntSources[i].pPin->mask);
}
}
i++;
}
}
}
/*----------------------------------------------------------------------------
* Global Functions
*----------------------------------------------------------------------------*/
/**
* \brief Parallel IO Controller A interrupt handler
* \Redefined PIOA interrupt handler for NVIC interrupt table.
*/
extern void PIOA_IrqHandler( void )
{
if ( PIOA->PIO_PCISR != 0 )
{
PIO_CaptureHandler() ;
}
PioInterruptHandler( ID_PIOA, PIOA ) ;
}
/**
* \brief Parallel IO Controller B interrupt handler
* \Redefined PIOB interrupt handler for NVIC interrupt table.
*/
extern void PIOB_IrqHandler( void )
{
PioInterruptHandler( ID_PIOB, PIOB ) ;
}
/**
* \brief Parallel IO Controller C interrupt handler
* \Redefined PIOC interrupt handler for NVIC interrupt table.
*/
extern void PIOC_IrqHandler( void )
{
PioInterruptHandler( ID_PIOC, PIOC ) ;
}
/**
* \brief Initializes the PIO interrupt management logic
*
* The desired priority of PIO interrupts must be provided.
* Calling this function multiple times result in the reset of currently
* configured interrupts.
*
* \param priority PIO controller interrupts priority.
*/
extern void PIO_InitializeInterrupts( uint32_t dwPriority )
{
TRACE_DEBUG( "PIO_Initialize()\n\r" ) ;
/* Reset sources */
_dwNumSources = 0 ;
/* Configure PIO interrupt sources */
TRACE_DEBUG( "PIO_Initialize: Configuring PIOA\n\r" ) ;
PMC_EnablePeripheral( ID_PIOA ) ;
PIOA->PIO_ISR ;
PIOA->PIO_IDR = 0xFFFFFFFF ;
NVIC_DisableIRQ( PIOA_IRQn ) ;
NVIC_ClearPendingIRQ( PIOA_IRQn ) ;
NVIC_SetPriority( PIOA_IRQn, dwPriority ) ;
NVIC_EnableIRQ( PIOA_IRQn ) ;
TRACE_DEBUG( "PIO_Initialize: Configuring PIOB\n\r" ) ;
PMC_EnablePeripheral( ID_PIOB ) ;
PIOB->PIO_ISR ;
PIOB->PIO_IDR = 0xFFFFFFFF ;
NVIC_DisableIRQ( PIOB_IRQn ) ;
NVIC_ClearPendingIRQ( PIOB_IRQn ) ;
NVIC_SetPriority( PIOB_IRQn, dwPriority ) ;
NVIC_EnableIRQ( PIOB_IRQn ) ;
TRACE_DEBUG( "PIO_Initialize: Configuring PIOC\n\r" ) ;
PMC_EnablePeripheral( ID_PIOC ) ;
PIOC->PIO_ISR ;
PIOC->PIO_IDR = 0xFFFFFFFF ;
NVIC_DisableIRQ( PIOC_IRQn ) ;
NVIC_ClearPendingIRQ( PIOC_IRQn ) ;
NVIC_SetPriority( PIOC_IRQn, dwPriority ) ;
NVIC_EnableIRQ( PIOC_IRQn ) ;
}
/**
* Configures a PIO or a group of PIO to generate an interrupt on status
* change. The provided interrupt handler will be called with the triggering
* pin as its parameter (enabling different pin instances to share the same
* handler).
* \param pPin Pointer to a Pin instance.
* \param handler Interrupt handler function pointer.
*/
extern void PIO_ConfigureIt( const Pin *pPin, void (*handler)( const Pin* ) )
{
Pio* pio ;
InterruptSource* pSource ;
TRACE_DEBUG( "PIO_ConfigureIt()\n\r" ) ;
assert( pPin ) ;
pio = pPin->pio ;
assert( _dwNumSources < MAX_INTERRUPT_SOURCES ) ;
/* Define new source */
TRACE_DEBUG( "PIO_ConfigureIt: Defining new source #%" PRIu32 ".\n\r", _dwNumSources ) ;
pSource = &(_aIntSources[_dwNumSources]) ;
pSource->pPin = pPin ;
pSource->handler = handler ;
_dwNumSources++ ;
/* PIO3 with additional interrupt support
* Configure additional interrupt mode registers */
if ( pPin->attribute & PIO_IT_AIME )
{
// enable additional interrupt mode
pio->PIO_AIMER = pPin->mask ;
// if bit field of selected pin is 1, set as Rising Edge/High level detection event
if ( pPin->attribute & PIO_IT_RE_OR_HL )
{
pio->PIO_REHLSR = pPin->mask ;
}
else
{
pio->PIO_FELLSR = pPin->mask;
}
/* if bit field of selected pin is 1, set as edge detection source */
if (pPin->attribute & PIO_IT_EDGE)
pio->PIO_ESR = pPin->mask;
else
pio->PIO_LSR = pPin->mask;
}
else
{
/* disable additional interrupt mode */
pio->PIO_AIMDR = pPin->mask;
}
}
/**
* Enables the given interrupt source if it has been configured. The status
* register of the corresponding PIO controller is cleared prior to enabling
* the interrupt.
* \param pPin Interrupt source to enable.
*/
extern void PIO_EnableIt( const Pin *pPin )
{
TRACE_DEBUG( "PIO_EnableIt()\n\r" ) ;
assert( pPin != NULL ) ;
#ifndef NOASSERT
uint32_t i = 0;
uint32_t dwFound = 0;
while ( (i < _dwNumSources) && !dwFound )
{
if ( _aIntSources[i].pPin == pPin )
{
dwFound = 1 ;
}
i++ ;
}
assert( dwFound != 0 ) ;
#endif
pPin->pio->PIO_ISR;
pPin->pio->PIO_IER = pPin->mask ;
}
/**
* Disables a given interrupt source, with no added side effects.
*
* \param pPin Interrupt source to disable.
*/
extern void PIO_DisableIt( const Pin *pPin )
{
assert( pPin != NULL ) ;
TRACE_DEBUG( "PIO_DisableIt()\n\r" ) ;
pPin->pio->PIO_IDR = pPin->mask;
}

168
firmware/atmel_softpack_libraries/libchip_sam3s/source/pmc.c Normal file
View File

@@ -0,0 +1,168 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include "trace.h"
#include <assert.h>
/*----------------------------------------------------------------------------
* Local definitions
*----------------------------------------------------------------------------*/
#define MASK_STATUS0 0xFFFFFFFC
#define MASK_STATUS1 0xFFFFFFFF
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Enables the clock of a peripheral. The peripheral ID is used
* to identify which peripheral is targetted.
*
* \note The ID must NOT be shifted (i.e. 1 << ID_xxx).
*
* \param id Peripheral ID (ID_xxx).
*/
extern void PMC_EnablePeripheral( uint32_t dwId )
{
assert( dwId < 35 ) ;
if ( dwId < 32 )
{
if ( (PMC->PMC_PCSR0 & ((uint32_t)1 << dwId)) == ((uint32_t)1 << dwId) )
{
TRACE_DEBUG( "PMC_EnablePeripheral: clock of peripheral" " %" PRIu32 " is already enabled\n\r", dwId ) ;
}
else
{
PMC->PMC_PCER0 = 1 << dwId ;
}
}
else
{
dwId -= 32;
if ((PMC->PMC_PCSR1 & ((uint32_t)1 << dwId)) == ((uint32_t)1 << dwId))
{
TRACE_DEBUG( "PMC_EnablePeripheral: clock of peripheral" " %" PRIu32 " is already enabled\n\r", dwId + 32 ) ;
}
else
{
PMC->PMC_PCER1 = 1 << dwId ;
}
}
}
/**
* \brief Disables the clock of a peripheral. The peripheral ID is used
* to identify which peripheral is targetted.
*
* \note The ID must NOT be shifted (i.e. 1 << ID_xxx).
*
* \param id Peripheral ID (ID_xxx).
*/
extern void PMC_DisablePeripheral( uint32_t dwId )
{
assert( dwId < 35 ) ;
if ( dwId < 32 )
{
if ( (PMC->PMC_PCSR0 & ((uint32_t)1 << dwId)) != ((uint32_t)1 << dwId) )
{
TRACE_DEBUG("PMC_DisablePeripheral: clock of peripheral" " %" PRIu32 " is not enabled\n\r", dwId ) ;
}
else
{
PMC->PMC_PCDR0 = 1 << dwId ;
}
}
else
{
dwId -= 32 ;
if ( (PMC->PMC_PCSR1 & ((uint32_t)1 << dwId)) != ((uint32_t)1 << dwId) )
{
TRACE_DEBUG( "PMC_DisablePeripheral: clock of peripheral" " %" PRIu32 " is not enabled\n\r", dwId + 32 ) ;
}
else
{
PMC->PMC_PCDR1 = 1 << dwId ;
}
}
}
/**
* \brief Enable all the periph clock via PMC.
*/
extern void PMC_EnableAllPeripherals( void )
{
PMC->PMC_PCER0 = MASK_STATUS0 ;
while ( (PMC->PMC_PCSR0 & MASK_STATUS0) != MASK_STATUS0 ) ;
PMC->PMC_PCER1 = MASK_STATUS1 ;
while ( (PMC->PMC_PCSR1 & MASK_STATUS1) != MASK_STATUS1 ) ;
TRACE_DEBUG( "Enable all periph clocks\n\r" ) ;
}
/**
* \brief Disable all the periph clock via PMC.
*/
extern void PMC_DisableAllPeripherals( void )
{
PMC->PMC_PCDR0 = MASK_STATUS0 ;
while ( (PMC->PMC_PCSR0 & MASK_STATUS0) != 0 ) ;
PMC->PMC_PCDR1 = MASK_STATUS1 ;
while ( (PMC->PMC_PCSR1 & MASK_STATUS1) != 0 ) ;
TRACE_DEBUG( "Disable all periph clocks\n\r" ) ;
}
/**
* \brief Get Periph Status for the given peripheral ID.
*
* \param id Peripheral ID (ID_xxx).
*/
extern uint32_t PMC_IsPeriphEnabled( uint32_t dwId )
{
assert( dwId < 35 ) ;
if ( dwId < 32 )
{
return ( PMC->PMC_PCSR0 & (1 << dwId) ) ;
}
else {
return ( PMC->PMC_PCSR1 & (1 << (dwId - 32)) ) ;
}
}

608
firmware/atmel_softpack_libraries/libchip_sam3s/source/pwmc.c Normal file
View File

@@ -0,0 +1,608 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/** \addtogroup pwm_module Working with PWM
* The PWM driver provides the interface to configure and use the PWM
* peripheral.
*
* The PWM macrocell controls square output waveforms of 4 channels.
* Characteristics of output waveforms such as period, duty-cycle,
* dead-time can be configured.\n
* Some of PWM channels can be linked together as synchronous channel and
* duty-cycle of synchronous channels can be updated by PDC automaticly.
*
* Before enabling the channels, they must have been configured first.
* The main settings include:
* <ul>
* <li>Configuration of the clock generator.</li>
* <li>Selection of the clock for each channel.</li>
* <li>Configuration of output waveform characteristics, such as period, duty-cycle etc.</li>
* <li>Configuration for synchronous channels if needed.</li>
* - Selection of the synchronous channels.
* - Selection of the moment when the WRDY flag and the corresponding PDC
* transfer request are set (PTRM and PTRCS in the PWM_SCM register).
* - Configuration of the update mode (UPDM in the PWM_SCM register).
* - Configuration of the update period (UPR in the PWM_SCUP register).
* </ul>
*
* After the channels is enabled, the user must use respective update registers
* to change the wave characteristics to prevent unexpected output waveform.
* i.e. PWM_CDTYUPDx register should be used if user want to change duty-cycle
* when the channel is enabled.
*
* For more accurate information, please look at the PWM section of the
* Datasheet.
*
* Related files :\n
* \ref pwmc.c\n
* \ref pwmc.h.\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* Implementation of the Pulse Width Modulation Controller (PWM) peripheral.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <stdint.h>
#include <assert.h>
/*----------------------------------------------------------------------------
* Local functions
*----------------------------------------------------------------------------*/
/**
* \brief Finds a prescaler/divisor couple to generate the desired frequency
* from MCK.
*
* Returns the value to enter in PWM_CLK or 0 if the configuration cannot be
* met.
*
* \param frequency Desired frequency in Hz.
* \param mck Master clock frequency in Hz.
*/
static uint16_t FindClockConfiguration(
uint32_t frequency,
uint32_t mck)
{
uint32_t divisors[11] = {1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024};
uint8_t divisor = 0;
uint32_t prescaler;
assert(frequency < mck);
/* Find prescaler and divisor values */
prescaler = (mck / divisors[divisor]) / frequency;
while ((prescaler > 255) && (divisor < 11)) {
divisor++;
prescaler = (mck / divisors[divisor]) / frequency;
}
/* Return result */
if ( divisor < 11 )
{
TRACE_DEBUG( "Found divisor=%u and prescaler=%u for freq=%uHz\n\r", divisors[divisor], prescaler, frequency ) ;
return prescaler | (divisor << 8) ;
}
else
{
return 0 ;
}
}
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Configures PWM a channel with the given parameters, basic configure function.
*
* The PWM controller must have been clocked in the PMC prior to calling this
* function.
* Beware: this function disables the channel. It waits until disable is effective.
*
* \param channel Channel number.
* \param prescaler Channel prescaler.
* \param alignment Channel alignment.
* \param polarity Channel polarity.
*/
void PWMC_ConfigureChannel(
Pwm* pPwm,
uint8_t channel,
uint32_t prescaler,
uint32_t alignment,
uint32_t polarity)
{
pPwm->PWM_CH_NUM[0].PWM_CMR = 1;
// assert(prescaler < PWM_CMR0_CPRE_MCKB);
assert((alignment & (uint32_t)~PWM_CMR_CALG) == 0);
assert((polarity & (uint32_t)~PWM_CMR_CPOL) == 0);
/* Disable channel (effective at the end of the current period) */
if ((pPwm->PWM_SR & (1 << channel)) != 0) {
pPwm->PWM_DIS = 1 << channel;
while ((pPwm->PWM_SR & (1 << channel)) != 0);
}
/* Configure channel */
pPwm->PWM_CH_NUM[channel].PWM_CMR = prescaler | alignment | polarity;
}
/**
* \brief Configures PWM a channel with the given parameters, extend configure function.
*
* The PWM controller must have been clocked in the PMC prior to calling this
* function.
* Beware: this function disables the channel. It waits until disable is effective.
*
* \param channel Channel number.
* \param prescaler Channel prescaler.
* \param alignment Channel alignment.
* \param polarity Channel polarity.
* \param countEventSelect Channel counter event selection.
* \param DTEnable Channel dead time generator enable.
* \param DTHInverte Channel Dead-Time PWMHx output Inverted.
* \param DTLInverte Channel Dead-Time PWMHx output Inverted.
*/
void PWMC_ConfigureChannelExt(
Pwm* pPwm,
uint8_t channel,
uint32_t prescaler,
uint32_t alignment,
uint32_t polarity,
uint32_t countEventSelect,
uint32_t DTEnable,
uint32_t DTHInverte,
uint32_t DTLInverte)
{
// assert(prescaler < PWM_CMR0_CPRE_MCKB);
assert((alignment & (uint32_t)~PWM_CMR_CALG) == 0);
assert((polarity & (uint32_t)~PWM_CMR_CPOL) == 0);
assert((countEventSelect & (uint32_t)~PWM_CMR_CES) == 0);
assert((DTEnable & (uint32_t)~PWM_CMR_DTE) == 0);
assert((DTHInverte & (uint32_t)~PWM_CMR_DTHI) == 0);
assert((DTLInverte & (uint32_t)~PWM_CMR_DTLI) == 0);
/* Disable channel (effective at the end of the current period) */
if ((pPwm->PWM_SR & (1 << channel)) != 0) {
pPwm->PWM_DIS = 1 << channel;
while ((pPwm->PWM_SR & (1 << channel)) != 0);
}
/* Configure channel */
pPwm->PWM_CH_NUM[channel].PWM_CMR = prescaler | alignment | polarity |
countEventSelect | DTEnable | DTHInverte | DTLInverte;
}
/**
* \brief Configures PWM clocks A & B to run at the given frequencies.
*
* This function finds the best MCK divisor and prescaler values automatically.
*
* \param clka Desired clock A frequency (0 if not used).
* \param clkb Desired clock B frequency (0 if not used).
* \param mck Master clock frequency.
*/
void PWMC_ConfigureClocks(uint32_t clka, uint32_t clkb, uint32_t mck)
{
uint32_t mode = 0;
uint32_t result;
/* Clock A */
if (clka != 0) {
result = FindClockConfiguration(clka, mck);
assert( result != 0 ) ;
mode |= result;
}
/* Clock B */
if (clkb != 0) {
result = FindClockConfiguration(clkb, mck);
assert( result != 0 ) ;
mode |= (result << 16);
}
/* Configure clocks */
TRACE_DEBUG( "Setting PWM_CLK = 0x%08X\n\r", mode ) ;
PWM->PWM_CLK = mode;
}
/**
* \brief Sets the period value used by a PWM channel.
*
* This function writes directly to the CPRD register if the channel is disabled;
* otherwise, it uses the update register CPRDUPD.
*
* \param channel Channel number.
* \param period Period value.
*/
void PWMC_SetPeriod( Pwm* pPwm, uint8_t channel, uint16_t period)
{
/* If channel is disabled, write to CPRD */
if ((pPwm->PWM_SR & (1 << channel)) == 0) {
pPwm->PWM_CH_NUM[channel].PWM_CPRD = period;
}
/* Otherwise use update register */
else {
pPwm->PWM_CH_NUM[channel].PWM_CPRDUPD = period;
}
}
/**
* \brief Sets the duty cycle used by a PWM channel.
* This function writes directly to the CDTY register if the channel is disabled;
* otherwise it uses the update register CDTYUPD.
* Note that the duty cycle must always be inferior or equal to the channel
* period.
*
* \param channel Channel number.
* \param duty Duty cycle value.
*/
void PWMC_SetDutyCycle( Pwm* pPwm, uint8_t channel, uint16_t duty)
{
assert(duty <= pPwm->PWM_CH_NUM[channel].PWM_CPRD);
/* If channel is disabled, write to CDTY */
if ((pPwm->PWM_SR & (1 << channel)) == 0) {
pPwm->PWM_CH_NUM[channel].PWM_CDTY = duty;
}
/* Otherwise use update register */
else {
pPwm->PWM_CH_NUM[channel].PWM_CDTYUPD = duty;
}
}
/**
* \brief Sets the dead time used by a PWM channel.
* This function writes directly to the DT register if the channel is disabled;
* otherwise it uses the update register DTUPD.
* Note that the dead time must always be inferior or equal to the channel
* period.
*
* \param channel Channel number.
* \param timeH Dead time value for PWMHx output.
* \param timeL Dead time value for PWMLx output.
*/
void PWMC_SetDeadTime( Pwm* pPwm, uint8_t channel, uint16_t timeH, uint16_t timeL)
{
assert(timeH <= pPwm->PWM_CH_NUM[channel].PWM_CPRD);
assert(timeL <= pPwm->PWM_CH_NUM[channel].PWM_CPRD);
/* If channel is disabled, write to DT */
if ((pPwm->PWM_SR & (1 << channel)) == 0) {
pPwm->PWM_CH_NUM[channel].PWM_DT = timeH | (timeL << 16);
}
/* Otherwise use update register */
else {
pPwm->PWM_CH_NUM[channel].PWM_DTUPD = timeH | (timeL << 16);
}
}
/**
* \brief Configures Syncronous channel with the given parameters.
* Beware: At this time, the channels should be disabled.
*
* \param channels Bitwise OR of Syncronous channels.
* \param updateMode Syncronous channel update mode.
* \param requestMode PDC transfer request mode.
* \param requestComparisonSelect PDC transfer request comparison selection.
*/
void PWMC_ConfigureSyncChannel( Pwm* pPwm,
uint32_t channels,
uint32_t updateMode,
uint32_t requestMode,
uint32_t requestComparisonSelect)
{
pPwm->PWM_SCM = channels | updateMode | requestMode | requestComparisonSelect;
}
/**
* \brief Sets the update period of the synchronous channels.
* This function writes directly to the SCUP register if the channel #0 is disabled;
* otherwise it uses the update register SCUPUPD.
*
* \param period update period.
*/
void PWMC_SetSyncChannelUpdatePeriod( Pwm* pPwm, uint8_t period)
{
/* If channel is disabled, write to SCUP */
if ((pPwm->PWM_SR & (1 << 0)) == 0) {
pPwm->PWM_SCUP = period;
}
/* Otherwise use update register */
else {
pPwm->PWM_SCUPUPD = period;
}
}
/**
* \brief Sets synchronous channels update unlock.
*
* Note: If the UPDM field is set to 0, writing the UPDULOCK bit to 1
* triggers the update of the period value, the duty-cycle and
* the dead-time values of synchronous channels at the beginning
* of the next PWM period. If the field UPDM is set to 1 or 2,
* writing the UPDULOCK bit to 1 triggers only the update of
* the period value and of the dead-time values of synchronous channels.
* This bit is automatically reset when the update is done.
*/
void PWMC_SetSyncChannelUpdateUnlock( Pwm* pPwm )
{
pPwm->PWM_SCUC = PWM_SCUC_UPDULOCK;
}
/**
* \brief Enables the given PWM channel.
*
* This does NOT enable the corresponding pin;this must be done in the user code.
*
* \param channel Channel number.
*/
void PWMC_EnableChannel( Pwm* pPwm, uint8_t channel)
{
pPwm->PWM_ENA = 1 << channel;
}
/**
* \brief Disables the given PWM channel.
*
* Beware, channel will be effectively disabled at the end of the current period.
* Application can check channel is disabled using the following wait loop:
* while ((PWM->PWM_SR & (1 << channel)) != 0);
*
* \param channel Channel number.
*/
void PWMC_DisableChannel( Pwm* pPwm, uint8_t channel)
{
pPwm->PWM_DIS = 1 << channel;
}
/**
* \brief Enables the period interrupt for the given PWM channel.
*
* \param channel Channel number.
*/
void PWMC_EnableChannelIt( Pwm* pPwm, uint8_t channel)
{
pPwm->PWM_IER1 = 1 << channel;
}
/**
* \brief Disables the period interrupt for the given PWM channel.
*
* \param channel Channel number.
*/
void PWMC_DisableChannelIt( Pwm* pPwm, uint8_t channel)
{
pPwm->PWM_IDR1 = 1 << channel;
}
/**
* \brief Enables the selected interrupts sources on a PWMC peripheral.
*
* \param sources1 Bitwise OR of selected interrupt sources of PWM_IER1.
* \param sources2 Bitwise OR of selected interrupt sources of PWM_IER2.
*/
void PWMC_EnableIt( Pwm* pPwm, uint32_t sources1, uint32_t sources2)
{
pPwm->PWM_IER1 = sources1;
pPwm->PWM_IER2 = sources2;
}
/**
* \brief Disables the selected interrupts sources on a PWMC peripheral.
*
* \param sources1 Bitwise OR of selected interrupt sources of PWM_IDR1.
* \param sources2 Bitwise OR of selected interrupt sources of PWM_IDR2.
*/
void PWMC_DisableIt( Pwm* pPwm, uint32_t sources1, uint32_t sources2)
{
pPwm->PWM_IDR1 = sources1;
pPwm->PWM_IDR2 = sources2;
}
/**
* \brief Sends the contents of buffer through a PWMC peripheral, using the PDC to
* take care of the transfer.
*
* Note: Duty cycle of syncronous channels can update by PDC
* when the field UPDM (Update Mode) in the PWM_SCM register is set to 2.
*
* \param pwmc Pointer to an Pwm instance.
* \param buffer Data buffer to send.
* \param length Length of the data buffer.
*/
uint8_t PWMC_WriteBuffer(Pwm *pwmc,
void *buffer,
uint32_t length)
{
/* Check if first bank is free */
if (pwmc->PWM_TCR == 0) {
pwmc->PWM_TPR = (uint32_t) buffer;
pwmc->PWM_TCR = length;
pwmc->PWM_PTCR = PERIPH_PTCR_TXTEN;
return 1;
}
/* Check if second bank is free */
else if (pwmc->PWM_TNCR == 0) {
pwmc->PWM_TNPR = (uint32_t) buffer;
pwmc->PWM_TNCR = length;
return 1;
}
/* No free banks */
return 0;
}
/**
* \brief Set PWM output override value.
*
* \param value Bitwise OR of output override value.
*/
void PWMC_SetOverrideValue( Pwm* pPwm, uint32_t value)
{
pPwm->PWM_OOV = value;
}
/**
* \brief Enalbe override output.
*
* \param value Bitwise OR of output selection.
* \param sync 0: enable the output asyncronously, 1: enable it syncronously
*/
void PWMC_EnableOverrideOutput( Pwm* pPwm, uint32_t value, uint32_t sync)
{
if (sync) {
pPwm->PWM_OSSUPD = value;
} else {
pPwm->PWM_OSS = value;
}
}
/**
* \brief Disalbe override output.
*
* \param value Bitwise OR of output selection.
* \param sync 0: enable the output asyncronously, 1: enable it syncronously
*/
void PWMC_DisableOverrideOutput( Pwm* pPwm, uint32_t value, uint32_t sync)
{
if (sync) {
pPwm->PWM_OSCUPD = value;
} else {
pPwm->PWM_OSC = value;
}
}
/**
* \brief Set PWM fault mode.
*
* \param mode Bitwise OR of fault mode.
*/
void PWMC_SetFaultMode( Pwm* pPwm, uint32_t mode)
{
pPwm->PWM_FMR = mode;
}
/**
* \brief PWM fault clear.
*
* \param fault Bitwise OR of fault to clear.
*/
void PWMC_FaultClear( Pwm* pPwm, uint32_t fault)
{
pPwm->PWM_FCR = fault;
}
/**
* \brief Set PWM fault protection value.
*
* \param value Bitwise OR of fault protection value.
*/
void PWMC_SetFaultProtectionValue( Pwm* pPwm, uint32_t value)
{
pPwm->PWM_FPV = value;
}
/**
* \brief Enable PWM fault protection.
*
* \param value Bitwise OR of FPEx[y].
*/
void PWMC_EnableFaultProtection( Pwm* pPwm, uint32_t value)
{
pPwm->PWM_FPE = value;
}
/**
* \brief Configure comparison unit.
*
* \param x comparison x index
* \param value comparison x value.
* \param mode comparison x mode
*/
void PWMC_ConfigureComparisonUnit( Pwm* pPwm, uint32_t x, uint32_t value, uint32_t mode)
{
assert(x < 8);
/* If channel is disabled, write to CMPxM & CMPxV */
if ((pPwm->PWM_SR & (1 << 0)) == 0) {
pPwm->PWM_CMP[x].PWM_CMPxM = mode;
pPwm->PWM_CMP[x].PWM_CMPxV = value;
}
/* Otherwise use update register */
else {
pPwm->PWM_CMP[x].PWM_CMPxMUPD = mode;
pPwm->PWM_CMP[x].PWM_CMPxVUPD = value;
}
}
/**
* \brief Configure event line mode.
*
* \param x Line x
* \param mode Bitwise OR of line mode selection
*/
void PWMC_ConfigureEventLineMode( Pwm* pPwm, uint32_t x, uint32_t mode)
{
assert(x < 2);
if (x == 0) {
pPwm->PWM_ELxMR[0] = mode;
} else if (x == 1) {
pPwm->PWM_ELxMR[1] = mode;
}
}

464
firmware/atmel_softpack_libraries/libchip_sam3s/source/rtc.c Normal file
View File

@@ -0,0 +1,464 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/** \addtogroup rtc_module Working with RTC
* The RTC driver provides the interface to configure and use the RTC
* peripheral.
*
* It manages date, time, and alarms.\n
* This timer is clocked by the 32kHz system clock, and is not impacted by
* power management settings (PMC). To be accurate, it is better to use an
* external 32kHz crystal instead of the internal 32kHz RC.\n
*
* It uses BCD format, and time can be set in AM/PM or 24h mode through a
* configuration bit in the mode register.\n
*
* To update date or time, the user has to follow these few steps :
* <ul>
* <li>Set UPDTIM and/or UPDCAL bit(s) in RTC_CR,</li>
* <li>Polling or IRQ on the ACKUPD bit of RTC_CR,</li>
* <li>Clear ACKUPD bit in RTC_SCCR,</li>
* <li>Update Time and/or Calendar values in RTC_TIMR/RTC_CALR (BCD format),</li>
* <li>Clear UPDTIM and/or UPDCAL bit in RTC_CR.</li>
* </ul>
* An alarm can be set to happen on month, date, hours, minutes or seconds,
* by setting the proper "Enable" bit of each of these fields in the Time and
* Calendar registers.
* This allows a large number of configurations to be available for the user.
* Alarm occurence can be detected even by polling or interrupt.
*
* A check of the validity of the date and time format and values written by the user is automatically done.
* Errors are reported through the Valid Entry Register.
*
* For more accurate information, please look at the RTC section of the
* Datasheet.
*
* Related files :\n
* \ref rtc.c\n
* \ref rtc.h.\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* Implementation of Real Time Clock (RTC) controller.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <stdint.h>
#include <assert.h>
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Sets the RTC in either 12 or 24 hour mode.
*
* \param mode Hour mode.
*/
extern void RTC_SetHourMode( Rtc* pRtc, uint32_t dwMode )
{
assert((dwMode & 0xFFFFFFFE) == 0);
pRtc->RTC_MR = dwMode ;
}
/**
* \brief Gets the RTC mode.
*
* \return Hour mode.
*/
extern uint32_t RTC_GetHourMode( Rtc* pRtc )
{
uint32_t dwMode ;
TRACE_DEBUG( "RTC_SetHourMode()\n\r" ) ;
dwMode = pRtc->RTC_MR;
dwMode &= 0xFFFFFFFE;
return dwMode ;
}
/**
* \brief Enables the selected interrupt sources of the RTC.
*
* \param sources Interrupt sources to enable.
*/
extern void RTC_EnableIt( Rtc* pRtc, uint32_t dwSources )
{
assert((dwSources & (uint32_t)(~0x1F)) == 0);
TRACE_DEBUG( "RTC_EnableIt()\n\r" ) ;
pRtc->RTC_IER = dwSources ;
}
/**
* \brief Disables the selected interrupt sources of the RTC.
*
* \param sources Interrupt sources to disable.
*/
extern void RTC_DisableIt( Rtc* pRtc, uint32_t dwSources )
{
assert((dwSources & (uint32_t)(~0x1F)) == 0);
TRACE_DEBUG( "RTC_DisableIt()\n\r" ) ;
pRtc->RTC_IDR = dwSources ;
}
/**
* \brief Sets the current time in the RTC.
*
* \note In successive update operations, the user must wait at least one second
* after resetting the UPDTIM/UPDCAL bit in the RTC_CR before setting these
* bits again. Please look at the RTC section of the datasheet for detail.
*
* \param ucHour Current hour in 12 or 24 hour mode.
* \param ucMinute Current minute.
* \param ucSecond Current second.
*
* \return 0 sucess, 1 fail to set
*/
extern int RTC_SetTime( Rtc* pRtc, uint8_t ucHour, uint8_t ucMinute, uint8_t ucSecond )
{
uint32_t dwTime=0 ;
uint8_t ucHour_bcd ;
uint8_t ucMin_bcd ;
uint8_t ucSec_bcd ;
TRACE_DEBUG( "RTC_SetTime(%02d:%02d:%02d)\n\r", ucHour, ucMinute, ucSecond ) ;
/* if 12-hour mode, set AMPM bit */
if ( (pRtc->RTC_MR & RTC_MR_HRMOD) == RTC_MR_HRMOD )
{
if ( ucHour > 12 )
{
ucHour -= 12 ;
dwTime |= RTC_TIMR_AMPM ;
}
}
ucHour_bcd = (ucHour%10) | ((ucHour/10)<<4) ;
ucMin_bcd = (ucMinute%10) | ((ucMinute/10)<<4) ;
ucSec_bcd = (ucSecond%10) | ((ucSecond/10)<<4) ;
/* value overflow */
if ( (ucHour_bcd & (uint8_t)(~RTC_HOUR_BIT_LEN_MASK)) |
(ucMin_bcd & (uint8_t)(~RTC_MIN_BIT_LEN_MASK)) |
(ucSec_bcd & (uint8_t)(~RTC_SEC_BIT_LEN_MASK)))
{
return 1 ;
}
dwTime = ucSec_bcd | (ucMin_bcd << 8) | (ucHour_bcd<<16) ;
pRtc->RTC_CR |= RTC_CR_UPDTIM ;
while ((pRtc->RTC_SR & RTC_SR_ACKUPD) != RTC_SR_ACKUPD) ;
pRtc->RTC_SCCR = RTC_SCCR_ACKCLR ;
pRtc->RTC_TIMR = dwTime ;
pRtc->RTC_CR &= (uint32_t)(~RTC_CR_UPDTIM) ;
pRtc->RTC_SCCR |= RTC_SCCR_SECCLR ;
return (int)(pRtc->RTC_VER & RTC_VER_NVTIM) ;
}
/**
* \brief Retrieves the current time as stored in the RTC in several variables.
*
* \param pucHour If not null, current hour is stored in this variable.
* \param pucMinute If not null, current minute is stored in this variable.
* \param pucSecond If not null, current second is stored in this variable.
*/
extern void RTC_GetTime( Rtc* pRtc, uint8_t *pucHour, uint8_t *pucMinute, uint8_t *pucSecond )
{
uint32_t dwTime ;
TRACE_DEBUG( "RTC_GetTime()\n\r" ) ;
/* Get current RTC time */
dwTime = pRtc->RTC_TIMR ;
while ( dwTime != pRtc->RTC_TIMR )
{
dwTime = pRtc->RTC_TIMR ;
}
/* Hour */
if ( pucHour )
{
*pucHour = ((dwTime & 0x00300000) >> 20) * 10
+ ((dwTime & 0x000F0000) >> 16);
if ( (dwTime & RTC_TIMR_AMPM) == RTC_TIMR_AMPM )
{
*pucHour += 12 ;
}
}
/* Minute */
if ( pucMinute )
{
*pucMinute = ((dwTime & 0x00007000) >> 12) * 10
+ ((dwTime & 0x00000F00) >> 8);
}
/* Second */
if ( pucSecond )
{
*pucSecond = ((dwTime & 0x00000070) >> 4) * 10
+ (dwTime & 0x0000000F);
}
}
/**
* \brief Sets a time alarm on the RTC.
* The match is performed only on the provided variables;
* Setting all pointers to 0 disables the time alarm.
*
* \note In AM/PM mode, the hour value must have bit #7 set for PM, cleared for
* AM (as expected in the time registers).
*
* \param pucHour If not null, the time alarm will hour-match this value.
* \param pucMinute If not null, the time alarm will minute-match this value.
* \param pucSecond If not null, the time alarm will second-match this value.
*
* \return 0 success, 1 fail to set
*/
extern int RTC_SetTimeAlarm( Rtc* pRtc, uint8_t *pucHour, uint8_t *pucMinute, uint8_t *pucSecond )
{
uint32_t dwAlarm=0 ;
TRACE_DEBUG( "RTC_SetTimeAlarm()\n\r" ) ;
/* Hour */
if ( pucHour )
{
dwAlarm |= RTC_TIMALR_HOUREN | ((*pucHour / 10) << 20) | ((*pucHour % 10) << 16);
}
/* Minute */
if ( pucMinute )
{
dwAlarm |= RTC_TIMALR_MINEN | ((*pucMinute / 10) << 12) | ((*pucMinute % 10) << 8);
}
/* Second */
if ( pucSecond )
{
dwAlarm |= RTC_TIMALR_SECEN | ((*pucSecond / 10) << 4) | (*pucSecond % 10);
}
pRtc->RTC_TIMALR = dwAlarm ;
return (int)(pRtc->RTC_VER & RTC_VER_NVTIMALR) ;
}
/**
* \brief Retrieves the current year, month and day from the RTC.
* Month, day and week values are numbered starting at 1.
*
* \param pYwear Current year (optional).
* \param pucMonth Current month (optional).
* \param pucDay Current day (optional).
* \param pucWeek Current day in current week (optional).
*/
extern void RTC_GetDate( Rtc* pRtc, uint16_t *pwYear, uint8_t *pucMonth, uint8_t *pucDay, uint8_t *pucWeek )
{
uint32_t dwDate ;
/* Get current date (multiple reads are necessary to insure a stable value) */
do
{
dwDate = pRtc->RTC_CALR ;
}
while ( dwDate != pRtc->RTC_CALR ) ;
/* Retrieve year */
if ( pwYear )
{
*pwYear = (((dwDate >> 4) & 0x7) * 1000)
+ ((dwDate & 0xF) * 100)
+ (((dwDate >> 12) & 0xF) * 10)
+ ((dwDate >> 8) & 0xF);
}
/* Retrieve month */
if ( pucMonth )
{
*pucMonth = (((dwDate >> 20) & 1) * 10) + ((dwDate >> 16) & 0xF);
}
/* Retrieve day */
if ( pucDay )
{
*pucDay = (((dwDate >> 28) & 0x3) * 10) + ((dwDate >> 24) & 0xF);
}
/* Retrieve week */
if ( pucWeek )
{
*pucWeek = ((dwDate >> 21) & 0x7);
}
}
/**
* \brief Sets the current year, month and day in the RTC.
* Month, day and week values must be numbered starting from 1.
*
* \note In successive update operations, the user must wait at least one second
* after resetting the UPDTIM/UPDCAL bit in the RTC_CR before setting these
* bits again. Please look at the RTC section of the datasheet for detail.
*
* \param wYear Current year.
* \param ucMonth Current month.
* \param ucDay Current day.
* \param ucWeek Day number in current week.
*
* \return 0 success, 1 fail to set
*/
extern int RTC_SetDate( Rtc* pRtc, uint16_t wYear, uint8_t ucMonth, uint8_t ucDay, uint8_t ucWeek )
{
uint32_t wDate ;
uint8_t ucCent_bcd ;
uint8_t ucYear_bcd ;
uint8_t ucMonth_bcd ;
uint8_t ucDay_bcd ;
uint8_t ucWeek_bcd ;
ucCent_bcd = ((wYear/100)%10) | ((wYear/1000)<<4);
ucYear_bcd = (wYear%10) | (((wYear/10)%10)<<4);
ucMonth_bcd = ((ucMonth%10) | (ucMonth/10)<<4);
ucDay_bcd = ((ucDay%10) | (ucDay/10)<<4);
ucWeek_bcd = ((ucWeek%10) | (ucWeek/10)<<4);
/* value over flow */
if ( (ucCent_bcd & (uint8_t)(~RTC_CENT_BIT_LEN_MASK)) |
(ucYear_bcd & (uint8_t)(~RTC_YEAR_BIT_LEN_MASK)) |
(ucMonth_bcd & (uint8_t)(~RTC_MONTH_BIT_LEN_MASK)) |
(ucWeek_bcd & (uint8_t)(~RTC_WEEK_BIT_LEN_MASK)) |
(ucDay_bcd & (uint8_t)(~RTC_DATE_BIT_LEN_MASK))
)
{
return 1 ;
}
/* Convert values to date register value */
wDate = ucCent_bcd |
(ucYear_bcd << 8) |
(ucMonth_bcd << 16) |
(ucWeek_bcd << 21) |
(ucDay_bcd << 24);
/* Update calendar register */
pRtc->RTC_CR |= RTC_CR_UPDCAL ;
while ((pRtc->RTC_SR & RTC_SR_ACKUPD) != RTC_SR_ACKUPD) ;
pRtc->RTC_SCCR = RTC_SCCR_ACKCLR;
pRtc->RTC_CALR = wDate ;
pRtc->RTC_CR &= (uint32_t)(~RTC_CR_UPDCAL) ;
pRtc->RTC_SCCR |= RTC_SCCR_SECCLR; /* clear SECENV in SCCR */
return (int)(pRtc->RTC_VER & RTC_VER_NVCAL) ;
}
/**
* \brief Sets a date alarm in the RTC.
* The alarm will match only the provided values;
* Passing a null-pointer disables the corresponding field match.
*
* \param pucMonth If not null, the RTC alarm will month-match this value.
* \param pucDay If not null, the RTC alarm will day-match this value.
*
* \return 0 success, 1 fail to set
*/
extern int RTC_SetDateAlarm( Rtc* pRtc, uint8_t *pucMonth, uint8_t *pucDay )
{
uint32_t dwAlarm ;
dwAlarm = ((pucMonth) || (pucDay)) ? (0) : (0x01010000);
TRACE_DEBUG( "RTC_SetDateAlarm()\n\r" ) ;
/* Compute alarm field value */
if ( pucMonth )
{
dwAlarm |= RTC_CALALR_MTHEN | ((*pucMonth / 10) << 20) | ((*pucMonth % 10) << 16);
}
if ( pucDay )
{
dwAlarm |= RTC_CALALR_DATEEN | ((*pucDay / 10) << 28) | ((*pucDay % 10) << 24);
}
/* Set alarm */
pRtc->RTC_CALALR = dwAlarm ;
return (int)(pRtc->RTC_VER & RTC_VER_NVCALALR) ;
}
/**
* \brief Clear flag bits of status clear command register in the RTC.
*
* \param mask Bits mask of cleared events
*/
extern void RTC_ClearSCCR( Rtc* pRtc, uint32_t dwMask )
{
/* Clear all flag bits in status clear command register */
dwMask &= RTC_SCCR_ACKCLR | RTC_SCCR_ALRCLR | RTC_SCCR_SECCLR | RTC_SCCR_TIMCLR | RTC_SCCR_CALCLR ;
pRtc->RTC_SCCR = dwMask ;
}
/**
* \brief Get flag bits of status register in the RTC.
*
* \param mask Bits mask of Status Register
*
* \return Status register & mask
*/
extern uint32_t RTC_GetSR( Rtc* pRtc, uint32_t dwMask )
{
uint32_t dwEvent ;
dwEvent = pRtc->RTC_SR ;
return (dwEvent & dwMask) ;
}

132
firmware/atmel_softpack_libraries/libchip_sam3s/source/rtt.c Normal file
View File

@@ -0,0 +1,132 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/** \addtogroup rtt_module Working with RTT
* The RTT driver provides the interface to configure and use the RTT
* peripheral.
*
* The Real-time Timer is used to count elapsed seconds.\n
* This timer is clocked by the 32kHz system clock divided by a programmable
* 16-bit balue. To be accurate, it is better to use an
* external 32kHz crystal instead of the internal 32kHz RC.\n
*
* To count elapsed seconds, the user could follow these few steps:
* <ul>
* <li>Programming PTPRES in RTT_MR to feeding the timer with a 1Hz signal.</li>
* <li>Writing the bit RTTRST in RTT_MR to restart the timer with new settings.</li>
* </ul>
*
* An alarm can be set to happen on second by setting alarm value in RTT_AR.
* Alarm occurence can be detected by polling or interrupt.
*
* For more accurate information, please look at the RTT section of the
* Datasheet.
*
* Related files :\n
* \ref rtt.c\n
* \ref rtt.h.\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* Implementation of Real Time Timer (RTT) controller.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <assert.h>
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Changes the prescaler value of the given RTT and restarts it.
*
* \note This function disables RTT interrupt sources.
*
* \param rtt Pointer to a Rtt instance.
* \param prescaler Prescaler value for the RTT.
*/
void RTT_SetPrescaler(Rtt *rtt, uint16_t prescaler)
{
rtt->RTT_MR = (prescaler | RTT_MR_RTTRST);
}
/**
* \brief Returns the current value of the RTT timer value.
*
* \param rtt Pointer to a Rtt instance.
*/
uint32_t RTT_GetTime(Rtt *rtt)
{
return rtt->RTT_VR;
}
/**
* \brief Enables the specified RTT interrupt sources.
*
* \param rtt Pointer to a Rtt instance.
* \param sources Bitmask of interrupts to enable.
*/
void RTT_EnableIT(Rtt *rtt, uint32_t sources)
{
assert( (sources & 0x0004FFFF) == 0 ) ;
rtt->RTT_MR |= sources;
}
/**
* \brief Returns the status register value of the given RTT.
*
* \param rtt Pointer to an Rtt instance.
*/
uint32_t RTT_GetStatus(Rtt *rtt)
{
return rtt->RTT_SR;
}
/**
* \brief Configures the RTT to generate an alarm at the given time.
*
* \param pRtt Pointer to an Rtt instance.
* \param time Alarm time.
*/
void RTT_SetAlarm(Rtt *pRtt, uint32_t time)
{
assert(time > 0);
pRtt->RTT_AR = time - 1;
}

352
firmware/atmel_softpack_libraries/libchip_sam3s/source/spi.c Normal file
View File

@@ -0,0 +1,352 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/** \addtogroup spi_module Working with SPI
* The SPI driver provides the interface to configure and use the SPI
* peripheral.
*
* The Serial Peripheral Interface (SPI) circuit is a synchronous serial
* data link that provides communication with external devices in Master
* or Slave Mode.
*
* To use the SPI, the user has to follow these few steps:
* -# Enable the SPI pins required by the application (see pio.h).
* -# Configure the SPI using the \ref SPI_Configure(). This enables the
* peripheral clock. The mode register is loaded with the given value.
* -# Configure all the necessary chip selects with \ref SPI_ConfigureNPCS().
* -# Enable the SPI by calling \ref SPI_Enable().
* -# Send/receive data using \ref SPI_Write() and \ref SPI_Read(). Note that \ref SPI_Read()
* must be called after \ref SPI_Write() to retrieve the last value read.
* -# Send/receive data using the PDC with the \ref SPI_WriteBuffer() and
* \ref SPI_ReadBuffer() functions.
* -# Disable the SPI by calling \ref SPI_Disable().
*
* For more accurate information, please look at the SPI section of the
* Datasheet.
*
* Related files :\n
* \ref spi.c\n
* \ref spi.h.\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* Implementation of Serial Peripheral Interface (SPI) controller.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include "pmc.h"
#include "spi.h"
#include <stdint.h>
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Enables a SPI peripheral.
*
* \param spi Pointer to an Spi instance.
*/
extern void SPI_Enable( Spi* spi )
{
spi->SPI_CR = SPI_CR_SPIEN ;
}
/**
* \brief Disables a SPI peripheral.
*
* \param spi Pointer to an Spi instance.
*/
extern void SPI_Disable( Spi* spi )
{
spi->SPI_CR = SPI_CR_SPIDIS ;
}
/**
* \brief Enables one or more interrupt sources of a SPI peripheral.
*
* \param spi Pointer to an Spi instance.
* \param sources Bitwise OR of selected interrupt sources.
*/
extern void SPI_EnableIt( Spi* spi, uint32_t dwSources )
{
spi->SPI_IER = dwSources ;
}
/**
* \brief Disables one or more interrupt sources of a SPI peripheral.
*
* \param spi Pointer to an Spi instance.
* \param sources Bitwise OR of selected interrupt sources.
*/
extern void SPI_DisableIt( Spi* spi, uint32_t dwSources )
{
spi->SPI_IDR = dwSources ;
}
/**
* \brief Configures a SPI peripheral as specified. The configuration can be computed
* using several macros (see \ref spi_configuration_macros).
*
* \param spi Pointer to an Spi instance.
* \param id Peripheral ID of the SPI.
* \param configuration Value of the SPI configuration register.
*/
extern void SPI_Configure( Spi* spi, uint32_t dwId, uint32_t dwConfiguration )
{
PMC_EnablePeripheral( dwId ) ;
spi->SPI_CR = SPI_CR_SPIDIS ;
/* Execute a software reset of the SPI twice */
spi->SPI_CR = SPI_CR_SWRST ;
spi->SPI_CR = SPI_CR_SWRST ;
spi->SPI_MR = dwConfiguration ;
}
/**
* \brief Configures a chip select of a SPI peripheral. The chip select configuration
* is computed using several macros (see \ref spi_configuration_macros).
*
* \param spi Pointer to an Spi instance.
* \param npcs Chip select to configure (0, 1, 2 or 3).
* \param configuration Desired chip select configuration.
*/
void SPI_ConfigureNPCS( Spi* spi, uint32_t dwNpcs, uint32_t dwConfiguration )
{
spi->SPI_CSR[dwNpcs] = dwConfiguration ;
}
/**
* \brief Get the current status register of the given SPI peripheral.
* \note This resets the internal value of the status register, so further
* read may yield different values.
* \param spi Pointer to a Spi instance.
* \return SPI status register.
*/
extern uint32_t SPI_GetStatus( Spi* spi )
{
return spi->SPI_SR ;
}
/**
* \brief Reads and returns the last word of data received by a SPI peripheral. This
* method must be called after a successful SPI_Write call.
*
* \param spi Pointer to an Spi instance.
*
* \return readed data.
*/
extern uint32_t SPI_Read( Spi* spi )
{
while ( (spi->SPI_SR & SPI_SR_RDRF) == 0 ) ;
return spi->SPI_RDR & 0xFFFF ;
}
/**
* \brief Sends data through a SPI peripheral. If the SPI is configured to use a fixed
* peripheral select, the npcs value is meaningless. Otherwise, it identifies
* the component which shall be addressed.
*
* \param spi Pointer to an Spi instance.
* \param npcs Chip select of the component to address (0, 1, 2 or 3).
* \param data Word of data to send.
*/
extern void SPI_Write( Spi* spi, uint32_t dwNpcs, uint16_t wData )
{
/* Send data */
while ( (spi->SPI_SR & SPI_SR_TXEMPTY) == 0 ) ;
spi->SPI_TDR = wData | SPI_PCS( dwNpcs ) ;
while ( (spi->SPI_SR & SPI_SR_TDRE) == 0 ) ;
}
/**
* \brief Check if SPI transfer finish.
*
* \param spi Pointer to an Spi instance.
*
* \return Returns 1 if there is no pending write operation on the SPI; otherwise
* returns 0.
*/
extern uint32_t SPI_IsFinished( Spi* spi )
{
return ((spi->SPI_SR & SPI_SR_TXEMPTY) != 0) ;
}
/**
* \brief Enable Spi PDC transmit
* \param spi Pointer to an Spi instance.
*/
extern void SPI_PdcEnableTx( Spi* spi )
{
spi->SPI_PTCR = SPI_PTCR_TXTEN ;
}
/**
* \brief Disable Spi PDC transmit
* \param spi Pointer to an Spi instance.
*/
extern void SPI_PdcDisableTx( Spi* spi )
{
spi->SPI_PTCR = SPI_PTCR_TXTDIS ;
}
/**
* \brief Enable Spi PDC receive
* \param spi Pointer to an Spi instance.
*/
extern void SPI_PdcEnableRx( Spi* spi )
{
spi->SPI_PTCR = SPI_PTCR_RXTEN ;
}
/**
* \brief Disable Spi PDC receive
* \param spi Pointer to an Spi instance.
*/
extern void SPI_PdcDisableRx( Spi* spi )
{
spi->SPI_PTCR = SPI_PTCR_RXTDIS ;
}
/**
* \brief Set PDC transmit and next transmit buffer address and size.
*
* \param spi Pointer to an Spi instance.
* \param txBuf PDC transmit buffer address.
* \param txCount Length in bytes of the transmit buffer.
* \param txNextBuf PDC next transmit buffer address.
* \param txNextCount Length in bytes of the next transmit buffer.
*/
extern void SPI_PdcSetTx( Spi* spi, void* pvTxBuf, uint32_t dwTxCount, void* pvTxNextBuf, uint32_t dwTxNextCount )
{
spi->SPI_TPR = (uint32_t)pvTxBuf ;
spi->SPI_TCR = dwTxCount ;
spi->SPI_TNPR = (uint32_t)pvTxNextBuf ;
spi->SPI_TNCR = dwTxNextCount ;
}
/**
* \brief Set PDC receive and next receive buffer address and size.
*
* \param spi Pointer to an Spi instance.
* \param rxBuf PDC receive buffer address.
* \param rxCount Length in bytes of the receive buffer.
* \param rxNextBuf PDC next receive buffer address.
* \param rxNextCount Length in bytes of the next receive buffer.
*/
extern void SPI_PdcSetRx( Spi* spi, void* pvRxBuf, uint32_t dwRxCount, void* pvRxNextBuf, uint32_t dwRxNextCount )
{
spi->SPI_RPR = (uint32_t)pvRxBuf ;
spi->SPI_RCR = dwRxCount ;
spi->SPI_RNPR = (uint32_t)pvRxNextBuf ;
spi->SPI_RNCR = dwRxNextCount ;
}
/**
* \brief Sends the contents of buffer through a SPI peripheral, using the PDC to
* take care of the transfer.
*
* \param spi Pointer to an Spi instance.
* \param buffer Data buffer to send.
* \param length Length of the data buffer.
*/
extern uint32_t SPI_WriteBuffer( Spi* spi, void* pvBuffer, uint32_t dwLength )
{
/* Check if first bank is free */
if ( spi->SPI_TCR == 0 )
{
spi->SPI_TPR = (uint32_t)pvBuffer ;
spi->SPI_TCR = dwLength ;
spi->SPI_PTCR = PERIPH_PTCR_TXTEN ;
return 1 ;
}
/* Check if second bank is free */
else
{
if ( spi->SPI_TNCR == 0 )
{
spi->SPI_TNPR = (uint32_t)pvBuffer ;
spi->SPI_TNCR = dwLength ;
return 1 ;
}
}
/* No free banks */
return 0 ;
}
/**
* \brief Reads data from a SPI peripheral until the provided buffer is filled. This
* method does NOT need to be called after SPI_Write or SPI_WriteBuffer.
*
* \param spi Pointer to an Spi instance.
* \param buffer Data buffer to store incoming bytes.
* \param length Length in bytes of the data buffer.
*/
extern uint32_t SPI_ReadBuffer( Spi* spi, void *pvBuffer, uint32_t dwLength )
{
/* Check if the first bank is free */
if ( spi->SPI_RCR == 0 )
{
spi->SPI_RPR = (uint32_t)pvBuffer ;
spi->SPI_RCR = dwLength ;
spi->SPI_PTCR = PERIPH_PTCR_RXTEN ;
return 1 ;
}
/* Check if second bank is free */
else
{
if ( spi->SPI_RNCR == 0 )
{
spi->SPI_RNPR = (uint32_t)pvBuffer ;
spi->SPI_RNCR = dwLength ;
return 1 ;
}
}
/* No free bank */
return 0 ;
}

251
firmware/atmel_softpack_libraries/libchip_sam3s/source/spi_pdc.c Normal file
View File

@@ -0,0 +1,251 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/** \addtogroup spi_pdc_module SPI PDC driver
* \ingroup spi_at45_module
* The Spi driver is a low level spi driver which performs SPI device Initializes,
* spi transfer and receive. It can be used by upper SPI driver such as AT45
* driver and AT26 driver.
*
* \section Usage
* <ul>
* <li> Initializes a SPI instance and the corresponding SPI hardware,
* Configure SPI in Master Mode using SPID_Configure().</li>
* <li> Configures the SPI characteristics (such as Clock Polarity, Phase,
* transfers delay and Baud Rate) for the device corresponding to the
* chip select using SPID_ConfigureCS().</li>
* <li> Starts a SPI master transfer using SPID_SendCommand().
* The transfer is performed using the PDC channels. </li>
* <li> It enable the SPI clock.</li>
* <li> Set the corresponding peripheral chip select.</li>
* <li> Initialize the two SPI PDC buffers.</li>
* <li> Initialize SPI_TPR and SPI_TCR with SPI command data and size
* to send command data first.</li>
* <li> Initialize SPI_RPR and SPI_RCR with SPI command data and size
* as dummy value.</li>
* <li> Initialize SPI_TNPR and SPI_TNCR with rest of the data to be
* transfered.(if the data specified in cmd structure)</li>
* <li> Initialize SPI_RNPR and SPI_RNCR with rest of the data to be
* received.(if the data specified in cmd structure)</li>
* <li> Initialize the callback function if specified.</li>
* <li> Enable transmitter and receiver.</li>
* <li> Example for sending a command to the dataflash through the SPI.</li>
* \code
* /// Build command to be sent.
* ...
* // Send Command and data through the SPI
* if (SPID_SendCommand(pAt45->pSpid, pCommand)) {
* return AT45_ERROR_SPI;
* }
* \endcode
* <li> The SPI_Handler() must be called by the SPI Interrupt Service Routine
* with the corresponding Spi instance. It is invokes to check for pending
* interrupts. </li>
* <li> Example for initializing SPI interrupt handler in upper application.</li>
* \code
* AIC_ConfigureIT(AT91C_ID_SPI, 0, SPI_Handler);
* \endcode
* </ul>
* Related files :\n
* \ref spi_pdc.c\n
* \ref spi_pdc.h.\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* Implementation of SPI PDC driver.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Initializes the Spid structure and the corresponding SPI hardware.
*
* \param pSpid Pointer to a Spid instance.
* \param pSpiHw Associated SPI peripheral.
* \param spiId SPI peripheral identifier.
* \return 0.
*/
extern uint32_t SPID_Configure( Spid* pSpid, Spi* pSpiHw, uint8_t spiId )
{
/* Initialize the SPI structure*/
pSpid->pSpiHw = pSpiHw ;
pSpid->spiId = spiId ;
pSpid->semaphore = 1 ;
pSpid->pCurrentCommand = 0 ;
/* Enable the SPI clock*/
PMC_EnablePeripheral( pSpid->spiId ) ;
/* Configure SPI in Master Mode with No CS selected !!! */
SPI_Configure( pSpiHw, pSpid->spiId, SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_MR_PCS_Msk ) ;
/* Enable the SPI */
SPI_Enable( pSpiHw ) ;
/* Disable the SPI clock */
PMC_DisablePeripheral( pSpid->spiId ) ;
return 0 ;
}
/**
* \brief Configures the parameters for the device corresponding to the cs.
*
* \param pSpid Pointer to a Spid instance.
* \param cs number corresponding to the SPI chip select.
* \param csr SPI_CSR value to setup.
*/
extern void SPID_ConfigureCS( Spid* pSpid, uint32_t dwCS, uint32_t dwCSR )
{
SPI_ConfigureNPCS( pSpid->pSpiHw, dwCS, dwCSR ) ;
}
/**
* \brief Starts a SPI master transfer. This is a non blocking function. It will
* return as soon as the transfer is started.
*
* \param pSpid Pointer to a Spid instance.
* \param pCommand Pointer to the SPI command to execute.
* \return 0 if the transfer has been started successfully; otherwise returns
* SPID_ERROR_LOCK is the driver is in use, or SPID_ERROR if the command is not
* valid.
*/
extern uint32_t SPID_SendCommand( Spid* pSpid, SpidCmd* pCommand )
{
Spi* pSpiHw = pSpid->pSpiHw ;
uint32_t dwSpiMr ;
/* Try to get the dataflash semaphore */
if ( pSpid->semaphore == 0 )
{
return SPID_ERROR_LOCK ;
}
pSpid->semaphore-- ;
/* Enable the SPI clock */
PMC_EnablePeripheral( pSpid->spiId ) ;
/* Disable transmitter and receiver*/
SPI_PdcDisableRx( pSpiHw ) ;
SPI_PdcDisableTx( pSpiHw ) ;
/* Write to the MR register*/
dwSpiMr = pSpiHw->SPI_MR ;
dwSpiMr |= SPI_MR_PCS_Msk ;
dwSpiMr &= ~((1 << pCommand->spiCs) << 16 ) ;
pSpiHw->SPI_MR=dwSpiMr ;
/* Initialize the two SPI PDC buffer*/
SPI_PdcSetRx( pSpiHw, pCommand->pCmd, pCommand->cmdSize, pCommand->pData, pCommand->dataSize ) ;
SPI_PdcSetTx( pSpiHw, pCommand->pCmd, pCommand->cmdSize, pCommand->pData, pCommand->dataSize ) ;
/* Initialize the callback*/
pSpid->pCurrentCommand = pCommand ;
/* Enable transmitter and receiver*/
SPI_PdcEnableRx( pSpiHw ) ;
SPI_PdcEnableTx( pSpiHw ) ;
/* Enable buffer complete interrupt*/
SPI_EnableIt( pSpiHw, SPI_IER_RXBUFF ) ;
return 0 ;
}
/**
* \brief The SPI_Handler must be called by the SPI Interrupt Service Routine with the
* corresponding Spi instance.
*
* \note The SPI_Handler will unlock the Spi semaphore and invoke the upper application
* callback.
* \param pSpid Pointer to a Spid instance.
*/
extern void SPID_Handler( Spid* pSpid )
{
SpidCmd *pSpidCmd = pSpid->pCurrentCommand ;
Spi *pSpiHw = pSpid->pSpiHw ;
volatile uint32_t spiSr ;
/* Read the status register*/
spiSr = pSpiHw->SPI_SR ;
if ( spiSr & SPI_SR_RXBUFF )
{
/* Disable transmitter and receiver */
SPI_PdcDisableRx( pSpiHw ) ;
SPI_PdcDisableTx( pSpiHw ) ;
/* Disable the SPI clock*/
PMC_DisablePeripheral( pSpid->spiId ) ;
/* Disable buffer complete interrupt */
SPI_DisableIt( pSpiHw, SPI_IDR_RXBUFF ) ;
/* Release the dataflash semaphore*/
pSpid->semaphore++ ;
/* Invoke the callback associated with the current command*/
if ( pSpidCmd && pSpidCmd->callback )
{
pSpidCmd->callback( 0, pSpidCmd->pArgument ) ;
}
/* Nothing must be done after. A new DF operation may have been started
in the callback function.*/
}
}
/**
* \brief Returns 1 if the SPI driver is currently busy executing a command; otherwise
* returns 0.
* \param pSpid Pointer to a Spid instance.
*/
extern uint32_t SPID_IsBusy( const Spid* pSpid )
{
if ( pSpid->semaphore == 0 )
{
return 1 ;
}
else
{
return 0 ;
}
}

247
firmware/atmel_softpack_libraries/libchip_sam3s/source/ssc.c Normal file
View File

@@ -0,0 +1,247 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/** \addtogroup ssc_module Working with SSC
* The SSC driver provides the interface to configure and use the SSC
* peripheral.
*
* !Usage
*
* -# Enable the SSC interface pins.
* -# Configure the SSC to operate at a specific frequency by calling
* SSC_Configure(). This function enables the peripheral clock of the SSC,
* but not its PIOs.
* -# Configure the transmitter and/or the receiver using the
* SSC_ConfigureTransmitter() and SSC_ConfigureEmitter() functions.
* -# Enable the PIOs or the transmitter and/or the received.
* -# Enable the transmitter and/or the receiver using SSC_EnableTransmitter()
* and SSC_EnableReceiver()
* -# Send data through the transmitter using SSC_Write() and SSC_WriteBuffer()
* -# Receive data from the receiver using SSC_Read() and SSC_ReadBuffer()
* -# Disable the transmitter and/or the receiver using SSC_DisableTransmitter()
* and SSC_DisableReceiver()
*
* For more accurate information, please look at the RTC section of the
* Datasheet.
*
* Related files :\n
* \ref ssc.c\n
* \ref ssc.h.\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* Implementation of Synchronous Serial (SSC) controller.
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Configures a SSC peripheral.If the divided clock is not used, the master
* clock frequency can be set to 0.
* \note The emitter and transmitter are disabled by this function.
* \param bitRate bit rate.
* \param masterClock master clock.
*/
void SSC_Configure(uint32_t bitRate, uint32_t masterClock)
{
/* Enable SSC peripheral clock */
PMC->PMC_PCER0 = 1 << ID_SSC;
/* Reset, disable receiver & transmitter */
SSC->SSC_CR = SSC_CR_RXDIS | SSC_CR_TXDIS | SSC_CR_SWRST;
SSC->SSC_PTCR = SSC_PTCR_RXTDIS | SSC_PTCR_TXTDIS;
/* Configure clock frequency */
if (bitRate != 0) {
SSC->SSC_CMR = masterClock / (2 * bitRate);
}
else {
SSC->SSC_CMR = 0;
}
}
/**
* \brief Configures the transmitter of a SSC peripheral.
* \param tcmr Transmit Clock Mode Register value.
* \param tfmr Transmit Frame Mode Register value.
*/
void SSC_ConfigureTransmitter(uint32_t tcmr, uint32_t tfmr)
{
SSC->SSC_TCMR = tcmr;
SSC->SSC_TFMR = tfmr;
}
/**
* \brief Configures the receiver of a SSC peripheral.
* \param rcmr Receive Clock Mode Register value.
* \param rfmr Receive Frame Mode Register value.
*/
void SSC_ConfigureReceiver(uint32_t rcmr, uint32_t rfmr)
{
SSC->SSC_RCMR = rcmr;
SSC->SSC_RFMR = rfmr;
}
/**
* \brief Enables the transmitter of a SSC peripheral.
*/
void SSC_EnableTransmitter(void)
{
SSC->SSC_CR = SSC_CR_TXEN;
}
/**
* \brief Disables the transmitter of a SSC peripheral.
*/
void SSC_DisableTransmitter(void)
{
SSC->SSC_CR = SSC_CR_TXDIS;
}
/**
* \brief Enables the receiver of a SSC peripheral.
*/
void SSC_EnableReceiver(void)
{
SSC->SSC_CR = SSC_CR_RXEN;
}
/**
* \brief Disables the receiver of a SSC peripheral.
*/
void SSC_DisableReceiver(void)
{
SSC->SSC_CR = SSC_CR_RXDIS;
}
/**
* \brief Enables one or more interrupt sources of a SSC peripheral.
* \param sources Bitwise OR of selected interrupt sources.
*/
void SSC_EnableInterrupts(uint32_t sources)
{
SSC->SSC_IER = sources;
}
/**
* \brief Disables one or more interrupt sources of a SSC peripheral.
* \param sources Bitwise OR of selected interrupt sources.
*/
void SSC_DisableInterrupts(uint32_t sources)
{
SSC->SSC_IDR = sources;
}
/**
* \brief Sends one data frame through a SSC peripheral. If another frame is currently
* being sent, this function waits for the previous transfer to complete.
* \param frame Data frame to send.
*/
void SSC_Write(uint32_t frame)
{
while ((SSC->SSC_SR & SSC_SR_TXRDY) == 0);
SSC->SSC_THR = frame;
}
/**
* \brief Waits until one frame is received on a SSC peripheral, and returns it.
*/
uint32_t SSC_Read(void)
{
while ((SSC->SSC_SR & SSC_SR_RXRDY) == 0);
return SSC->SSC_RHR;
}
/**
* \brief Sends the contents of a data buffer a SSC peripheral, using the PDC.
* \param buffer Data buffer to send.
* \param length Size of the data buffer.
* \return 1 if the buffer has been queued for transmission; otherwise returns 0.
*/
uint8_t SSC_WriteBuffer(void *buffer, uint32_t length)
{
/* Check if first bank is free*/
if (SSC->SSC_TCR == 0) {
SSC->SSC_TPR = (uint32_t) buffer;
SSC->SSC_TCR = length;
SSC->SSC_PTCR = SSC_PTCR_TXTEN;
return 1;
}
/* Check if second bank is free*/
else if (SSC->SSC_TNCR == 0) {
SSC->SSC_TNPR = (uint32_t) buffer;
SSC->SSC_TNCR = length;
return 1;
}
return 0;
}
/**
* \brief Reads data coming from a SSC peripheral receiver and stores it into the
* giving buffer with PDC.
* \param buffer ata buffer used for reception.
* \param length Size of the data buffer.
* \return 1 if the buffer has been queued for reception; otherwise returns 0.
*/
uint8_t SSC_ReadBuffer(void *buffer, uint32_t length)
{
/* Check if the first bank is free*/
if (SSC->SSC_RCR == 0) {
SSC->SSC_RPR = (uint32_t) buffer;
SSC->SSC_RCR = length;
SSC->SSC_PTCR = SSC_PTCR_RXTEN;
return 1;
}
/* Check if second bank is free*/
else if (SSC->SSC_RNCR == 0) {
SSC->SSC_RNPR = (uint32_t) buffer;
SSC->SSC_RNCR = length;
return 1;
}
return 0;
}

196
firmware/atmel_softpack_libraries/libchip_sam3s/source/supc.c Normal file
View File

@@ -0,0 +1,196 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
//------------------------------------------------------------------------------
// Headers
//------------------------------------------------------------------------------
#include "chip.h"
#include <assert.h>
//------------------------------------------------------------------------------
// Local definitions
//------------------------------------------------------------------------------
/// Key value for the SUPC_MR register.
#define SUPC_KEY ((uint32_t) (0xA5 << 24))
//------------------------------------------------------------------------------
// Global functions
//------------------------------------------------------------------------------
#if !defined(__ICCARM__)
__attribute__ ((section (".ramfunc"))) // GCC
#endif
//------------------------------------------------------------------------------
/// Enables the flash power supply with the given wake-up setting.
/// \param time Wake-up time.
//------------------------------------------------------------------------------
void SUPC_EnableFlash( Supc* pSupc, uint32_t dwTime )
{
pSupc->SUPC_FWUTR = dwTime ;
pSupc->SUPC_MR = SUPC_KEY | pSupc->SUPC_MR | AT91C_SUPC_FLASHON ;
while ((pSupc->SUPC_SR & AT91C_SUPC_FLASHS) != AT91C_SUPC_FLASHS) ;
}
#if !defined(__ICCARM__)
__attribute__ ((section (".ramfunc"))) // GCC
#endif
//------------------------------------------------------------------------------
/// Disables the flash power supply.
//------------------------------------------------------------------------------
void SUPC_DisableFlash( Supc* pSupc )
{
pSupc->SUPC_MR = SUPC_KEY | (pSupc->SUPC_MR & ~AT91C_SUPC_FLASHON) ;
while ((pSupc->SUPC_SR & AT91C_SUPC_FLASHS) == AT91C_SUPC_FLASHS) ;
}
//------------------------------------------------------------------------------
/// Sets the voltage regulator output voltage.
/// \param voltage Voltage to set.
//------------------------------------------------------------------------------
void SUPC_SetVoltageOutput( Supc* pSupc, uint32_t dwVoltage )
{
assert( (voltage & ~AT91C_SUPC_VRVDD) == 0 ) ;
pSupc->SUPC_MR = SUPC_KEY | (pSupc->SUPC_MR & ~AT91C_SUPC_VRVDD) | dwVoltage ;
}
//------------------------------------------------------------------------------
/// Puts the voltage regulator in deep mode.
//------------------------------------------------------------------------------
void SUPC_EnableDeepMode( Supc* pSupc )
{
pSupc->SUPC_MR = SUPC_KEY | pSupc->SUPC_MR | AT91C_SUPC_VRDEEP ;
}
//------------------------------------------------------------------------------
/// Puts the voltage regulator in normal mode.
//------------------------------------------------------------------------------
void SUPC_DisableDeepMode( Supc* pSupc )
{
pSupc->SUPC_MR = SUPC_KEY | (pSupc->SUPC_MR & ~AT91C_SUPC_VRDEEP) ;
}
//-----------------------------------------------------------------------------
/// Enables the backup SRAM power supply, so its data is saved while the device
/// is in backup mode.
//-----------------------------------------------------------------------------
void SUPC_EnableSram( Supc* pSupc )
{
pSupc->SUPC_MR = SUPC_KEY | pSupc->SUPC_MR | AT91C_SUPC_SRAMON ;
}
//-----------------------------------------------------------------------------
/// Disables the backup SRAM power supply.
//-----------------------------------------------------------------------------
void SUPC_DisableSram( Supc* pSupc )
{
pSupc->SUPC_MR = SUPC_KEY | (pSupc->SUPC_MR & ~AT91C_SUPC_SRAMON) ;
}
//-----------------------------------------------------------------------------
/// Enables the RTC power supply.
//-----------------------------------------------------------------------------
void SUPC_EnableRtc( Supc* pSupc )
{
pSupc->SUPC_MR = SUPC_KEY | pSupc->SUPC_MR | AT91C_SUPC_RTCON ;
while ((pSupc->SUPC_SR & AT91C_SUPC_RTS) != AT91C_SUPC_RTS) ;
}
//-----------------------------------------------------------------------------
/// Disables the RTC power supply.
//-----------------------------------------------------------------------------
void SUPC_DisableRtc( Supc* pSupc )
{
pSupc->SUPC_MR = SUPC_KEY | (pSupc->SUPC_MR & ~AT91C_SUPC_RTCON) ;
while ((pSupc->SUPC_SR & AT91C_SUPC_RTS) == AT91C_SUPC_RTS);
}
//-----------------------------------------------------------------------------
/// Sets the BOD sampling mode (or disables it).
/// \param mode BOD sampling mode.
//-----------------------------------------------------------------------------
void SUPC_SetBodSampling( Supc* pSupc, uint32_t dwMode )
{
assert( (dwMode & ~AT91C_SUPC_BODSMPL) == 0 ) ;
pSupc->SUPC_BOMR &= ~AT91C_SUPC_BODSMPL;
pSupc->SUPC_BOMR |= dwMode ;
}
//------------------------------------------------------------------------------
/// Disables the voltage regulator, which makes the device enter backup mode.
//------------------------------------------------------------------------------
void SUPC_DisableVoltageRegulator( Supc* pSupc )
{
pSupc->SUPC_CR = SUPC_KEY | AT91C_SUPC_VROFF ;
while ( 1 ) ;
}
//------------------------------------------------------------------------------
/// Shuts the device down so it enters Off mode.
//------------------------------------------------------------------------------
void SUPC_Shutdown( Supc* pSupc )
{
pSupc->SUPC_CR = SUPC_KEY | AT91C_SUPC_SHDW ;
while (1);
}
//------------------------------------------------------------------------------
/// Sets the wake-up sources when in backup mode.
/// \param sources Wake-up sources to enable.
//------------------------------------------------------------------------------
void SUPC_SetWakeUpSources( Supc* pSupc, uint32_t dwSources )
{
assert( (dwSources & ~0x0000000B) == 0 ) ;
pSupc->SUPC_WUMR &= ~0x0000000B;
pSupc->SUPC_WUMR |= dwSources ;
}
//------------------------------------------------------------------------------
/// Sets the wake-up inputs when in backup mode.
/// \param inputs Wake up inputs to enable.
//------------------------------------------------------------------------------
void SUPC_SetWakeUpInputs( Supc* pSupc, uint32_t dwInputs )
{
assert( (dwInputs & ~0xFFFF) == 0 ) ;
pSupc->SUPC_WUIR &= ~0xFFFF ;
pSupc->SUPC_WUIR |= dwInputs ;
}

175
firmware/atmel_softpack_libraries/libchip_sam3s/source/tc.c Normal file
View File

@@ -0,0 +1,175 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Implementation of Timer Counter (TC).
*
*/
/*------------------------------------------------------------------------------
* Headers
*------------------------------------------------------------------------------*/
#include "chip.h"
#include <assert.h>
/*------------------------------------------------------------------------------
* Global functions
*------------------------------------------------------------------------------*/
/**
* \brief Configures a Timer Counter Channel
*
* Configures a Timer Counter to operate in the given mode. Timer is stopped
* after configuration and must be restarted with TC_Start(). All the
* interrupts of the timer are also disabled.
*
* \param pTc Pointer to a Tc instance.
* \param channel Channel number.
* \param mode Operating mode (TC_CMR value).
*/
extern void TC_Configure( Tc *pTc, uint32_t dwChannel, uint32_t dwMode )
{
TcChannel* pTcCh ;
assert( dwChannel < (sizeof( pTc->TC_CHANNEL )/sizeof( pTc->TC_CHANNEL[0] )) ) ;
pTcCh = pTc->TC_CHANNEL+dwChannel ;
/* Disable TC clock */
pTcCh->TC_CCR = TC_CCR_CLKDIS ;
/* Disable interrupts */
pTcCh->TC_IDR = 0xFFFFFFFF ;
/* Clear status register */
pTcCh->TC_SR ;
/* Set mode */
pTcCh->TC_CMR = dwMode ;
}
/**
* \brief Reset and Start the TC Channel
*
* Enables the timer clock and performs a software reset to start the counting.
*
* \param pTc Pointer to a Tc instance.
* \param dwChannel Channel number.
*/
extern void TC_Start( Tc *pTc, uint32_t dwChannel )
{
TcChannel* pTcCh ;
assert( dwChannel < (sizeof( pTc->TC_CHANNEL )/sizeof( pTc->TC_CHANNEL[0] )) ) ;
pTcCh = pTc->TC_CHANNEL+dwChannel ;
pTcCh->TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG ;
}
/**
* \brief Stop TC Channel
*
* Disables the timer clock, stopping the counting.
*
* \param pTc Pointer to a Tc instance.
* \param dwChannel Channel number.
*/
extern void TC_Stop(Tc *pTc, uint32_t dwChannel )
{
TcChannel* pTcCh ;
assert( dwChannel < (sizeof( pTc->TC_CHANNEL )/sizeof( pTc->TC_CHANNEL[0] )) ) ;
pTcCh = pTc->TC_CHANNEL+dwChannel ;
pTcCh->TC_CCR = TC_CCR_CLKDIS ;
}
/**
* \brief Find best MCK divisor
*
* Finds the best MCK divisor given the timer frequency and MCK. The result
* is guaranteed to satisfy the following equation:
* \code
* (MCK / (DIV * 65536)) <= freq <= (MCK / DIV)
* \endcode
* with DIV being the highest possible value.
*
* \param dwFreq Desired timer frequency.
* \param dwMCk Master clock frequency.
* \param dwDiv Divisor value.
* \param dwTcClks TCCLKS field value for divisor.
* \param dwBoardMCK Board clock frequency.
*
* \return 1 if a proper divisor has been found, otherwise 0.
*/
extern uint32_t TC_FindMckDivisor( uint32_t dwFreq, uint32_t dwMCk, uint32_t *dwDiv, uint32_t *dwTcClks, uint32_t dwBoardMCK )
{
const uint32_t adwDivisors[5] = { 2, 8, 32, 128, dwBoardMCK / 32768 } ;
uint32_t dwIndex = 0 ;
/* Satisfy lower bound */
while ( dwFreq < ((dwMCk / adwDivisors[dwIndex]) / 65536) )
{
dwIndex++ ;
/* If no divisor can be found, return 0 */
if ( dwIndex == (sizeof( adwDivisors )/sizeof( adwDivisors[0] )) )
{
return 0 ;
}
}
/* Try to maximize DIV while satisfying upper bound */
while ( dwIndex < 4 )
{
if ( dwFreq > (dwMCk / adwDivisors[dwIndex + 1]) )
{
break ;
}
dwIndex++ ;
}
/* Store results */
if ( dwDiv )
{
*dwDiv = adwDivisors[dwIndex] ;
}
if ( dwTcClks )
{
*dwTcClks = dwIndex ;
}
return 1 ;
}

380
firmware/atmel_softpack_libraries/libchip_sam3s/source/twi.c Normal file
View File

@@ -0,0 +1,380 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/** \addtogroup twi_module Working with TWI
* The TWI driver provides the interface to configure and use the TWI
* peripheral.
*
* \section Usage
* <ul>
* <li> Configures a TWI peripheral to operate in master mode, at the given
* frequency (in Hz) using TWI_Configure(). </li>
* <li> Sends a STOP condition on the TWI using TWI_Stop().</li>
* <li> Starts a read operation on the TWI bus with the specified slave using
* TWI_StartRead(). Data must then be read using TWI_ReadByte() whenever
* a byte is available (poll using TWI_ByteReceived()).</li>
* <li> Starts a write operation on the TWI to access the selected slave using
* TWI_StartWrite(). A byte of data must be provided to start the write;
* other bytes are written next.</li>
* <li> Sends a byte of data to one of the TWI slaves on the bus using TWI_WriteByte().
* This function must be called once before TWI_StartWrite() with the first byte of data
* to send, then it shall be called repeatedly after that to send the remaining bytes.</li>
* <li> Check if a byte has been received and can be read on the given TWI
* peripheral using TWI_ByteReceived().<
* Check if a byte has been sent using TWI_ByteSent().</li>
* <li> Check if the current transmission is complete (the STOP has been sent)
* using TWI_TransferComplete().</li>
* <li> Enables & disable the selected interrupts sources on a TWI peripheral
* using TWI_EnableIt() and TWI_DisableIt().</li>
* <li> Get current status register of the given TWI peripheral using
* TWI_GetStatus(). Get current status register of the given TWI peripheral, but
* masking interrupt sources which are not currently enabled using
* TWI_GetMaskedStatus().</li>
* </ul>
* For more accurate information, please look at the TWI section of the
* Datasheet.
*
* Related files :\n
* \ref twi.c\n
* \ref twi.h.\n
*/
/*@{*/
/*@}*/
/**
* \file
*
* Implementation of Two Wire Interface (TWI).
*
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <assert.h>
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Configures a TWI peripheral to operate in master mode, at the given
* frequency (in Hz). The duty cycle of the TWI clock is set to 50%.
* \param pTwi Pointer to an Twi instance.
* \param twck Desired TWI clock frequency.
* \param mck Master clock frequency.
*/
void TWI_ConfigureMaster( Twi* pTwi, uint32_t dwTwCk, uint32_t dwMCk )
{
uint32_t dwCkDiv = 0 ;
uint32_t dwClDiv ;
uint32_t dwOk = 0 ;
TRACE_DEBUG( "TWI_ConfigureMaster()\n\r" ) ;
assert( pTwi ) ;
/* SVEN: TWI Slave Mode Enabled */
pTwi->TWI_CR = TWI_CR_SVEN ;
/* Reset the TWI */
pTwi->TWI_CR = TWI_CR_SWRST ;
pTwi->TWI_RHR ;
/* TWI Slave Mode Disabled, TWI Master Mode Disabled. */
pTwi->TWI_CR = TWI_CR_SVDIS ;
pTwi->TWI_CR = TWI_CR_MSDIS ;
/* Set master mode */
pTwi->TWI_CR = TWI_CR_MSEN ;
/* Configure clock */
while ( !dwOk )
{
dwClDiv = ((dwMCk / (2 * dwTwCk)) - 4) / (1<<dwCkDiv) ;
if ( dwClDiv <= 255 )
{
dwOk = 1 ;
}
else
{
dwCkDiv++ ;
}
}
assert( dwCkDiv < 8 ) ;
TRACE_DEBUG( "Using CKDIV = %u and CLDIV/CHDIV = %u\n\r", dwCkDiv, dwClDiv ) ;
pTwi->TWI_CWGR = 0 ;
pTwi->TWI_CWGR = (dwCkDiv << 16) | (dwClDiv << 8) | dwClDiv ;
}
/**
* \brief Configures a TWI peripheral to operate in slave mode.
* \param pTwi Pointer to an Twi instance.
* \param slaveAddress Slave address.
*/
void TWI_ConfigureSlave(Twi *pTwi, uint8_t slaveAddress)
{
uint32_t i;
/* TWI software reset */
pTwi->TWI_CR = TWI_CR_SWRST;
pTwi->TWI_RHR;
/* Wait at least 10 ms */
for (i=0; i < 1000000; i++);
/* TWI Slave Mode Disabled, TWI Master Mode Disabled*/
pTwi->TWI_CR = TWI_CR_SVDIS | TWI_CR_MSDIS;
/* Configure slave address. */
pTwi->TWI_SMR = 0;
pTwi->TWI_SMR = TWI_SMR_SADR(slaveAddress);
/* SVEN: TWI Slave Mode Enabled */
pTwi->TWI_CR = TWI_CR_SVEN;
/* Wait at least 10 ms */
for (i=0; i < 1000000; i++);
assert( (pTwi->TWI_CR & TWI_CR_SVDIS)!= TWI_CR_SVDIS ) ;
}
/**
* \brief Sends a STOP condition on the TWI.
* \param pTwi Pointer to an Twi instance.
*/
void TWI_Stop( Twi *pTwi )
{
assert( pTwi != NULL ) ;
pTwi->TWI_CR = TWI_CR_STOP;
}
/**
* \brief Starts a read operation on the TWI bus with the specified slave, it returns
* immediately. Data must then be read using TWI_ReadByte() whenever a byte is
* available (poll using TWI_ByteReceived()).
* \param pTwi Pointer to an Twi instance.
* \param address Slave address on the bus.
* \param iaddress Optional internal address bytes.
* \param isize Number of internal address bytes.
*/
void TWI_StartRead(
Twi *pTwi,
uint8_t address,
uint32_t iaddress,
uint8_t isize)
{
assert( pTwi != NULL ) ;
assert( (address & 0x80) == 0 ) ;
assert( (iaddress & 0xFF000000) == 0 ) ;
assert( isize < 4 ) ;
/* Set slave address and number of internal address bytes. */
pTwi->TWI_MMR = 0;
pTwi->TWI_MMR = (isize << 8) | TWI_MMR_MREAD | (address << 16);
/* Set internal address bytes */
pTwi->TWI_IADR = 0;
pTwi->TWI_IADR = iaddress;
/* Send START condition */
pTwi->TWI_CR = TWI_CR_START;
}
/**
* \brief Reads a byte from the TWI bus. The read operation must have been started
* using TWI_StartRead() and a byte must be available (check with TWI_ByteReceived()).
* \param pTwi Pointer to an Twi instance.
* \return byte read.
*/
uint8_t TWI_ReadByte(Twi *pTwi)
{
assert( pTwi != NULL ) ;
return pTwi->TWI_RHR;
}
/**
* \brief Sends a byte of data to one of the TWI slaves on the bus.
* \note This function must be called once before TWI_StartWrite() with
* the first byte of data to send, then it shall be called repeatedly
* after that to send the remaining bytes.
* \param pTwi Pointer to an Twi instance.
* \param byte Byte to send.
*/
void TWI_WriteByte(Twi *pTwi, uint8_t byte)
{
assert( pTwi != NULL ) ;
pTwi->TWI_THR = byte;
}
/**
* \brief Starts a write operation on the TWI to access the selected slave, then
* returns immediately. A byte of data must be provided to start the write;
* other bytes are written next.
* after that to send the remaining bytes.
* \param pTwi Pointer to an Twi instance.
* \param address Address of slave to acccess on the bus.
* \param iaddress Optional slave internal address.
* \param isize Number of internal address bytes.
* \param byte First byte to send.
*/
void TWI_StartWrite(
Twi *pTwi,
uint8_t address,
uint32_t iaddress,
uint8_t isize,
uint8_t byte)
{
assert( pTwi != NULL ) ;
assert( (address & 0x80) == 0 ) ;
assert( (iaddress & 0xFF000000) == 0 ) ;
assert( isize < 4 ) ;
/* Set slave address and number of internal address bytes. */
pTwi->TWI_MMR = 0;
pTwi->TWI_MMR = (isize << 8) | (address << 16);
/* Set internal address bytes. */
pTwi->TWI_IADR = 0;
pTwi->TWI_IADR = iaddress;
/* Write first byte to send.*/
TWI_WriteByte(pTwi, byte);
}
/**
* \brief Check if a byte have been receiced from TWI.
* \param pTwi Pointer to an Twi instance.
* \return 1 if a byte has been received and can be read on the given TWI
* peripheral; otherwise, returns 0. This function resets the status register.
*/
uint8_t TWI_ByteReceived(Twi *pTwi)
{
return ((pTwi->TWI_SR & TWI_SR_RXRDY) == TWI_SR_RXRDY);
}
/**
* \brief Check if a byte have been sent to TWI.
* \param pTwi Pointer to an Twi instance.
* \return 1 if a byte has been sent so another one can be stored for
* transmission; otherwise returns 0. This function clears the status register.
*/
uint8_t TWI_ByteSent(Twi *pTwi)
{
return ((pTwi->TWI_SR & TWI_SR_TXRDY) == TWI_SR_TXRDY);
}
/**
* \brief Check if current transmission is complet.
* \param pTwi Pointer to an Twi instance.
* \return 1 if the current transmission is complete (the STOP has been sent);
* otherwise returns 0.
*/
uint8_t TWI_TransferComplete(Twi *pTwi)
{
return ((pTwi->TWI_SR & TWI_SR_TXCOMP) == TWI_SR_TXCOMP);
}
/**
* \brief Enables the selected interrupts sources on a TWI peripheral.
* \param pTwi Pointer to an Twi instance.
* \param sources Bitwise OR of selected interrupt sources.
*/
void TWI_EnableIt(Twi *pTwi, uint32_t sources)
{
assert( pTwi != NULL ) ;
assert( (sources & 0xFFFFF088) == 0 ) ;
pTwi->TWI_IER = sources;
}
/**
* \brief Disables the selected interrupts sources on a TWI peripheral.
* \param pTwi Pointer to an Twi instance.
* \param sources Bitwise OR of selected interrupt sources.
*/
void TWI_DisableIt(Twi *pTwi, uint32_t sources)
{
assert( pTwi != NULL ) ;
assert( (sources & 0xFFFFF088) == 0 ) ;
pTwi->TWI_IDR = sources;
}
/**
* \brief Get the current status register of the given TWI peripheral.
* \note This resets the internal value of the status register, so further
* read may yield different values.
* \param pTwi Pointer to an Twi instance.
* \return TWI status register.
*/
uint32_t TWI_GetStatus(Twi *pTwi)
{
assert( pTwi != NULL ) ;
return pTwi->TWI_SR;
}
/**
* \brief Returns the current status register of the given TWI peripheral, but
* masking interrupt sources which are not currently enabled.
* \note This resets the internal value of the status register, so further
* read may yield different values.
* \param pTwi Pointer to an Twi instance.
*/
uint32_t TWI_GetMaskedStatus(Twi *pTwi)
{
uint32_t status;
assert( pTwi != NULL ) ;
status = pTwi->TWI_SR;
status &= pTwi->TWI_IMR;
return status;
}
/**
* \brief Sends a STOP condition. STOP Condition is sent just after completing
* the current byte transmission in master read mode.
* \param pTwi Pointer to an Twi instance.
*/
void TWI_SendSTOPCondition(Twi *pTwi)
{
assert( pTwi != NULL ) ;
pTwi->TWI_CR |= TWI_CR_STOP;
}

342
firmware/atmel_softpack_libraries/libchip_sam3s/source/twid.c Normal file
View File

@@ -0,0 +1,342 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/*----------------------------------------------------------------------------
* Headers
*----------------------------------------------------------------------------*/
#include "chip.h"
#include <assert.h>
/*----------------------------------------------------------------------------
* Definition
*----------------------------------------------------------------------------*/
#define TWITIMEOUTMAX 50000
/*----------------------------------------------------------------------------
* Types
*----------------------------------------------------------------------------*/
/** TWI driver callback function.*/
typedef void (*TwiCallback)(Async *);
/** \brief TWI asynchronous transfer descriptor.*/
typedef struct _AsyncTwi {
/** Asynchronous transfer status. */
volatile uint8_t status;
// Callback function to invoke when transfer completes or fails.*/
TwiCallback callback;
/** Pointer to the data buffer.*/
uint8_t *pData;
/** Total number of bytes to transfer.*/
uint32_t num;
/** Number of already transferred bytes.*/
uint32_t transferred;
} AsyncTwi;
/*----------------------------------------------------------------------------
* Global functions
*----------------------------------------------------------------------------*/
/**
* \brief Initializes a TWI driver instance, using the given TWI peripheral.
* \note The peripheral must have been initialized properly before calling this function.
* \param pTwid Pointer to the Twid instance to initialize.
* \param pTwi Pointer to the TWI peripheral to use.
*/
void TWID_Initialize(Twid *pTwid, Twi *pTwi)
{
TRACE_DEBUG( "TWID_Initialize()\n\r" ) ;
assert( pTwid != NULL ) ;
assert( pTwi != NULL ) ;
/* Initialize driver. */
pTwid->pTwi = pTwi;
pTwid->pTransfer = 0;
}
/**
* \brief Interrupt handler for a TWI peripheral. Manages asynchronous transfer
* occuring on the bus. This function MUST be called by the interrupt service
* routine of the TWI peripheral if asynchronous read/write are needed.
* \param pTwid Pointer to a Twid instance.
*/
void TWID_Handler( Twid *pTwid )
{
uint8_t status;
AsyncTwi *pTransfer ;
Twi *pTwi ;
assert( pTwid != NULL ) ;
pTransfer = (AsyncTwi*)pTwid->pTransfer ;
assert( pTransfer != NULL ) ;
pTwi = pTwid->pTwi ;
assert( pTwi != NULL ) ;
/* Retrieve interrupt status */
status = TWI_GetMaskedStatus(pTwi);
/* Byte received */
if (TWI_STATUS_RXRDY(status)) {
pTransfer->pData[pTransfer->transferred] = TWI_ReadByte(pTwi);
pTransfer->transferred++;
/* check for transfer finish */
if (pTransfer->transferred == pTransfer->num) {
TWI_DisableIt(pTwi, TWI_IDR_RXRDY);
TWI_EnableIt(pTwi, TWI_IER_TXCOMP);
}
/* Last byte? */
else if (pTransfer->transferred == (pTransfer->num - 1)) {
TWI_Stop(pTwi);
}
}
/* Byte sent*/
else if (TWI_STATUS_TXRDY(status)) {
/* Transfer finished ? */
if (pTransfer->transferred == pTransfer->num) {
TWI_DisableIt(pTwi, TWI_IDR_TXRDY);
TWI_EnableIt(pTwi, TWI_IER_TXCOMP);
TWI_SendSTOPCondition(pTwi);
}
/* Bytes remaining */
else {
TWI_WriteByte(pTwi, pTransfer->pData[pTransfer->transferred]);
pTransfer->transferred++;
}
}
/* Transfer complete*/
else if (TWI_STATUS_TXCOMP(status)) {
TWI_DisableIt(pTwi, TWI_IDR_TXCOMP);
pTransfer->status = 0;
if (pTransfer->callback) {
pTransfer->callback((Async *) pTransfer);
}
pTwid->pTransfer = 0;
}
}
/**
* \brief Asynchronously reads data from a slave on the TWI bus. An optional
* callback function is triggered when the transfer is complete.
* \param pTwid Pointer to a Twid instance.
* \param address TWI slave address.
* \param iaddress Optional slave internal address.
* \param isize Internal address size in bytes.
* \param pData Data buffer for storing received bytes.
* \param num Number of bytes to read.
* \param pAsync Asynchronous transfer descriptor.
* \return 0 if the transfer has been started; otherwise returns a TWI error code.
*/
uint8_t TWID_Read(
Twid *pTwid,
uint8_t address,
uint32_t iaddress,
uint8_t isize,
uint8_t *pData,
uint32_t num,
Async *pAsync)
{
Twi *pTwi;
AsyncTwi *pTransfer;
uint32_t timeout;
assert( pTwid != NULL ) ;
pTwi = pTwid->pTwi;
pTransfer = (AsyncTwi *) pTwid->pTransfer;
assert( (address & 0x80) == 0 ) ;
assert( (iaddress & 0xFF000000) == 0 ) ;
assert( isize < 4 ) ;
/* Check that no transfer is already pending*/
if (pTransfer) {
TRACE_ERROR("TWID_Read: A transfer is already pending\n\r");
return TWID_ERROR_BUSY;
}
/* Set STOP signal if only one byte is sent*/
if (num == 1) {
TWI_Stop(pTwi);
}
/* Asynchronous transfer*/
if (pAsync) {
/* Update the transfer descriptor */
pTwid->pTransfer = pAsync;
pTransfer = (AsyncTwi *) pAsync;
pTransfer->status = ASYNC_STATUS_PENDING;
pTransfer->pData = pData;
pTransfer->num = num;
pTransfer->transferred = 0;
/* Enable read interrupt and start the transfer */
TWI_EnableIt(pTwi, TWI_IER_RXRDY);
TWI_StartRead(pTwi, address, iaddress, isize);
}
/* Synchronous transfer*/
else {
/* Start read*/
TWI_StartRead(pTwi, address, iaddress, isize);
/* Read all bytes, setting STOP before the last byte*/
while (num > 0) {
/* Last byte ?*/
if (num == 1) {
TWI_Stop(pTwi);
}
/* Wait for byte then read and store it*/
timeout = 0;
while( !TWI_ByteReceived(pTwi) && (++timeout<TWITIMEOUTMAX) );
if (timeout == TWITIMEOUTMAX) {
TRACE_ERROR("TWID Timeout BR\n\r");
}
*pData++ = TWI_ReadByte(pTwi);
num--;
}
/* Wait for transfer to be complete */
timeout = 0;
while( !TWI_TransferComplete(pTwi) && (++timeout<TWITIMEOUTMAX) );
if (timeout == TWITIMEOUTMAX) {
TRACE_ERROR("TWID Timeout TC\n\r");
}
}
return 0;
}
/**
* \brief Asynchronously sends data to a slave on the TWI bus. An optional callback
* function is invoked whenever the transfer is complete.
* \param pTwid Pointer to a Twid instance.
* \param address TWI slave address.
* \param iaddress Optional slave internal address.
* \param isize Number of internal address bytes.
* \param pData Data buffer for storing received bytes.
* \param num Data buffer to send.
* \param pAsync Asynchronous transfer descriptor.
* \return 0 if the transfer has been started; otherwise returns a TWI error code.
*/
uint8_t TWID_Write(
Twid *pTwid,
uint8_t address,
uint32_t iaddress,
uint8_t isize,
uint8_t *pData,
uint32_t num,
Async *pAsync)
{
Twi *pTwi = pTwid->pTwi;
AsyncTwi *pTransfer = (AsyncTwi *) pTwid->pTransfer;
uint32_t timeout;
assert( pTwi != NULL ) ;
assert( (address & 0x80) == 0 ) ;
assert( (iaddress & 0xFF000000) == 0 ) ;
assert( isize < 4 ) ;
/* Check that no transfer is already pending */
if (pTransfer) {
TRACE_ERROR("TWI_Write: A transfer is already pending\n\r");
return TWID_ERROR_BUSY;
}
/* Asynchronous transfer */
if (pAsync) {
/* Update the transfer descriptor */
pTwid->pTransfer = pAsync;
pTransfer = (AsyncTwi *) pAsync;
pTransfer->status = ASYNC_STATUS_PENDING;
pTransfer->pData = pData;
pTransfer->num = num;
pTransfer->transferred = 1;
/* Enable write interrupt and start the transfer */
TWI_StartWrite(pTwi, address, iaddress, isize, *pData);
TWI_EnableIt(pTwi, TWI_IER_TXRDY);
}
/* Synchronous transfer*/
else {
// Start write
TWI_StartWrite(pTwi, address, iaddress, isize, *pData++);
num--;
/* Send all bytes */
while (num > 0) {
/* Wait before sending the next byte */
timeout = 0;
while( !TWI_ByteSent(pTwi) && (++timeout<TWITIMEOUTMAX) );
if (timeout == TWITIMEOUTMAX) {
TRACE_ERROR("TWID Timeout BS\n\r");
}
TWI_WriteByte(pTwi, *pData++);
num--;
}
/* Wait for actual end of transfer */
timeout = 0;
/* Send a STOP condition */
TWI_SendSTOPCondition(pTwi);
while( !TWI_TransferComplete(pTwi) && (++timeout<TWITIMEOUTMAX) );
if (timeout == TWITIMEOUTMAX) {
TRACE_ERROR("TWID Timeout TC2\n\r");
}
}
return 0;
}

410
firmware/atmel_softpack_libraries/libchip_sam3s/source/usart.c Normal file
View File

@@ -0,0 +1,410 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/** \addtogroup usart_module Working with USART
* The USART driver provides the interface to configure and use the USART peripheral.\n
*
* The USART supports several kinds of comminication modes such as full-duplex asynchronous/
* synchronous serial commnunication,RS485 with driver control signal,ISO7816,SPI and Test modes.
*
* To start a USART transfer with \ref AT91SAM3S_PDC "PDC" support, the user could follow these steps:
* <ul>
* <li> Configure USART with expected mode and baudrate(see \ref USART_Configure), which could be done by:
* -# Resetting and disabling transmitter and receiver by setting US_CR(Control Register). </li>
* -# Conifguring the USART in a specific mode by setting USART_MODE bits in US_MR(Mode Register) </li>
* -# Setting baudrate which is different from mode to mode.
</li>
* <li> Enable transmitter or receiver respectively by set US_CR_TXEN or US_CR_RXEN in US_CR.</li>
* <li> Read from or write to the peripheral with \ref USART_ReadBuffer or \ref USART_WriteBuffer.
These operations could be done by polling or interruption. </li>
* <li> For polling, check the status bit US_CSR_ENDRX/US_CSR_RXBUFF (READ) or US_CSR_ENDTX/
US_CSR_TXBUFE (WRITE). </li>
* <li> For interruption,"enable" the status bit through US_IER and
realize the hanler with USARTx_IrqHandler according to IRQ vector
table which is defined in board_cstartup_<toolchain>.c
To enable the interruption of USART,it should be configured with priority and enabled first through
NVIC .</li>
* </ul>
*
* For more accurate information, please look at the USART section of the
* Datasheet.
*
* Related files :\n
* \ref usart.c\n
* \ref usart.h\n
*/
/**
* \file
*
* Implementation of USART (Universal Synchronous Asynchronous Receiver Transmitter)
* controller.
*
*/
/*------------------------------------------------------------------------------
* Headers
*------------------------------------------------------------------------------*/
#include "chip.h"
#include "trace.h"
#include <assert.h>
#include <string.h>
/*----------------------------------------------------------------------------
* Local definitions
*----------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------
* Exported functions
*------------------------------------------------------------------------------*/
/**
* \brief Configures an USART peripheral with the specified parameters.
*
*
* \param usart Pointer to the USART peripheral to configure.
* \param mode Desired value for the USART mode register (see the datasheet).
* \param baudrate Baudrate at which the USART should operate (in Hz).
* \param masterClock Frequency of the system master clock (in Hz).
*/
void USART_Configure(Usart *usart,
uint32_t mode,
uint32_t baudrate,
uint32_t masterClock)
{
/* Reset and disable receiver & transmitter*/
usart->US_CR = US_CR_RSTRX | US_CR_RSTTX
| US_CR_RXDIS | US_CR_TXDIS;
/* Configure mode*/
usart->US_MR = mode;
/* Configure baudrate*/
/* Asynchronous, no oversampling*/
if ( ((mode & US_MR_SYNC) == 0) && ((mode & US_MR_OVER) == 0) )
{
usart->US_BRGR = (masterClock / baudrate) / 16;
}
if( ((mode & US_MR_USART_MODE_SPI_MASTER) == US_MR_USART_MODE_SPI_MASTER)
|| ((mode & US_MR_SYNC) == US_MR_SYNC))
{
if( (mode & US_MR_USCLKS_Msk) == US_MR_USCLKS_MCK)
{
usart->US_BRGR = masterClock / baudrate;
}
else
{
if ( (mode & US_MR_USCLKS_DIV) == US_MR_USCLKS_DIV)
{
usart->US_BRGR = masterClock / baudrate / 8;
}
}
}
/* TODO other modes*/
}
/**
* \brief Enables or disables the transmitter of an USART peripheral.
*
*
* \param usart Pointer to an USART peripheral
* \param enabled If true, the transmitter is enabled; otherwise it is
* disabled.
*/
void USART_SetTransmitterEnabled(Usart *usart, uint8_t enabled)
{
if (enabled) {
usart->US_CR = US_CR_TXEN;
}
else {
usart->US_CR = US_CR_TXDIS;
}
}
/**
* \brief Enables or disables the receiver of an USART peripheral
*
*
* \param usart Pointer to an USART peripheral
* \param enabled If true, the receiver is enabled; otherwise it is disabled.
*/
void USART_SetReceiverEnabled(Usart *usart,
uint8_t enabled)
{
if (enabled) {
usart->US_CR = US_CR_RXEN;
}
else {
usart->US_CR = US_CR_RXDIS;
}
}
/**
* \brief Sends one packet of data through the specified USART peripheral. This
* function operates synchronously, so it only returns when the data has been
* actually sent.
*
*
* \param usart Pointer to an USART peripheral.
* \param data Data to send including 9nth bit and sync field if necessary (in
* the same format as the US_THR register in the datasheet).
* \param timeOut Time out value (0 = no timeout).
*/
void USART_Write(
Usart *usart,
uint16_t data,
volatile uint32_t timeOut)
{
if (timeOut == 0) {
while ((usart->US_CSR & US_CSR_TXEMPTY) == 0);
}
else {
while ((usart->US_CSR & US_CSR_TXEMPTY) == 0) {
if (timeOut == 0) {
TRACE_ERROR("USART_Write: Timed out.\n\r");
return;
}
timeOut--;
}
}
usart->US_THR = data;
}
/**
* \brief Sends the contents of a data buffer through the specified USART peripheral.
* This function returns immediately (1 if the buffer has been queued, 0
* otherwise); poll the ENDTX and TXBUFE bits of the USART status register
* to check for the transfer completion.
*
* \param usart Pointer to an USART peripheral.
* \param buffer Pointer to the data buffer to send.
* \param size Size of the data buffer (in bytes).
*/
uint8_t USART_WriteBuffer(
Usart *usart,
void *buffer,
uint32_t size)
{
/* Check if the first PDC bank is free*/
if ((usart->US_TCR == 0) && (usart->US_TNCR == 0)) {
usart->US_TPR = (uint32_t) buffer;
usart->US_TCR = size;
usart->US_PTCR = US_PTCR_TXTEN;
return 1;
}
/* Check if the second PDC bank is free*/
else if (usart->US_TNCR == 0) {
usart->US_TNPR = (uint32_t) buffer;
usart->US_TNCR = size;
return 1;
}
else {
return 0;
}
}
/**
* \brief Reads and return a packet of data on the specified USART peripheral. This
* function operates asynchronously, so it waits until some data has been
* received.
*
* \param usart Pointer to an USART peripheral.
* \param timeOut Time out value (0 -> no timeout).
*/
uint16_t USART_Read(
Usart *usart,
volatile uint32_t timeOut)
{
if (timeOut == 0) {
while ((usart->US_CSR & US_CSR_RXRDY) == 0);
}
else {
while ((usart->US_CSR & US_CSR_RXRDY) == 0) {
if (timeOut == 0) {
TRACE_ERROR( "USART_Read: Timed out.\n\r" ) ;
return 0;
}
timeOut--;
}
}
return usart->US_RHR;
}
/**
* \brief Reads data from an USART peripheral, filling the provided buffer until it
* becomes full. This function returns immediately with 1 if the buffer has
* been queued for transmission; otherwise 0.
*
* \param usart Pointer to an USART peripheral.
* \param buffer Pointer to the buffer where the received data will be stored.
* \param size Size of the data buffer (in bytes).
*/
uint8_t USART_ReadBuffer(Usart *usart,
void *buffer,
uint32_t size)
{
/* Check if the first PDC bank is free*/
if ((usart->US_RCR == 0) && (usart->US_RNCR == 0)) {
usart->US_RPR = (uint32_t) buffer;
usart->US_RCR = size;
usart->US_PTCR = US_PTCR_RXTEN;
return 1;
}
/* Check if the second PDC bank is free*/
else if (usart->US_RNCR == 0) {
usart->US_RNPR = (uint32_t) buffer;
usart->US_RNCR = size;
return 1;
}
else {
return 0;
}
}
/**
* \brief Returns 1 if some data has been received and can be read from an USART;
* otherwise returns 0.
*
* \param usart Pointer to an Usart instance.
*/
uint8_t USART_IsDataAvailable(Usart *usart)
{
if ((usart->US_CSR & US_CSR_RXRDY) != 0) {
return 1;
}
else {
return 0;
}
}
/**
* \brief Sets the filter value for the IRDA demodulator.
*
* \param pUsart Pointer to an Usart instance.
* \param filter Filter value.
*/
void USART_SetIrdaFilter(Usart *pUsart, uint8_t filter)
{
assert( pUsart != NULL ) ;
pUsart->US_IF = filter;
}
/**
* \brief Sends one packet of data through the specified USART peripheral. This
* function operates synchronously, so it only returns when the data has been
* actually sent.
*
* \param usart Pointer to an USART peripheral.
* \param c Character to send
*/
void USART_PutChar(
Usart *usart,
uint8_t c)
{
/* Wait for the transmitter to be ready*/
while ((usart->US_CSR & US_CSR_TXEMPTY) == 0);
/* Send character*/
usart->US_THR = c;
/* Wait for the transfer to complete*/
while ((usart->US_CSR & US_CSR_TXEMPTY) == 0);
}
/**
* \brief Return 1 if a character can be read in USART
*/
uint32_t USART_IsRxReady(Usart *usart)
{
return (usart->US_CSR & US_CSR_RXRDY);
}
/**
* \brief Get present status
*/
uint32_t USART_GetStatus(Usart *usart)
{
return usart->US_CSR;
}
/**
* \brief Enable interrupt
*/
void USART_EnableIt(Usart *usart,uint32_t mode)
{
usart->US_IER = mode;
}
/**
* \brief Disable interrupt
*/
void USART_DisableIt(Usart *usart,uint32_t mode)
{
usart->US_IDR = mode;
}
/**
* \brief Reads and returns a character from the USART.
*
* \note This function is synchronous (i.e. uses polling).
* \param usart Pointer to an USART peripheral.
* \return Character received.
*/
uint8_t USART_GetChar(Usart *usart)
{
while ((usart->US_CSR & US_CSR_RXRDY) == 0);
return usart->US_RHR;
}

132
firmware/atmel_softpack_libraries/libchip_sam3s/source/wdt.c Normal file
View File

@@ -0,0 +1,132 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/**
* \file
*
* Implementation of Watchdog Timer (WDT) controller.
*
*/
/** \addtogroup wdt_module Working with WDT
* The WDT driver provides the interface to configure and use the WDT
* peripheral.
*
* The WDT can be used to prevent system lock-up if the software becomes
* trapped in a deadlock. It can generate a general reset or a processor
* reset only. It is clocked by slow clock divided by 128.
*
* The WDT is running at reset with 16 seconds watchdog period (slow clock at 32.768 kHz)
* and external reset generation enabled. The user must either disable it or
* reprogram it to meet the application requires.
*
* To use the WDT, the user could follow these few steps:
* <ul>
* <li>Enable watchdog with given mode using \ref WDT_Enable().
* <li>Restart the watchdog using \ref WDT_Restart() within the watchdog period.
* </ul>
*
* For more accurate information, please look at the WDT section of the
* Datasheet.
*
* \note
* The Watchdog Mode Register (WDT_MR) can be written only once.\n
*
* Related files :\n
* \ref wdt.c\n
* \ref wdt.h.\n
*/
/*@{*/
/*@}*/
/*---------------------------------------------------------------------------
* Headers
*---------------------------------------------------------------------------*/
#include "chip.h"
#include <stdint.h>
/*----------------------------------------------------------------------------
* Exported functions
*----------------------------------------------------------------------------*/
/**
* \brief Enable watchdog with given mode.
*
* \note The Watchdog Mode Register (WDT_MR) can be written only once.
* Only a processor reset resets it.
*
* \param dwMode WDT mode to be set
*/
extern void WDT_Enable( Wdt* pWDT, uint32_t dwMode )
{
pWDT->WDT_MR = dwMode ;
}
/**
* \brief Disable watchdog.
*
* \note The Watchdog Mode Register (WDT_MR) can be written only once.
* Only a processor reset resets it.
*/
extern void WDT_Disable( Wdt* pWDT )
{
pWDT->WDT_MR = WDT_MR_WDDIS;
}
/**
* \brief Watchdog restart.
*/
extern void WDT_Restart( Wdt* pWDT )
{
pWDT->WDT_CR = 0xA5000001;
}
/**
* \brief Watchdog get status.
*/
extern uint32_t WDT_GetStatus( Wdt* pWDT )
{
return (pWDT->WDT_SR & 0x3) ;
}
/**
* \brief Watchdog get period.
*
* \param dwMs desired watchdog period in millisecond.
*/
extern uint32_t WDT_GetPeriod( uint32_t dwMs )
{
if ( (dwMs < 4) || (dwMs > 16000) )
{
return 0 ;
}
return ((dwMs << 8) / 1000) ;
}