catarrh/simtrace2
1
0
Fork 0
mirror of https://gitea.osmocom.org/sim-card/simtrace2.git synced 2026-03-29 09:47:47 +03:00
Code Issues Packages Projects Releases Wiki Activity

iso7816_4.c: Moved around lines, only sniffer works

Browse Source
This commit is contained in:
Christina Quast
2015-04-16 11:08:32 +02:00
parent ec9c09e9b9
commit 68cc859870
1 changed files with 27 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

35
firmware/src_board/iso7816_4.c
View File

@@ -137,7 +137,16 @@ uint32_t ISO7816_SendChar( uint8_t CharToSend, Usart_info *usart )
} }
/* Wait USART ready for transmit */ /* Wait USART ready for transmit */
while((us_base->US_CSR & US_CSR_TXRDY) == 0) {} int i = 0;
while((us_base->US_CSR & (US_CSR_TXRDY)) == 0) {
i++;
if (!(i%1000000)) {
printf("s: %x\n", us_base->US_CSR);
printf("s: %x\n", us_base->US_RHR & 0xFF);
us_base->US_CR = US_CR_RSTTX;
us_base->US_CR = US_CR_RSTRX;
}
}
/* There is no character in the US_THR */ /* There is no character in the US_THR */
/* Transmit a char */ /* Transmit a char */
@@ -148,12 +157,12 @@ uint32_t ISO7816_SendChar( uint8_t CharToSend, Usart_info *usart )
(1<<10))); (1<<10)));
if (status != 0 ) { if (status != 0 ) {
TRACE_DEBUG("******* status: 0x%" PRIX32 " (Overrun: %" PRIX32 TRACE_INFO("******* status: 0x%" PRIX32 " (Overrun: %" PRIX32
", NACK: %" PRIX32 ", Timeout: %" PRIX32 ", underrun: %" PRIX32 ")\n\r", ", NACK: %" PRIX32 ", Timeout: %" PRIX32 ", underrun: %" PRIX32 ")\n\r",
status, ((status & US_CSR_OVRE)>> 5), ((status & US_CSR_NACK) >> 13), status, ((status & US_CSR_OVRE)>> 5), ((status & US_CSR_NACK) >> 13),
((status & US_CSR_TIMEOUT) >> 8), ((status & (1 << 10)) >> 10)); ((status & US_CSR_TIMEOUT) >> 8), ((status & (1 << 10)) >> 10));
TRACE_DEBUG("E (USART CSR reg):0x%" PRIX32 "\n\r", us_base->US_CSR); TRACE_INFO("E (USART CSR reg):0x%" PRIX32 "\n\r", us_base->US_CSR);
TRACE_DEBUG("Nb (Number of errors):0x%" PRIX32 "\n\r", us_base->US_NER ); TRACE_INFO("Nb (Number of errors):0x%" PRIX32 "\n\r", us_base->US_NER );
us_base->US_CR = US_CR_RSTSTA; us_base->US_CR = US_CR_RSTSTA;
} }
@@ -640,6 +649,11 @@ void ISO7816_Init( Usart_info *usart, bool master_clock )
Usart *us_base = usart->base; Usart *us_base = usart->base;
uint32_t us_id = usart->id; uint32_t us_id = usart->id;
us_base->US_CR = US_CR_RSTRX
| US_CR_RSTTX
| US_CR_RXDIS
| US_CR_TXDIS;
if (master_clock == true) { if (master_clock == true) {
clk = US_MR_USCLKS_MCK; clk = US_MR_USCLKS_MCK;
} else { } else {
@@ -653,28 +667,33 @@ void ISO7816_Init( Usart_info *usart, bool master_clock )
| US_MR_PAR_EVEN | US_MR_PAR_EVEN
| US_MR_CHRL_8_BIT | US_MR_CHRL_8_BIT
| US_MR_CLKO | US_MR_CLKO
| (0<<24), /* MAX_ITERATION */ | US_MR_INACK /* Inhibit errors */
| (3<<24), /* MAX_ITERATION */
1, 1,
0); 0);
/* Configure USART */
PMC_EnablePeripheral(us_id);
/* Disable interrupts */ /* Disable interrupts */
us_base->US_IDR = (uint32_t) -1; us_base->US_IDR = (uint32_t) -1;
/* Configure USART */
PMC_EnablePeripheral(us_id);
us_base->US_FIDI = 372; /* by default */ us_base->US_FIDI = 372; /* by default */
/* Define the baud rate divisor register */ /* Define the baud rate divisor register */
/* CD = MCK / SCK */ /* CD = MCK / SCK */
/* SCK = FIDI x BAUD = 372 x 9600 */ /* SCK = FIDI x BAUD = 372 x 9600 */
/* BOARD_MCK */ /* BOARD_MCK */
/* CD = MCK/(FIDI x BAUD) = 48000000 / (372x9600) = 13 */ /* CD = MCK/(FIDI x BAUD) = 48000000 / (372x9600) = 13 */
us_base->US_BRGR = BOARD_MCK / (372*9600); us_base->US_BRGR = US_BRGR_CD(1);
// us_base->US_BRGR = BOARD_MCK / (372*9150);
/* Write the Timeguard Register */ /* Write the Timeguard Register */
// us_base->US_RTOR = 0;
us_base->US_TTGR = 5; us_base->US_TTGR = 5;
USART_SetTransmitterEnabled(us_base, 1); USART_SetTransmitterEnabled(us_base, 1);
USART_SetReceiverEnabled(us_base, 1); USART_SetReceiverEnabled(us_base, 1);
us_base->US_RHR;
} }