mirror of
https://gitea.osmocom.org/sim-card/simtrace2.git
synced 2026-03-19 23:08:34 +03:00
minor add comments
this is just to better understand the flow Change-Id: I045286836176da729cc8c863866d6f6aa3836592
This commit is contained in:
committed by
Harald Welte
parent
50360e0706
commit
b218cc38d0
@@ -1,7 +1,7 @@
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/* card emulation mode
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/* card emulation mode
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*
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*
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* (C) 2015-2017 by Harald Welte <laforge@gnumonks.org>
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* (C) 2015-2017 by Harald Welte <laforge@gnumonks.org>
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* (C) 2018 by sysmocom -s.f.m.c. GmbH, Author: Kevin Redon <kredon@sysmocom.de>
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* (C) 2018-2019 by sysmocom -s.f.m.c. GmbH, Author: Kevin Redon <kredon@sysmocom.de>
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* it under the terms of the GNU General Public License as published by
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@@ -194,7 +194,8 @@ int card_emu_uart_tx(uint8_t uart_chan, uint8_t byte)
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}
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}
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/* FIXME: integrate this with actual irq handler */
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/*! common handler if interrupt was received.
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* \param[in] inst_num Instance number, range 0..1 (some boards only '0' permitted) */
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static void usart_irq_rx(uint8_t inst_num)
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static void usart_irq_rx(uint8_t inst_num)
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{
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{
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Usart *usart = get_usart_by_chan(inst_num);
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Usart *usart = get_usart_by_chan(inst_num);
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@@ -202,32 +203,43 @@ static void usart_irq_rx(uint8_t inst_num)
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uint32_t csr;
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uint32_t csr;
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uint8_t byte = 0;
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uint8_t byte = 0;
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/* get one atomic snapshot of state/flags before they get changed */
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csr = usart->US_CSR & usart->US_IMR;
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csr = usart->US_CSR & usart->US_IMR;
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/* check if one byte has been completely received and is now in the holding register */
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if (csr & US_CSR_RXRDY) {
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if (csr & US_CSR_RXRDY) {
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/* read the bye from the holding register */
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byte = (usart->US_RHR) & 0xFF;
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byte = (usart->US_RHR) & 0xFF;
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/* append it to the buffer */
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if (rbuf_write(&ci->rb, byte) < 0)
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if (rbuf_write(&ci->rb, byte) < 0)
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TRACE_ERROR("rbuf overrun\r\n");
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TRACE_ERROR("rbuf overrun\r\n");
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}
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}
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/* check if the transmitter is ready for the next byte */
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if (csr & US_CSR_TXRDY) {
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if (csr & US_CSR_TXRDY) {
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if (card_emu_tx_byte(ci->ch) == 0)
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/* transmit next byte and check if more bytes are to be transmitted */
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if (card_emu_tx_byte(ci->ch) == 0) {
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/* stop the TX ready interrupt of no more bytes to transmit */
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USART_DisableIt(usart, US_IER_TXRDY);
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USART_DisableIt(usart, US_IER_TXRDY);
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}
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}
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}
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if (csr & (US_CSR_OVRE|US_CSR_FRAME|US_CSR_PARE|
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/* check if any error flags are set */
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US_CSR_TIMEOUT|US_CSR_NACK|(1<<10))) {
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if (csr & (US_CSR_OVRE|US_CSR_FRAME|US_CSR_PARE|US_CSR_TIMEOUT|US_CSR_NACK|(1<<10))) {
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/* clear any error flags */
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usart->US_CR = US_CR_RSTSTA | US_CR_RSTIT | US_CR_RSTNACK;
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usart->US_CR = US_CR_RSTSTA | US_CR_RSTIT | US_CR_RSTNACK;
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TRACE_ERROR("%u e 0x%x st: 0x%lx\n", ci->num, byte, csr);
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TRACE_ERROR("%u USART error on 0x%x status: 0x%lx\n", ci->num, byte, csr);
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}
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}
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}
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}
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/*! ISR called for USART0 */
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void mode_cardemu_usart0_irq(void)
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void mode_cardemu_usart0_irq(void)
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{
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{
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/* USART0 == Instance 1 == USIM 2 */
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/* USART0 == Instance 1 == USIM 2 */
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usart_irq_rx(1);
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usart_irq_rx(1);
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}
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}
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/*! ISR called for USART1 */
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void mode_cardemu_usart1_irq(void)
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void mode_cardemu_usart1_irq(void)
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{
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{
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/* USART1 == Instance 0 == USIM 1 */
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/* USART1 == Instance 0 == USIM 1 */
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@@ -419,15 +431,21 @@ void mode_cardemu_init(void)
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INIT_LLIST_HEAD(&cardem_inst[0].usb_out_queue);
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INIT_LLIST_HEAD(&cardem_inst[0].usb_out_queue);
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rbuf_reset(&cardem_inst[0].rb);
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rbuf_reset(&cardem_inst[0].rb);
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PIO_Configure(pins_usim1, PIO_LISTSIZE(pins_usim1));
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PIO_Configure(pins_usim1, PIO_LISTSIZE(pins_usim1));
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/* configure USART as ISO-7816 slave (e.g. card) */
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ISO7816_Init(&cardem_inst[0].usart_info, CLK_SLAVE);
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ISO7816_Init(&cardem_inst[0].usart_info, CLK_SLAVE);
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NVIC_EnableIRQ(USART1_IRQn);
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NVIC_EnableIRQ(USART1_IRQn);
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PIO_ConfigureIt(&pin_usim1_rst, usim1_rst_irqhandler);
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PIO_ConfigureIt(&pin_usim1_rst, usim1_rst_irqhandler);
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PIO_EnableIt(&pin_usim1_rst);
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PIO_EnableIt(&pin_usim1_rst);
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usim1_rst_irqhandler(&pin_usim1_rst); /* obtain current RST state */
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/* obtain current RST state */
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usim1_rst_irqhandler(&pin_usim1_rst);
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#ifndef DETECT_VCC_BY_ADC
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#ifndef DETECT_VCC_BY_ADC
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PIO_ConfigureIt(&pin_usim1_vcc, usim1_vcc_irqhandler);
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PIO_ConfigureIt(&pin_usim1_vcc, usim1_vcc_irqhandler);
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PIO_EnableIt(&pin_usim1_vcc);
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PIO_EnableIt(&pin_usim1_vcc);
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usim1_vcc_irqhandler(&pin_usim1_vcc); /* obtain current VCC state */
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/* obtain current VCC state */
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usim1_vcc_irqhandler(&pin_usim1_vcc);
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#else
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#else
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do {} while (!adc_triggered); /* wait for first ADC reading */
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do {} while (!adc_triggered); /* wait for first ADC reading */
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#endif /* DETECT_VCC_BY_ADC */
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#endif /* DETECT_VCC_BY_ADC */
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@@ -442,6 +460,7 @@ void mode_cardemu_init(void)
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rbuf_reset(&cardem_inst[1].rb);
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rbuf_reset(&cardem_inst[1].rb);
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PIO_Configure(pins_usim2, PIO_LISTSIZE(pins_usim2));
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PIO_Configure(pins_usim2, PIO_LISTSIZE(pins_usim2));
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ISO7816_Init(&cardem_inst[1].usart_info, CLK_SLAVE);
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ISO7816_Init(&cardem_inst[1].usart_info, CLK_SLAVE);
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/* TODO enable timeout */
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NVIC_EnableIRQ(USART0_IRQn);
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NVIC_EnableIRQ(USART0_IRQn);
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PIO_ConfigureIt(&pin_usim2_rst, usim2_rst_irqhandler);
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PIO_ConfigureIt(&pin_usim2_rst, usim2_rst_irqhandler);
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PIO_EnableIt(&pin_usim2_rst);
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PIO_EnableIt(&pin_usim2_rst);
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@@ -458,6 +477,7 @@ void mode_cardemu_init(void)
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SIMTRACE_CARDEM_USB_EP_USIM2_INT, cardem_inst[1].vcc_active,
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SIMTRACE_CARDEM_USB_EP_USIM2_INT, cardem_inst[1].vcc_active,
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cardem_inst[1].rst_active, cardem_inst[1].vcc_active);
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cardem_inst[1].rst_active, cardem_inst[1].vcc_active);
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sim_switch_use_physical(1, 1);
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sim_switch_use_physical(1, 1);
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/* TODO check RST and VCC */
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#endif /* CARDEMU_SECOND_UART */
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#endif /* CARDEMU_SECOND_UART */
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}
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}
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