mirror of
https://gitea.osmocom.org/sim-card/simtrace2.git
synced 2026-03-18 06:08:31 +03:00
Structure build system to build for multiple boards/apps/environments
This commit is contained in:
Harald Welte
572
firmware/libcommon/source/mode_cardemu.c
Normal file
572
firmware/libcommon/source/mode_cardemu.c
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@@ -0,0 +1,572 @@
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//#define TRACE_LEVEL 6
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#include "board.h"
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#include "simtrace.h"
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#include "ringbuffer.h"
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#include "card_emu.h"
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#include "iso7816_fidi.h"
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#include "utils.h"
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#include "osmocom/core/linuxlist.h"
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#include "llist_irqsafe.h"
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#include "req_ctx.h"
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#include "cardemu_prot.h"
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#define TRACE_ENTRY() TRACE_DEBUG("%s entering\r\n", __func__)
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static const Pin pins_cardsim[] = PINS_CARDSIM;
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/* UART pins */
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static const Pin pins_usim1[] = {PINS_USIM1};
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static const Pin pin_usim1_rst = PIN_USIM1_nRST;
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static const Pin pin_usim1_vcc = PIN_USIM1_VCC;
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#ifdef CARDEMU_SECOND_UART
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static const Pin pins_usim2[] = {PINS_USIM2};
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static const Pin pin_usim2_rst = PIN_USIM2_nRST;
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static const Pin pin_usim2_vcc = PIN_USIM2_VCC;
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#endif
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struct cardem_inst {
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uint32_t num;
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struct card_handle *ch;
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struct llist_head usb_out_queue;
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struct ringbuf rb;
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struct Usart_info usart_info;
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int usb_pending_old;
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uint8_t ep_out;
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uint8_t ep_in;
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uint8_t ep_int;
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const Pin pin_insert;
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uint32_t vcc_uv;
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uint32_t vcc_uv_last;
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};
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static struct cardem_inst cardem_inst[] = {
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{
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.num = 0,
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.usart_info = {
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.base = USART1,
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.id = ID_USART1,
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.state = USART_RCV
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},
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.ep_out = PHONE_DATAOUT,
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.ep_in = PHONE_DATAIN,
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.ep_int = PHONE_INT,
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.pin_insert = PIN_SET_USIM1_PRES,
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},
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#ifdef CARDEMU_SECOND_UART
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{
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.num = 1,
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.usart_info = {
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.base = USART0,
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.id = ID_USART0,
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.state = USART_RCV
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},
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.ep_out = CARDEM_USIM2_DATAOUT,
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.ep_in = CARDEM_USIM2_DATAIN,
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.ep_int = CARDEM_USIM2_INT,
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.pin_insert = PIN_SET_USIM2_PRES,
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},
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#endif
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};
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static Usart *get_usart_by_chan(uint8_t uart_chan)
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{
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switch (uart_chan) {
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case 0:
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return USART1;
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#ifdef CARDEMU_SECOND_UART
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case 1:
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return USART0;
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#endif
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}
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return NULL;
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}
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/***********************************************************************
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* Call-Backs from card_emu.c
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***********************************************************************/
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static void wait_tx_idle(Usart *usart)
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{
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int i = 1;
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/* wait until last char has been fully transmitted */
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while ((usart->US_CSR & (US_CSR_TXEMPTY)) == 0) {
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if (!(i%1000000)) {
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TRACE_ERROR("s: %x \r\n", usart->US_CSR);
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}
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i++;
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}
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}
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void card_emu_uart_wait_tx_idle(uint8_t uart_chan)
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{
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Usart *usart = get_usart_by_chan(uart_chan);
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wait_tx_idle(usart);
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}
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/* call-back from card_emu.c to enable/disable transmit and/or receive */
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void card_emu_uart_enable(uint8_t uart_chan, uint8_t rxtx)
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{
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Usart *usart = get_usart_by_chan(uart_chan);
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switch (rxtx) {
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case ENABLE_TX:
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USART_DisableIt(usart, ~US_IER_TXRDY);
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/* as irritating as it is, we actually want to keep the
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* receiver enabled during transmit */
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USART_SetReceiverEnabled(usart, 1);
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usart->US_CR = US_CR_RSTSTA | US_CR_RSTIT | US_CR_RSTNACK;
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USART_EnableIt(usart, US_IER_TXRDY);
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USART_SetTransmitterEnabled(usart, 1);
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break;
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case ENABLE_RX:
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USART_DisableIt(usart, ~US_IER_RXRDY);
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/* as irritating as it is, we actually want to keep the
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* transmitter enabled during receive */
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USART_SetTransmitterEnabled(usart, 1);
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wait_tx_idle(usart);
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usart->US_CR = US_CR_RSTSTA | US_CR_RSTIT | US_CR_RSTNACK;
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USART_EnableIt(usart, US_IER_RXRDY);
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USART_SetReceiverEnabled(usart, 1);
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break;
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case 0:
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default:
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USART_SetTransmitterEnabled(usart, 0);
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USART_SetReceiverEnabled(usart, 0);
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USART_DisableIt(usart, 0xFFFFFFFF);
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usart->US_CR = US_CR_RSTSTA | US_CR_RSTIT | US_CR_RSTNACK;
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break;
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}
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}
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/* call-back from card_emu.c to transmit a byte */
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int card_emu_uart_tx(uint8_t uart_chan, uint8_t byte)
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{
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Usart *usart = get_usart_by_chan(uart_chan);
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#if 0
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Usart_info *ui = &usart_info[uart_chan];
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ISO7816_SendChar(byte, ui);
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#else
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int i = 1;
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while ((usart->US_CSR & (US_CSR_TXRDY)) == 0) {
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if (!(i%1000000)) {
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TRACE_ERROR("%u: s: %x %02X\r\n",
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uart_chan, usart->US_CSR,
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usart->US_RHR & 0xFF);
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usart->US_CR = US_CR_RSTTX;
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usart->US_CR = US_CR_RSTRX;
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}
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i++;
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}
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usart->US_THR = byte;
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//TRACE_ERROR("Sx%02x\r\n", byte);
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#endif
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return 1;
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}
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/* FIXME: integrate this with actual irq handler */
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static void usart_irq_rx(uint8_t inst_num)
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{
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Usart *usart = get_usart_by_chan(inst_num);
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struct cardem_inst *ci = &cardem_inst[inst_num];
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uint32_t csr;
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uint8_t byte = 0;
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csr = usart->US_CSR & usart->US_IMR;
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if (csr & US_CSR_RXRDY) {
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byte = (usart->US_RHR) & 0xFF;
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rbuf_write(&ci->rb, byte);
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}
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if (csr & US_CSR_TXRDY) {
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if (card_emu_tx_byte(ci->ch) == 0)
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USART_DisableIt(usart, US_IER_TXRDY);
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}
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if (csr & (US_CSR_OVRE|US_CSR_FRAME|US_CSR_PARE|
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US_CSR_TIMEOUT|US_CSR_NACK|(1<<10))) {
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usart->US_CR = US_CR_RSTSTA | US_CR_RSTIT | US_CR_RSTNACK;
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TRACE_ERROR("%u e 0x%x st: 0x%x\n", ci->num, byte, csr);
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}
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}
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void mode_cardemu_usart0_irq(void)
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{
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/* USART0 == Instance 1 == USIM 2 */
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usart_irq_rx(1);
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}
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void mode_cardemu_usart1_irq(void)
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{
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/* USART1 == Instance 0 == USIM 1 */
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usart_irq_rx(0);
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}
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/* call-back from card_emu.c to change UART baud rate */
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int card_emu_uart_update_fidi(uint8_t uart_chan, unsigned int fidi)
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{
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int rc;
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Usart *usart = get_usart_by_chan(uart_chan);
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usart->US_CR |= US_CR_RXDIS | US_CR_RSTRX;
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usart->US_FIDI = fidi & 0x3ff;
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usart->US_CR |= US_CR_RXEN | US_CR_STTTO;
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return 0;
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}
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/***********************************************************************
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* ADC for VCC voltage detection
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***********************************************************************/
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#ifdef DETECT_VCC_BY_ADC
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static int adc_triggered = 0;
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static int adc_sam3s_reva_errata = 0;
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static int card_vcc_adc_init(void)
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{
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uint32_t chip_arch = CHIPID->CHIPID_CIDR & CHIPID_CIDR_ARCH_Msk;
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uint32_t chip_ver = CHIPID->CHIPID_CIDR & CHIPID_CIDR_VERSION_Msk;
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PMC_EnablePeripheral(ID_ADC);
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ADC->ADC_CR |= ADC_CR_SWRST;
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if (chip_ver == 0 &&
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(chip_arch == CHIPID_CIDR_ARCH_SAM3SxA ||
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chip_arch == CHIPID_CIDR_ARCH_SAM3SxB ||
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chip_arch == CHIPID_CIDR_ARCH_SAM3SxC)) {
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TRACE_INFO("Enabling Rev.A ADC Errata work-around\r\n");
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adc_sam3s_reva_errata = 1;
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}
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if (adc_sam3s_reva_errata) {
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/* Errata Work-Around to clear EOCx flags */
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volatile uint32_t foo;
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int i;
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for (i = 0; i < 16; i++)
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foo = ADC->ADC_CDR[i];
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}
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/* Initialize ADC for AD7 / AD6, fADC=48/24=2MHz */
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ADC->ADC_MR = ADC_MR_TRGEN_DIS | ADC_MR_LOWRES_BITS_12 |
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ADC_MR_SLEEP_NORMAL | ADC_MR_FWUP_OFF |
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ADC_MR_FREERUN_OFF | ADC_MR_PRESCAL(23) |
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ADC_MR_STARTUP_SUT8 | ADC_MR_SETTLING(3) |
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ADC_MR_ANACH_NONE | ADC_MR_TRACKTIM(4) |
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ADC_MR_TRANSFER(1) | ADC_MR_USEQ_NUM_ORDER;
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/* enable AD6 + AD7 channels */
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ADC->ADC_CHER = ADC_CHER_CH7;
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ADC->ADC_IER = ADC_IER_EOC7;
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#ifdef CARDEMU_SECOND_UART
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ADC->ADC_CHER |= ADC_CHER_CH6;
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ADC->ADC_IER |= ADC_IER_EOC6;
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#endif
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NVIC_EnableIRQ(ADC_IRQn);
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ADC->ADC_CR |= ADC_CR_START;
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return 0;
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}
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#define UV_PER_LSB ((3300 * 1000) / 4096)
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#define VCC_UV_THRESH_1V8 1500000
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#define VCC_UV_THRESH_3V 2800000
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static void process_vcc_adc(struct cardem_inst *ci)
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{
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if (ci->vcc_uv >= VCC_UV_THRESH_3V &&
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ci->vcc_uv_last < VCC_UV_THRESH_3V) {
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card_emu_io_statechg(ci->ch, CARD_IO_VCC, 1);
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/* FIXME do this for real */
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card_emu_io_statechg(ci->ch, CARD_IO_CLK, 1);
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} else if (ci->vcc_uv < VCC_UV_THRESH_3V &&
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ci->vcc_uv_last >= VCC_UV_THRESH_3V) {
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/* FIXME do this for real */
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card_emu_io_statechg(ci->ch, CARD_IO_CLK, 0);
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card_emu_io_statechg(ci->ch, CARD_IO_VCC, 0);
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}
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ci->vcc_uv_last = ci->vcc_uv;
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}
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static uint32_t adc2uv(uint16_t adc)
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{
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uint32_t uv = (uint32_t) adc * UV_PER_LSB;
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return uv;
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}
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void ADC_IrqHandler(void)
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{
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#ifdef CARDEMU_SECOND_UART
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if (ADC->ADC_ISR & ADC_ISR_EOC6) {
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uint16_t val = ADC->ADC_CDR[6] & 0xFFF;
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cardem_inst[1].vcc_uv = adc2uv(val);
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process_vcc_adc(&cardem_inst[1]);
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if (adc_sam3s_reva_errata) {
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/* Errata: START doesn't start a conversion
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* sequence, but only a single conversion */
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ADC->ADC_CR |= ADC_CR_START;
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}
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}
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#endif
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if (ADC->ADC_ISR & ADC_ISR_EOC7) {
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uint16_t val = ADC->ADC_CDR[7] & 0xFFF;
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cardem_inst[0].vcc_uv = adc2uv(val);
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process_vcc_adc(&cardem_inst[0]);
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ADC->ADC_CR |= ADC_CR_START;
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}
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}
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#endif /* DETECT_VCC_BY_ADC */
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/***********************************************************************
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* Core USB / mainloop integration
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***********************************************************************/
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static void usim1_rst_irqhandler(const Pin *pPin)
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{
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int active = PIO_Get(&pin_usim1_rst) ? 0 : 1;
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card_emu_io_statechg(cardem_inst[0].ch, CARD_IO_RST, active);
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}
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#ifndef DETECT_VCC_BY_ADC
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static void usim1_vcc_irqhandler(const Pin *pPin)
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{
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int active = PIO_Get(&pin_usim1_vcc) ? 1 : 0;
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card_emu_io_statechg(cardem_inst[0].ch, CARD_IO_VCC, active);
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/* FIXME do this for real */
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card_emu_io_statechg(cardem_inst[0].ch, CARD_IO_CLK, active);
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}
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#endif /* !DETECT_VCC_BY_ADC */
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#ifdef CARDEMU_SECOND_UART
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static void usim2_rst_irqhandler(const Pin *pPin)
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{
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int active = PIO_Get(&pin_usim2_rst) ? 0 : 1;
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card_emu_io_statechg(cardem_inst[1].ch, CARD_IO_RST, active);
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}
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#ifndef DETECT_VCC_BY_ADC
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static void usim2_vcc_irqhandler(const Pin *pPin)
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{
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int active = PIO_Get(&pin_usim2_vcc) ? 1 : 0;
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card_emu_io_statechg(cardem_inst[1].ch, CARD_IO_VCC, active);
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/* FIXME do this for real */
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card_emu_io_statechg(cardem_inst[1].ch, CARD_IO_CLK, active);
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}
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#endif /* !DETECT_VCC_BY_ADC */
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#endif /* CARDEMU_SECOND_UART */
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/* executed once at system boot for each config */
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void mode_cardemu_configure(void)
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{
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TRACE_ENTRY();
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}
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/* called if config is activated */
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void mode_cardemu_init(void)
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{
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int i;
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TRACE_ENTRY();
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||||
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||||
PIO_Configure(pins_cardsim, PIO_LISTSIZE(pins_cardsim));
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||||
#ifdef DETECT_VCC_BY_ADC
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||||
card_vcc_adc_init();
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||||
#endif /* DETECT_VCC_BY_ADC */
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INIT_LLIST_HEAD(&cardem_inst[0].usb_out_queue);
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rbuf_reset(&cardem_inst[0].rb);
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PIO_Configure(pins_usim1, PIO_LISTSIZE(pins_usim1));
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ISO7816_Init(&cardem_inst[0].usart_info, CLK_SLAVE);
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NVIC_EnableIRQ(USART1_IRQn);
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PIO_ConfigureIt(&pin_usim1_rst, usim1_rst_irqhandler);
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PIO_EnableIt(&pin_usim1_rst);
|
||||
#ifndef DETECT_VCC_BY_ADC
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PIO_ConfigureIt(&pin_usim1_vcc, usim1_vcc_irqhandler);
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PIO_EnableIt(&pin_usim1_vcc);
|
||||
#endif /* DETECT_VCC_BY_ADC */
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cardem_inst[0].ch = card_emu_init(0, 2, 0);
|
||||
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||||
#ifdef CARDEMU_SECOND_UART
|
||||
INIT_LLIST_HEAD(&cardem_inst[1].usb_out_queue);
|
||||
rbuf_reset(&cardem_inst[1].rb);
|
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PIO_Configure(pins_usim2, PIO_LISTSIZE(pins_usim2));
|
||||
ISO7816_Init(&cardem_inst[1].usart_info, CLK_SLAVE);
|
||||
NVIC_EnableIRQ(USART0_IRQn);
|
||||
PIO_ConfigureIt(&pin_usim2_rst, usim2_rst_irqhandler);
|
||||
PIO_EnableIt(&pin_usim2_rst);
|
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#ifndef DETECT_VCC_BY_ADC
|
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PIO_ConfigureIt(&pin_usim2_vcc, usim2_vcc_irqhandler);
|
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PIO_EnableIt(&pin_usim2_vcc);
|
||||
#endif /* DETECT_VCC_BY_ADC */
|
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cardem_inst[1].ch = card_emu_init(1, 0, 1);
|
||||
#endif /* CARDEMU_SECOND_UART */
|
||||
}
|
||||
|
||||
/* called if config is deactivated */
|
||||
void mode_cardemu_exit(void)
|
||||
{
|
||||
TRACE_ENTRY();
|
||||
|
||||
/* FIXME: stop tc_fdt */
|
||||
/* FIXME: release all rctx, unlink them from any queue */
|
||||
|
||||
PIO_DisableIt(&pin_usim1_rst);
|
||||
PIO_DisableIt(&pin_usim1_vcc);
|
||||
|
||||
NVIC_DisableIRQ(USART1_IRQn);
|
||||
USART_SetTransmitterEnabled(USART1, 0);
|
||||
USART_SetReceiverEnabled(USART1, 0);
|
||||
|
||||
#ifdef CARDEMU_SECOND_UART
|
||||
PIO_DisableIt(&pin_usim2_rst);
|
||||
PIO_DisableIt(&pin_usim2_vcc);
|
||||
|
||||
NVIC_DisableIRQ(USART0_IRQn);
|
||||
USART_SetTransmitterEnabled(USART0, 0);
|
||||
USART_SetReceiverEnabled(USART0, 0);
|
||||
#endif
|
||||
}
|
||||
|
||||
/* handle a single USB command as received from the USB host */
|
||||
static void dispatch_usb_command(struct req_ctx *rctx, struct cardem_inst *ci)
|
||||
{
|
||||
struct cardemu_usb_msg_hdr *hdr;
|
||||
struct cardemu_usb_msg_set_atr *atr;
|
||||
struct cardemu_usb_msg_cardinsert *cardins;
|
||||
struct llist_head *queue;
|
||||
|
||||
hdr = (struct cardemu_usb_msg_hdr *) rctx->data;
|
||||
switch (hdr->msg_type) {
|
||||
case CEMU_USB_MSGT_DT_TX_DATA:
|
||||
queue = card_emu_get_uart_tx_queue(ci->ch);
|
||||
req_ctx_set_state(rctx, RCTX_S_UART_TX_PENDING);
|
||||
llist_add_tail(&rctx->list, queue);
|
||||
card_emu_have_new_uart_tx(ci->ch);
|
||||
break;
|
||||
case CEMU_USB_MSGT_DT_SET_ATR:
|
||||
atr = (struct cardemu_usb_msg_set_atr *) hdr;
|
||||
card_emu_set_atr(ci->ch, atr->atr, atr->atr_len);
|
||||
req_ctx_put(rctx);
|
||||
break;
|
||||
case CEMU_USB_MSGT_DT_CARDINSERT:
|
||||
cardins = (struct cardemu_usb_msg_cardinsert *) hdr;
|
||||
TRACE_INFO("%u: set card_insert to %s\r\n", ci->num,
|
||||
cardins->card_insert ? "INSERTED" : "REMOVED");
|
||||
if (cardins->card_insert)
|
||||
PIO_Set(&ci->pin_insert);
|
||||
else
|
||||
PIO_Clear(&ci->pin_insert);
|
||||
req_ctx_put(rctx);
|
||||
break;
|
||||
case CEMU_USB_MSGT_DT_GET_STATUS:
|
||||
card_emu_report_status(ci->ch);
|
||||
break;
|
||||
case CEMU_USB_MSGT_DT_GET_STATS:
|
||||
default:
|
||||
/* FIXME */
|
||||
req_ctx_put(rctx);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void dispatch_received_rctx(struct req_ctx *rctx, struct cardem_inst *ci)
|
||||
{
|
||||
struct req_ctx *segm;
|
||||
struct cardemu_usb_msg_hdr *mh;
|
||||
int i = 0;
|
||||
|
||||
/* check if we have multiple concatenated commands in
|
||||
* one message. USB endpoints are streams that don't
|
||||
* preserve the message boundaries */
|
||||
mh = (struct cardemu_usb_msg_hdr *) rctx->data;
|
||||
if (mh->msg_len == rctx->tot_len) {
|
||||
/* fast path: only one message in buffer */
|
||||
dispatch_usb_command(rctx, ci);
|
||||
return;
|
||||
}
|
||||
|
||||
/* slow path: iterate over list of messages, allocating one new
|
||||
* reqe_ctx per segment */
|
||||
for (mh = (struct cardemu_usb_msg_hdr *) rctx->data;
|
||||
(uint8_t *)mh < rctx->data + rctx->tot_len;
|
||||
mh = (struct cardemu_usb_msg_hdr * ) ((uint8_t *)mh + mh->msg_len)) {
|
||||
segm = req_ctx_find_get(0, RCTX_S_FREE, RCTX_S_MAIN_PROCESSING);
|
||||
if (!segm) {
|
||||
TRACE_ERROR("%u: ENOMEM during rctx segmentation\r\n",
|
||||
ci->num);
|
||||
break;
|
||||
}
|
||||
segm->idx = 0;
|
||||
segm->tot_len = mh->msg_len;
|
||||
memcpy(segm->data, mh, segm->tot_len);
|
||||
dispatch_usb_command(segm, ci);
|
||||
i++;
|
||||
}
|
||||
|
||||
/* release the master req_ctx, as all segments have been
|
||||
* processed now */
|
||||
req_ctx_put(rctx);
|
||||
}
|
||||
|
||||
/* iterate over the queue of incoming USB commands and dispatch/execute
|
||||
* them */
|
||||
static void process_any_usb_commands(struct llist_head *main_q,
|
||||
struct cardem_inst *ci)
|
||||
{
|
||||
struct llist_head *lh;
|
||||
struct req_ctx *rctx;
|
||||
int i;
|
||||
|
||||
/* limit the number of iterations to 10, to ensure we don't get
|
||||
* stuck here without returning to main loop processing */
|
||||
for (i = 0; i < 10; i++) {
|
||||
/* de-queue the list head in an irq-safe way */
|
||||
lh = llist_head_dequeue_irqsafe(main_q);
|
||||
if (!lh)
|
||||
break;
|
||||
rctx = llist_entry(lh, struct req_ctx, list);
|
||||
dispatch_received_rctx(rctx, ci);
|
||||
}
|
||||
}
|
||||
|
||||
/* main loop function, called repeatedly */
|
||||
void mode_cardemu_run(void)
|
||||
{
|
||||
struct llist_head *queue;
|
||||
unsigned int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(cardem_inst); i++) {
|
||||
struct cardem_inst *ci = &cardem_inst[i];
|
||||
|
||||
/* drain the ring buffer from UART into card_emu */
|
||||
while (1) {
|
||||
__disable_irq();
|
||||
if (rbuf_is_empty(&ci->rb)) {
|
||||
__enable_irq();
|
||||
break;
|
||||
}
|
||||
uint8_t byte = rbuf_read(&ci->rb);
|
||||
__enable_irq();
|
||||
card_emu_process_rx_byte(ci->ch, byte);
|
||||
//TRACE_ERROR("%uRx%02x\r\n", i, byte);
|
||||
}
|
||||
|
||||
queue = card_emu_get_usb_tx_queue(ci->ch);
|
||||
int usb_pending = llist_count(queue);
|
||||
if (usb_pending != ci->usb_pending_old) {
|
||||
TRACE_DEBUG("%u usb_pending=%d\r\n",
|
||||
i, usb_pending);
|
||||
ci->usb_pending_old = usb_pending;
|
||||
}
|
||||
usb_refill_to_host(queue, ci->ep_in);
|
||||
|
||||
/* ensure we can handle incoming USB messages from the
|
||||
* host */
|
||||
queue = &ci->usb_out_queue;
|
||||
usb_refill_from_host(queue, ci->ep_out);
|
||||
process_any_usb_commands(queue, ci);
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user