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Reading the Unique ID from flash is a rather tricky procedure: After the STUI command has been issued, we cannot read normal flash anymore. Rather, the unique ID is mapped at 0x00000000. This is unfortuantely also where the exception vector table is stored. EEFC_ReadUniqueID() is already linked to RAM, which is good. Hoewver, if an Interrupt happens between STUI and SPUI, then we try to access the vector table and code from flash, which is illegal. We run into a hardfault and stay there until the watchdog resets the processor. Change-Id: I3c4fad55b47e9013f6615a331983b3989ca805a7 Closes: OS#4428
51 lines
1.6 KiB
C
51 lines
1.6 KiB
C
#include "chip.h"
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#define EFC_FCMD_STUI 0x0E
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#define EFC_FCMD_SPUI 0x0F
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__attribute__ ((section(".ramfunc")))
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void EEFC_ReadUniqueID(unsigned int *pdwUniqueID)
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{
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unsigned int status;
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/* disable interrupts, as interrupt vectors are stored in flash,
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* and after STUI was issued, we can no longer access flassh until
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* SPUI complets */
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__disable_irq();
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/* Errata / Workaround: Set bit 16 of EEFC Flash Mode Register
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* to 1 */
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EFC->EEFC_FMR |= (1 << 16);
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/* Send the Start Read unique Identifier command (STUI) by
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* writing the Flash Command Register with the STUI command. */
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EFC->EEFC_FCR = (0x5A << 24) | EFC_FCMD_STUI;
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/* Wait for the FRDY bit to fall */
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do {
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status = EFC->EEFC_FSR;
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} while ((status & EEFC_FSR_FRDY) == EEFC_FSR_FRDY);
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/* The Unique Identifier is located in the first 128 bits of the
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* Flash memory mapping. So, at the address 0x400000-0x400003.
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* */
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pdwUniqueID[0] = *(uint32_t *) IFLASH_ADDR;
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pdwUniqueID[1] = *(uint32_t *) (IFLASH_ADDR + 4);
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pdwUniqueID[2] = *(uint32_t *) (IFLASH_ADDR + 8);
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pdwUniqueID[3] = *(uint32_t *) (IFLASH_ADDR + 12);
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/* To stop the Unique Identifier mode, the user needs to send
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* the Stop Read unique Identifier command (SPUI) by writing the
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* Flash Command Register with the SPUI command. */
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EFC->EEFC_FCR = (0x5A << 24) | EFC_FCMD_SPUI;
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/* When the Stop read Unique Unique Identifier command (SPUI)
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* has been performed, the FRDY bit in the Flash Programming
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* Status Register (EEFC_FSR) rises. */
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do {
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status = EFC->EEFC_FSR;
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} while ((status & EEFC_FSR_FRDY) != EEFC_FSR_FRDY);
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__enable_irq();
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}
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