608 lines
28 KiB
Markdown
608 lines
28 KiB
Markdown
# sigrok_iso7816_stream
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📢 Project news and updates: [Website](https://atroshin.ru) · [Telegram channel](https://t.me/youeyeseesee)
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Fork of [svenso/sigrok_iso7816](https://github.com/svenso/sigrok_iso7816) with
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**live GSMTAP UDP streaming**, making a cheap FX2 logic analyzer (Saleae clone)
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behave like a SIMtrace2 sniffer:
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```
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SIM card ⇄ reader (passive tap on the contacts)
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→ FX2 logic analyzer (fx2lafw, 8ch, 24MHz max)
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→ sigrok-cli + iso7816 decoder
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→ GSMTAP UDP :4729 → [SIMtrace Analyser](https://github.com/anttro/simtrace-analyser) / Wireshark
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```
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[SIMtrace Analyser](https://github.com/anttro/simtrace-analyser) is the
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recommended tool for visualising live traces and viewing saved captures —
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it can also import/export GSMTAP pcap files (including the PCAP written by
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this decoder's `pcap_file=<path>` option).
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## The tap in practice
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*Components used in the build*
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*The rig tapping a phone SIM session*
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*The rig tapping a card-reader session*
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*The SIM-tap adapter*
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*Tap wiring on the SIM contacts*
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*The short-cable tap — reduces loop area and rise-time artifacts*
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*Short-cable wiring detail*
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*Short cable with the breakout gear*
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*Short cable with external pull resistors — 10 kΩ to GND on VCC (pulls low when off), 47 kΩ to VCC on DATA (faster rise to high)*
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## What was added on top of upstream
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| Feature | Description |
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|---------|-------------|
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| Live GSMTAP stream | Every decoded event is sent as a GSMTAP-SIM UDP packet (default on, mimics simtrace2-sniff) |
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| Correct sub_types | ATR=0x01 and PPS=0x02 now tagged properly in PCAP output (upstream hardcoded everything to APDU=0x00) |
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| ATR/PPS in PCAP | ATR and combined PPS request+response are emitted as PCAP packets |
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| RST tracking (optional) | `rst_detect=true`: emits reset assert/deassert events (sub_type 0x10) |
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| VCC tracking (optional) | `vcc_detect=true`: emits power on/off events (sub_type 0x11) |
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| Direct PCAP file | `pcap_file=<path>` writes PCAP without shell redirection |
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| Start-bit deglitch | Deglitch in the start-bit detector (2 samples at 16 MHz, scaled from the sample rate since v1.9.7) eliminates sub-ETU LOW glitches from FX2LP pull-up artifacts, preventing byte misalignment on fast phone traces |
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| Mid-session ETU lock | The DATA-edge ETU estimator rejects guard-only (all-zero) and single-spacing bursts and invalidates a rate that fails parity, so a capture at a non-default F/D locks safely |
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| ATR / resync guards | A DATA-state `0x3B`/`0x3F` is an ATR candidate only before the first APDU; parity-dirty or bare (TS+T0) frames are ignored, and `resync_idle` really waits for the idle level |
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| Inverse convention | TS=0x3F ATRs follow ISO 7816-3 7.1: inverted data, msb first, start bit still LOW from an idle-HIGH line |
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| T=1 blocks | NAD/PCB/LEN/INF/LRC decode with M-bit chaining; the I-block INF is emitted as the APDU, R/S blocks are not; a truncated capture ends cleanly |
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| Parity flag | A packet containing a parity-error byte is emitted with the GSMTAP BAD_FCS flag (not just an annotation) |
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| Rate-aware thresholds | Start-bit deglitch, guard floors and the ETU glitch floor scale from the capture sample rate instead of assuming 16 MHz |
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## Decoder options
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| Option | Default | Description |
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|--------|---------|-------------|
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| `clock_option` | `native` | `native`, `detect`, `sample_as_clock` (see upstream FAQ) |
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| `protocol` | `auto` | `auto`, `T=0`, `T=1` |
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| `gsmtap_enable` | `true` | Live GSMTAP UDP streaming |
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| `gsmtap_host` | `127.0.0.1` | GSMTAP destination host |
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| `gsmtap_port` | `4729` | GSMTAP destination port |
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| `pcap_file` | *(empty)* | Write PCAP to this file in addition to binary output |
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| `rst_detect` | `false` | Track RST pin events (requires the `rst` channel to be assigned) |
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| `vcc_detect` | `false` | Track VCC pin events (requires the `vcc` channel to be assigned) |
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Channels: `clk`, `data` (required); `rst`, `vcc` (optional — assign only when
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the corresponding wire is physically connected).
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## GSMTAP events
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GSMTAP header: version 2, type SIM (0x04), UDP port 4729.
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| sub_type | Name | Payload |
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|----------|------|---------|
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| 0x00 | APDU | raw T=0/T=1 packet bytes |
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| 0x01 | ATR | raw ATR bytes |
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| 0x02 | PPS request | raw PPS request bytes |
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| 0x03 | PPS response | raw PPS response bytes |
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| 0x10 | RST event (custom) | `[direction, level, flags, clk_hz_be32]` — CLK frequency appended when known |
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| 0x11 | VCC event (custom) | `[direction, level, 0x00]` |
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Event payload byte semantics:
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- RST: `direction` 1 = reset asserted (high→low), 0 = deasserted (low→high);
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`level` = line level after the transition.
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- VCC: `direction` 1 = power applied (low→high), 0 = removed (high→low);
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`level` = line level after the transition.
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0x00-0x03 match libosmocore's gsmtap.h: standard values and payloads
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(PPS request and response are emitted as separate packets). 0x10/0x11
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are custom extensions not defined in libosmocore's gsmtap.h.
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RST events carry the measured CLK frequency when it is known: `flags`
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bit 0 is then set and the frequency follows as a big-endian uint32 in Hz
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(7-byte payload). When the rate is not yet measured the payload stays
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3 bytes, so consumers that read only the first two bytes are unaffected.
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Combined with the F/D negotiated in the ATR/PPS, the data rate is
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`clk_hz × D / F` bits/s.
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Header extensions: flags such as `GSMTAP_FLAG_BAD_FCS` are written into
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the header `res` byte, which official gsmtap.h marks reserved (RFU).
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This carriage is this decoder's own extension (upstream simtrace2-sniff
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never sets `res`); the flag semantics mirror simtrace2's per-message USB
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data flags and are not part of the libosmocore spec.
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## Usage
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Quick start (after installing — release download or source checkout; see
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Installation below):
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```bash
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./setup.sh # check sigrok-cli, register decoder symlink
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./start.sh # capture + GSMTAP stream to 127.0.0.1:4729
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```
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On Windows the same two steps are `setup.bat` then `start.bat` (see
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Installation below).
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`start.sh` defaults: pins D5=CLK, D0=I/O, D4=RST, D2=VCC, 16 MHz samplerate.
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Override via args:
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```bash
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./start.sh --clk=D1 --data=D6 # different wiring
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./start.sh --no-rst --no-vcc # CLK+I/O only
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./start.sh --host=10.0.28.7 # stream to a remote analyser
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./start.sh --pcap=session.pcap # also record decoded events to PCAP
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./start.sh --debug # full decoder + sigrok output (all
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# annotation rows + libsigrok -l 4);
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# by default only decoded APDUs and
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# decoder warnings/errors are shown
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```
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### Wiring
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The recommended tap is the short cable with external pull resistors (see
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the photos above): 10 kΩ to GND on VCC (pulls low when off) and 47 kΩ to
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VCC on DATA (faster rise to high). Its pin mapping is **fixed and known
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in advance** — see the "Pin mapping" table below — and is exactly what
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`start.sh` defaults to (`D5`=CLK, `D0`=I/O, `D4`=RST, `D2`=VCC). No
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wiring auto-detection is needed; the pins never move.
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> **GND first.** Plug GND first and verify it manually (continuity meter
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> or known-good contact) — a missing or loose ground masquerades as every
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> other fault at once: floating lines, phantom start bits, all-zero frames.
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### Robustness against noisy signals
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Live captures can glitch (a phantom start bit during power-up used to
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shift the whole ATR parse off-by-one). The decoder now:
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- validates the ATR's TS byte (`0x3B`/`0x3F` per TS 102 221 §5.2.2) and
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resyncs on the next real falling edge if it is bogus;
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- never lets a decode exception kill the capture — errors are logged,
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annotated, and the state machine resyncs (end-of-stream still exits
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cleanly);
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- decodes T=1 blocks (NAD/PCB/LEN/INF/LRC) and bounds the M-bit chain so garbage
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cannot loop forever.
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After an accepted PPS the decoder **follows the speed switch**: in
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native CLK mode `clock_skip` becomes F/D CLK cycles per bit (e.g.
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512/16 = 32), matching both sides' new UART rate. Live capture
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confirmed that keeping 372 after PPS aliases all subsequent traffic.
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A **warm reset** (the reader re-asserts RST every ~1.6 s) makes the card
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answer with a fresh ATR at the default 372 cycles/bit. The decoder
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**re-arms the ATR hunt on RST deassert**: state back to `FIND START`,
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native skip reset to 372, hunt count cleared — so the re-ATR parses as
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an ATR instead of being mis-read as TPDU traffic at the PPS-negotiated
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rate. A **half-ETU start-bit guard** (edge reader) additionally rejects the phantom
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`0x00` an idle glitch can insert before that ATR. Requires
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`rst_detect=true` (the `rst` channel assigned); without it a mid-session
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reset is still mis-read.
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### Troubleshooting live capture
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`start.sh` runs a single `--continuous` capture until you press **Ctrl+C**
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(`rc=130`). stdin is detached from sigrok-cli, so pressing keys/Enter in
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the terminal does **not** stop it (sigrok's "press any key to stop
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acquisition" prompt is disabled) — that keypress was previously
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mis-read as a "premature abort", but there was never a device fault.
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Most of the early "noise" seen in captures (parity errors, mis-framed
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garbage, a bouncing VCC line) was a badly-decoded state machine, not the
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hardware: re-seating the tap did nothing, while the decoder rewrite fixed
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it completely (warm-reset re-arm, half-ETU start-bit guard, 10 ms VCC
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debounce, T=0 exchange reassembly). A clean capture now decodes to zero
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garbage — see the `vs_reader.py` validation below.
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If a capture *does* end on its own (`rc=0`), the device genuinely stopped
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streaming; the FX2's USB bandwidth ceiling at sustained high sample rates
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is the usual suspect.
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```bash
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./start.sh --pcap=s.pcap --log=s.log # also record decoded events, log rc=
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./start.sh ... --samplerate=24M # more timing headroom if needed
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./start.sh ... --klog # also record kernel journal
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./start.sh ... --debug # full output: all annotation rows
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# + libsigrok internals at -l 4
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# (default: APDUs + warnings only)
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```
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`start.sh` captures a continuous stream at the configured rate (default 16
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MHz) until Ctrl+C (`rc=130`). A healthy capture never ends by itself; if the
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FX2 drops the USB transfer mid-session (a flaky device, `rc=0` "device
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stopped streaming"), the capture auto-restarts so the session is not lost —
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it re-launches on every `rc=0` until you press Ctrl+C or hit
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`--max-restarts=N` (default 20; `0` = unlimited), with a `--restart-delay=S`
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gap (default 2 s). When restarting with `--pcap=FILE`, each session's capture
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is written to `FILE.<N>.<ext>` so a restart never overwrites the previous one,
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and the repetitive `sr_session_stop: session was NULL` teardown line is
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filtered from stderr.
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- `--no-loop` disables auto-restart (single capture only).
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- `--loop` forces auto-restart on (this is the default).
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- `--max-restarts=N` caps restarts (default 20; `0` = unlimited).
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- `--restart-delay=S` seconds to wait between restarts (default 2).
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- `--log` captures the `rc=` verdict line for the session end.
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- The decoder logs `SIGNAL INTEGRITY WARNING` when >= 8 of the last
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64 frames fail parity.
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- Desynced TPDUs (mis-framed exchanges) are kept but flagged with
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`GSMTAP_FLAG_BAD_FCS` in the GSMTAP header `res` byte — visible in
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Wireshark as a BAD-FCS warning.
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- A T=0 header with a structurally invalid INS (ISO 7816-4 §5.1.2:
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`0x00` or `0x6x`/`0x9x`) is almost always a one-byte shift from
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a stray leading byte (e.g. a leftover SW2 read after a PACKETEND).
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Instead of silently dropping the whole 5-byte window (which let the next
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byte become a bogus CLA and swallow the remaining dialog into one CONCAT
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packet), the decoder drops only the leading byte and re-frames the rest,
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recovering the real command. Every consumed-but-unemitted byte is
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explicitly logged (`discarded byte 0x…: reason`); idle 0x00/0xFF discards
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are rate-limited, non-idle discards always produce a decoder annotation.
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- A card may finish a command with SW1 SW2 at the first procedure byte
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(ISO 7816-3 §10.3.3), including a case-2 command with P3 > 0: the SW is
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framed as the status word, not read as command data. A response
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**shorter than Le** is split at the status word and the packet is
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flagged `BAD_FCS` (the following exchanges stay intact), and `P3=0`
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(Le=256) response data is kept.
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Performance: in native CLK mode the decoder calibrates samples per CLK
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edge once from the ATR's first frame, then advances bit timing with
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single sample-skip waits instead of one wait per CLK edge. The PPS speed
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switch is followed via `clock_skip = F/D`; there is no post-PPS or
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parity-triggered recalibration.
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### Mode comparison on FX2 hardware (A/B result)
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- `native` decoded real traffic (ATR, PPS switch, 100+ valid APDUs in a
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12 s window); the one persistent artifact was the VCC sense line
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"bouncing" — the ~1 kHz ringing the 10 ms debounce now suppresses.
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- `detect` never produced a usable session on this rig: it missed the
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PPS speed switch entirely (no PPS handling fired), aliasing all
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post-PPS traffic; a second attempt caught a dead I/O line.
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`native` stays the default. Use `--clock=detect` only for offline
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experiments without PPS. A run full of all-zero frames means the tap
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lost contact with a line.
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Parity is **even** per TS 102 221 ("an even number of bits set to '1'
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including the parity bit"); frames failing the check are flagged as
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`CHKSUM ERROR` but still decoded.
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Equivalent raw sigrok-cli commands:
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```bash
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# Minimal: CLK+I/O only, live stream to localhost:4729
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sigrok-cli -d fx2lafw --config samplerate=12M --continuous \
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-P iso7816:clk=D0:data=D1:clock_option=detect -A iso7816
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# Full wiring: CLK + I/O + RST + VCC with line event tracking
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sigrok-cli -d fx2lafw --config samplerate=12M --continuous \
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-P iso7816:clk=D5:data=D0:rst=D4:vcc=D2:clock_option=native:rst_detect=true:vcc_detect=true \
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-A iso7816
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# Stream to a remote analyser / disable streaming / write PCAP file
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... -P iso7816:...:gsmtap_host=10.0.28.7 ...
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... -P iso7816:...:gsmtap_enable=false ...
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... -P iso7816:...:pcap_file=trace.pcap ...
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# Classic upstream mode: binary PCAP to stdout
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sigrok-cli -i capture.sr -P iso7816:clk=2:data=0 -B iso7816=pcap > out.pcap
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```
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### Pin mapping
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The FX2 clone channels are assigned via `-P iso7816:clk=N:data=N:rst=N:vcc=N`.
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The recommended short-cable tap (external pull resistors) uses fixed pins that
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are exactly `start.sh`'s defaults; `--clk`/`--data`/`--rst`/`--vcc` remap them
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if you wire differently:
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| FX2 channel | SIM contact | Signal |
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|-------------|-------------|--------|
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| D0 | C7 | I/O |
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| D2 | C1 | VCC (digital level only!) |
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| D4 | C2 | RST |
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| D5 | C3 | CLK |
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| GND | C5 | GND |
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FX2 input threshold is TTL-ish (~1.4V): 1.8V-class cards may read unreliably;
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3V/5V classes are fine.
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**Samplerate and 8-bit mode (important):** the FX2's nominal 24 MHz is only
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available when sampling in 8-bit mode, i.e. when **only channels D0–D7 are
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enabled**. Enabling the 9th channel (A0/analog on CWAV AX clones) or any
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analog input forces 16-bit collection, which libsigrok caps at 12 MHz.
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`start.sh`/`start.bat` therefore pass `-C D0,D1,D2,D3,D4,D5,D6,D7`
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explicitly and default to **16 MHz** (comfortably under the 24 MHz USB
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bandwidth ceiling; ~3.3 samples per 4.8 MHz clock cycle). `setup.sh`/
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`setup.bat` probe and report your hardware's actual maximum under the
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same restriction.
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## Installation
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Both ways install the same decoder — pick one:
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- **Download (recommended)** — a release archive. Nothing to clone and no git
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history: extract it, run `setup`, run `start`. Best if you only want to
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capture.
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- **Source checkout** — a `git clone`. The same runtime plus the development
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material: `tests/` and the trace/baseline tools (`tools/capture_baseline.sh`,
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`tools/compare_baseline.sh`, `tools/vs_reader.py`). The example traces
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(`examples/`) are gitignored and stay local in either case. The release
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archives intentionally do not contain `tests/`, the dev tools or
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`examples/`.
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### Download (recommended)
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Grab the latest archive from
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[Releases](https://github.com/anttro/sigrok_iso7816_stream/releases/latest):
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- `sigrok_iso7816_stream-<version>.tar.gz` — Linux
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- `sigrok_iso7816_stream-<version>.zip` — Windows
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Each release also publishes `SHA256SUMS`, which lists **both** archives; keep
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it next to the file you downloaded and verify:
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```bash
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sha256sum -c --ignore-missing SHA256SUMS # GNU coreutils (Linux)
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```
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On Windows run `certutil -hashfile sigrok_iso7816_stream-<version>.zip SHA256`
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and compare the output with the `.zip` line in `SHA256SUMS`.
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#### Linux (download)
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```bash
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tar xzf sigrok_iso7816_stream-<version>.tar.gz
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cd sigrok_iso7816_stream-<version>
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./setup.sh
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./start.sh
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```
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`setup.sh` verifies sigrok-cli and the FX2 firmware package
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(`sigrok-firmware-fx2lafw`) are installed, symlinks the project directory into
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`~/.local/share/libsigrokdecode/decoders/iso7816` (user-local decoders shadow
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system-wide ones), and probes the connected device for its maximum supported
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samplerate.
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#### Windows (download)
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Prerequisites:
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1. **sigrok-cli** Windows installer (0.7.2 x86_64) from
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[sigrok.org/wiki/Downloads](https://sigrok.org/wiki/Downloads) — the tested
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release. Nightly Windows installers are also published on that page; they
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may change the sigrok-cli syntax or the decoder API, so the 0.7.2
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release installer remains the supported version.
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If sigrok-cli fails to start with error `0xc0150002`, install the
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[Visual C++ 2010 Redistributable](https://www.microsoft.com/en-us/download/details.aspx?id=26999)
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(`msvcr100.dll` is required by the bundled Python runtime).
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2. fx2lafw firmware ships bundled with the installer — no separate download.
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Driver setup (FX2 dongles need WinUSB, the vendor driver won't work):
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- Run **Zadig**, which ships *inside* the sigrok-cli installation directory
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(also reachable from the Start menu). Select the FX2 device in its dropdown
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and install the **WinUSB** driver.
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- After firmware upload the device re-enumerates with a different VID/PID —
|
||
if it still isn't found, run Zadig a **second time** for the re-enumerated
|
||
entry.
|
||
- Windows binds drivers per USB port when no serial number is present:
|
||
moving the dongle to another port may require repeating Zadig.
|
||
|
||
Then extract the release `.zip` (right-click → Extract All in Explorer) and
|
||
run, inside the extracted folder:
|
||
|
||
```bat
|
||
setup.bat
|
||
start.bat
|
||
```
|
||
|
||
`setup.bat` verifies sigrok-cli and bundled firmware, registers this project's
|
||
decoder via a junction into `%LOCALAPPDATA%\libsigrokdecode\decoders\iso7816`
|
||
(confirmed by `sigrok-cli -L` listing `iso7816`), and probes the device's
|
||
accepted samplerates. The release zip ships the batch files with CRLF line
|
||
endings, so no conversion is needed. `start.bat --help` lists its options
|
||
(the core subset of `start.sh`: channels, samplerate, clock, host/port, pcap,
|
||
protocol, debug).
|
||
|
||
### Linux (source checkout)
|
||
|
||
```bash
|
||
git clone git@github.com:anttro/sigrok_iso7816_stream.git
|
||
cd sigrok_iso7816_stream
|
||
./setup.sh
|
||
```
|
||
|
||
A fresh clone needs the same `./setup.sh` checks and symlink as above: it
|
||
verifies sigrok-cli and the FX2 firmware package, symlinks the project
|
||
directory into `~/.local/share/libsigrokdecode/decoders/iso7816` and probes
|
||
the device's maximum samplerate.
|
||
|
||
### Windows (source checkout)
|
||
|
||
The Windows prerequisites (sigrok-cli + the Visual C++ 2010 Redistributable,
|
||
the bundled fx2lafw firmware, and the Zadig/WinUSB driver setup) are the same
|
||
as in [Windows (download)](#windows-download) above.
|
||
|
||
```bat
|
||
git clone git@github.com:anttro/sigrok_iso7816_stream.git
|
||
cd sigrok_iso7816_stream
|
||
setup.bat
|
||
```
|
||
|
||
`setup.bat` performs the same checks and junction registration as above.
|
||
`start.bat` supports the core option subset (channels, samplerate, clock,
|
||
host/port, pcap, protocol, debug; `start.sh` has the full set) — the space
|
||
form is the primary one, and `--clk=CH` also works:
|
||
|
||
```bat
|
||
start.bat --clk D1 --data D6
|
||
start.bat --help
|
||
```
|
||
|
||
Capture works the same as on Linux:
|
||
|
||
```bat
|
||
start.bat rem capture + GSMTAP stream
|
||
```
|
||
|
||
Note: batch files need CRLF line endings; the repo enforces this via
|
||
`.gitattributes`, so a fresh clone on Windows is already correct (the release
|
||
zip ships the same CRLF files).
|
||
|
||
## RST/VCC detection notes and limitations
|
||
|
||
- Events are detected **asynchronously before the first ATR** (power-on /
|
||
reset release are captured once the level is stable) and **at packet
|
||
boundaries** between T=0/T=1 packets afterwards.
|
||
- Edges occurring entirely *within* a packet transfer are observed as a net
|
||
level change at the next boundary; short pulses inside a packet can be missed.
|
||
- VCC is digital-only: the decoder sees powered/not-powered, never the
|
||
voltage class (1.8/3/5V).
|
||
- **RST and VCC use level-stability hysteresis at 10 ms** (samplerate-scaled):
|
||
a new level is reported only once it has been continuously stable for ≥ 10 ms
|
||
— either because it persists that long, or because it ends after being stable
|
||
that long. This makes power-up and power-down *symmetric*: a VCC sense line
|
||
that **rings on the rising edge** (noisy/floating tap) no longer loses its
|
||
"VCC on" event — it fires once the line settles HIGH, instead of being eaten
|
||
by edge debounce. RST uses the same scheme, so a brief RST glitch no longer
|
||
triggers a phantom warm-reset re-arm.
|
||
- **VCC events are generally unreliable — prefer not to track VCC.** A floating
|
||
or unconnected VCC sense pin reads HIGH at all times (logic-high with no load),
|
||
so the decoder sees "powered" constantly and emits spurious power events on
|
||
every bounce. Unless your tap derives VCC from a clean, loaded source, it is
|
||
better to **leave the `vcc` channel unassigned** (do not pass `--vcc`) and keep
|
||
`vcc_detect=false`; RST tracking is usually enough to see resets. Only enable
|
||
VCC tracking on a tap with a solid VCC sense (and a solid GND — see wiring notes).
|
||
- Unassigned optional channels are ignored even if `rst_detect`/`vcc_detect`
|
||
is enabled (guarded via `has_channel()`).
|
||
|
||
## Testing
|
||
|
||
Verified against the upstream example captures:
|
||
|
||
```bash
|
||
# ATR+PPS+54 APDUs from the test_8 reader capture (~19s decode)
|
||
# GSMTAP stream verified with tshark (ATR/APDU dissected natively),
|
||
# custom 0x10/0x11 events verified with a UDP listener, and end-to-end
|
||
# into the SIMtrace Analyser server (POST /api/capture/start → decode → stop).
|
||
```
|
||
|
||
A synthetic VCD generator covering RST/VCC edge cases lives in the project
|
||
notes (`projects/SIGROK_ISO7816.md` in the parent workspace).
|
||
|
||
### Validation against the reader SDK (`tools/vs_reader.py`)
|
||
|
||
On a controlled rig (PCSC reader driven by software) the reference APDU log
|
||
from the reader SDK can be diffed against the decoded PCAP:
|
||
|
||
```bash
|
||
sigrok-cli -i <trace>.sr \
|
||
-P iso7816:clk=D5:data=D0:rst=D4:vcc=D2:clock_option=native:rst_detect=true:vcc_detect=true:gsmtap_enable=false:pcap_file=out.pcap \
|
||
-A iso7816
|
||
python3 tools/vs_reader.py <reader-log>.log out.pcap
|
||
```
|
||
|
||
`vs_reader.py` aligns each reader-log exchange to the capture APDUs
|
||
(byte-exact LCS match) and classifies the leftovers as proactive/CAT
|
||
(unseen by the reader SDK), pre-capture/dropped, or garbage.
|
||
The mid-session capture whose warm resets previously produced 4 garbage
|
||
events — with the re-arm + start-bit guard it decodes to **0 garbage**
|
||
(`RESULT: OK - capture fully explained`).
|
||
|
||
test_7 (4 ATR resets fragmenting the session) now captures all 37/37 reader
|
||
exchanges (up from 10/37 before the deglitch fix). Samsung phone traces with
|
||
16 CLK/ETU (F=512/D=32) now de-concatenate to 924 individual T=0 exchanges
|
||
(previously merged into 52 oversized APDUs).
|
||
|
||
Replayable trace fixtures (kept locally, outside the repo) cover
|
||
controlled-rig reader sessions (with their reader-SDK ground-truth logs),
|
||
phone captures with gated CLK, and **cold-boot captures** that start
|
||
*before* power-up (VCC/RST low at t=0). The four Samsung fixtures are
|
||
cold boots taken with a new short cable (30 mm wires, external pull
|
||
resistors GND→VCC and VCC→DATA), named channels `DATA/VCC/RST/CLK` on bits
|
||
0/2/4/5; the `sim2` variants are cropped to the power-on window.
|
||
|
||
### Cold-boot captures (capture starts before power-up)
|
||
|
||
When the capture starts pre-power-up, the decoder must arm the ATR
|
||
hunt because RST is still low at sample 0: it primes the initial
|
||
VCC/RST levels on the first step (instead of defaulting them to deasserted),
|
||
and on an RST-low-at-start it enters `FIND START` with a cleared ETU, so the
|
||
pre-ATR power-up DATA transitions cannot lock a bogus bit rate. It then
|
||
decodes the full ATR (`3b9f96801fc78031e073fe2117574a3382033339001e`) with
|
||
0 garbage:
|
||
|
||
```bash
|
||
sigrok-cli -i <coldboot>.sr \
|
||
-P iso7816:clk=CLK:data=DATA:rst=RST:vcc=VCC:clock_option=native:protocol=T=0:rst_detect=true:vcc_detect=true:gsmtap_enable=false:pcap_file=out.pcap \
|
||
-A iso7816
|
||
```
|
||
|
||
An RST deassert that lands while an ATR parse is already in progress no longer
|
||
re-arms the hunt mid-read — it logs `RST deasserted (hunt/ATR already in
|
||
progress)` and leaves the in-flight ATR alone (test_8/test_7 CHKSUM 18→0).
|
||
|
||
### Capture scenarios: reader (constant CLK) and phone (Clock Stop Mode)
|
||
|
||
The decoder handles the two physically different SIM sniffing setups:
|
||
|
||
- **Reader / constant-CLK capture** — the reader drives a steady CLK for the
|
||
whole session. In mid-session mode the capture
|
||
decodes to **0 garbage** (`RESULT: OK`) against the reader-SDK
|
||
ground truth (`tools/vs_reader.py <reader-log>.log out.pcap`).
|
||
Warm-reset reader captures use the synthetic-T=0-ATR fallback.
|
||
|
||
- **Phone / stopped-CLK capture** — the phone gates or stops CLK between
|
||
transfers (Clock Stop Mode), so the ETU is not the 372-clock default and
|
||
cannot be inferred from CLK. Run with `protocol=T=0`; the decoder recovers the ETU from the DATA line via edge
|
||
counting, locks it, and decodes with the drift-immune edge-list bit reader.
|
||
T=0 case 3/4 commands (e.g. `80 12`/`80 14` STK envelope) are consolidated
|
||
into a single command→response APDU. A 2-sample start-bit deglitch eliminates
|
||
sub-ETU LOW glitches caused by FX2LP internal pull-up artifacts, preventing
|
||
byte misalignment on fast phone traces.
|
||
|
||
### Proven data rates and ETUs
|
||
|
||
All traces decoded at **16 MHz sample rate**, 0 garbage, RESULT: OK.
|
||
Since v1.5.0 every example trace also reports **0 CONCAT** (the invalid-INS
|
||
re-frame eliminated the last multi-exchange swallow family on
|
||
4gmodem/A55_sim2/S21p_sim2).
|
||
|
||
| Trace | CLK mode | ETU (samples) | CLK/ETU | Convention | Notes |
|
||
|-------|----------|---------------|---------|------------|-------|
|
||
| test_8 | constant | ~43 | 372 (standard) | Direct | PC/SC reader, ATR+PPS+APDUs |
|
||
| test_7 | constant | ~43 | 372 (standard) | Direct | PC/SC reader, warm resets |
|
||
| xiaomi | gated/stopped | ~53 | recovered from DATA | Direct | Phone, mid-session |
|
||
| samsung | gated/stopped | ~72 | 16 (F=512/D=32) | Direct | Phone, non-standard F/D, STK menu |
|
||
| alcor_reader | constant | ~53 | 16 (F=512/D=32) | Direct | PC/SC reader, CLK 4.0 MHz at ATR -> 4.8 MHz after PPS |
|
||
|
||
The decoder auto-detects the ETU from the trace and selects the appropriate
|
||
bit reader (CLK-sync for constant CLK, edge-list for gated/stopped CLK).
|
||
No manual configuration is needed beyond `clock_option=native` and
|
||
`protocol=T=0` for phone captures.
|
||
|
||
Recommended invocations:
|
||
|
||
```bash
|
||
# Reader capture (controlled rig, CLK always running)
|
||
sigrok-cli -i <trace>.sr \
|
||
-P iso7816:clk=CLK:data=DATA:rst=RST:vcc=VCC:clock_option=native:rst_detect=true:vcc_detect=true:gsmtap_enable=false:pcap_file=out.pcap \
|
||
-A iso7816
|
||
python3 tools/vs_reader.py <reader-log>.log out.pcap
|
||
|
||
# Phone capture (mid-session, gated/stopped CLK)
|
||
sigrok-cli -i <phone>.sr \
|
||
-P iso7816:clk=CLK:data=DATA:rst=RST:clock_option=native:rst_detect=true:vcc_detect=false:protocol=T=0:gsmtap_enable=false:pcap_file=out.pcap \
|
||
-A iso7816
|
||
```
|
||
|
||
## License
|
||
|
||
GPL-2.0+, same as upstream.
|