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Sane defines for clk values

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This commit is contained in:
Christina Quast
2014-12-05 13:03:59 +01:00
parent f1192c6cad
commit 530f20881c
1 changed files with 7 additions and 7 deletions
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14
sam3s_example/atmel_softpack_libraries/libboard_sam3s-ek/source/board_lowlevel.c
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@@ -43,22 +43,22 @@
* Local definitions
*----------------------------------------------------------------------------*/
/* Clock settings at 48MHz for 12 MHz crystal */
/* Clock settings at 48MHz for 18 MHz crystal */
#if (BOARD_MCK == 48000000)
#define BOARD_OSCOUNT (CKGR_MOR_MOSCXTST(0x8))
#define BOARD_PLLAR (CKGR_PLLAR_STUCKTO1 \
| CKGR_PLLAR_MULA(0x7) \
| CKGR_PLLAR_MULA(0xc) \
| CKGR_PLLAR_PLLACOUNT(0x1) \
| CKGR_PLLAR_DIVA(0x1))
#define BOARD_MCKR (PMC_MCKR_PRES_CLK_2 | PMC_MCKR_CSS_PLLA_CLK)
| CKGR_PLLAR_DIVA(0x5))
#define BOARD_MCKR (PMC_MCKR_PRES_CLK | PMC_MCKR_CSS_PLLA_CLK)
/* Clock settings at 64MHz for 12 MHz crystal */
/* Clock settings at 64MHz for 18 MHz crystal */
#elif (BOARD_MCK == 64000000)
#define BOARD_OSCOUNT (CKGR_MOR_MOSCXTST(0x8))
#define BOARD_PLLAR (CKGR_PLLAR_STUCKTO1 \
| CKGR_PLLAR_MULA(0x0f) \
| CKGR_PLLAR_MULA(0x06) \
| CKGR_PLLAR_PLLACOUNT(0x1) \
| CKGR_PLLAR_DIVA(0x3))
| CKGR_PLLAR_DIVA(0x2))
#define BOARD_MCKR (PMC_MCKR_PRES_CLK | PMC_MCKR_CSS_PLLA_CLK)
#else