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Makefile: Compile silently and show code files used
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@@ -158,13 +158,13 @@ ASM_OBJECTS_$(1) = $(addprefix $(OBJ)/$(1)_, $(ASM_OBJECTS))
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$(1): $$(ASM_OBJECTS_$(1)) $$(C_OBJECTS_$(1))
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@$(CC) $(LDFLAGS) $(LD_OPTIONAL) -T"$$@.ld" -Wl,-Map,$(OUTPUT)-$$@.map -o $(OUTPUT)-$$@.elf $$^ $(LIBS)
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$(NM) $(OUTPUT)-$$@.elf >$(OUTPUT)-$$@.elf.txt
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$(OBJCOPY) -O binary $(OUTPUT)-$$@.elf $(OUTPUT)-$$@.bin
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$(SIZE) $$^ $(OUTPUT)-$$@.elf
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@$(NM) $(OUTPUT)-$$@.elf >$(OUTPUT)-$$@.elf.txt
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@$(OBJCOPY) -O binary $(OUTPUT)-$$@.elf $(OUTPUT)-$$@.bin
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@$(SIZE) $$^ $(OUTPUT)-$$@.elf
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$$(C_OBJECTS_$(1)): $(OBJ)/$(1)_%.o: %.c Makefile $(OBJ) $(BIN)
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@echo [COMPILING $$@]
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$(CC) $(CFLAGS) -D$(1) -Wa,-ahlms=$(BIN)/$$*.lst -c -o $$@ $$<
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@echo [COMPILING $$<]
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@$(CC) $(CFLAGS) -D$(1) -Wa,-ahlms=$(BIN)/$$*.lst -c -o $$@ $$<
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$$(ASM_OBJECTS_$(1)): $(OBJ)/$(1)_%.o: %.S Makefile $(OBJ) $(BIN)
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@echo [ASSEMBLING $$@]
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