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Add freq_ctr app
The freq_ctr app is a small application that is implementing a simplistic direct-mode frequency counter using the internal 32.768kHz oscillator and two TC blocks. One of them is used to generate a 1Hz signal, which is then subsequently used by the other TC to trigger a counter read after exactly 1s. This is in itself not something useful on a simtrace2 device. However, it is a separate 'app' and I prefer to have the code here in master over some obscure branch that's easy to forget about. Change-Id: I2249bfb8dd6a88d85d406f3b33537377133d0939
This commit is contained in:
55
firmware/apps/freq_ctr/freq_ctr.c
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55
firmware/apps/freq_ctr/freq_ctr.c
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#include <stdint.h>
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#include "utils.h"
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#include "tc_etu.h"
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#include "chip.h"
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/* pins for Channel 0 of TC-block 0 */
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#define PIN_TIOA0 {PIO_PA0, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
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/* pins for Channel 1 of TC-block 0 */
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#define PIN_TIOA1 {PIO_PA15, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
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#define PIN_TCLK1 {PIO_PA28, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
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static const Pin pins_tc[] = { PIN_TIOA0, PIN_TIOA1, PIN_TCLK1 };
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static TcChannel *tc1 = &TC0->TC_CHANNEL[1];
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void TC1_IrqHandler(void)
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{
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uint32_t sr = tc1->TC_SR;
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printf("TC1=%lu; SR=0x%08lx\r\n", tc1->TC_RA, sr);
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}
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void freq_ctr_init(void)
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{
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TcChannel *tc0 = &TC0->TC_CHANNEL[0];
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PIO_Configure(pins_tc, ARRAY_SIZE(pins_tc));
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PMC_EnablePeripheral(ID_TC0);
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PMC_EnablePeripheral(ID_TC1);
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/* route TCLK1 to XC1 */
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TC0->TC_BMR &= ~TC_BMR_TC1XC1S_Msk;
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TC0->TC_BMR |= TC_BMR_TC1XC1S_TCLK1;
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/* TC0 in wveform mode: Run from SCLK. Raise TIOA on RA; lower TIOA on RC + trigger */
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tc0->TC_CMR = TC_CMR_TCCLKS_TIMER_CLOCK5 | TC_CMR_BURST_NONE |
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TC_CMR_EEVTEDG_NONE | TC_CMR_WAVSEL_UP_RC | TC_CMR_WAVE |
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TC_CMR_ACPA_SET | TC_CMR_ACPC_CLEAR;
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tc0->TC_RA = 16384; /* set high at 16384 */
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tc0->TC_RC = 32786; /* set low at 32786 */
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/* TC1 in capture mode: Run from XC1. Trigger on TIOA rising. Load RA on rising */
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tc1->TC_CMR = TC_CMR_TCCLKS_XC1 | TC_CMR_BURST_NONE |
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TC_CMR_ETRGEDG_RISING | TC_CMR_ABETRG | TC_CMR_LDRA_RISING;
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/* Interrupt us if the external trigger happens */
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tc1->TC_IER = TC_IER_ETRGS;
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NVIC_EnableIRQ(TC1_IRQn);
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TC0->TC_BCR = TC_BCR_SYNC;
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tc0->TC_CCR = TC_CCR_CLKEN|TC_CCR_SWTRG;
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tc1->TC_CCR = TC_CCR_CLKEN|TC_CCR_SWTRG;
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}
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