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iso7816: Hold RST line low for longer time period

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Based on the sniff with a logic analyzer the time when the RST line
is holded low by simtrace is too short.
A better timeout value should be searched for later anyways.
This commit is contained in:
Christina Quast
2015-04-09 13:31:58 +02:00
parent 2831b8c1a0
commit c870b52233
1 changed files with 4 additions and 4 deletions
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8
firmware/src_board/iso7816_4.c
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@@ -489,8 +489,8 @@ void ISO7816_cold_reset( void )
{
volatile uint32_t i;
/* tb: wait 400 cycles*/
for( i=0; i<(120*(BOARD_MCK/1000000)); i++ ) {
/* tb: wait ??? cycles*/
for( i=0; i<(400*(BOARD_MCK/1000000)); i++ ) {
}
BOARD_ISO7816_BASE_USART->US_RHR;
@@ -509,8 +509,8 @@ void ISO7816_warm_reset( void )
// Clears Reset
ISO7816_IccPowerOff();
/* tb: wait 400 cycles */
for( i=0; i<(120*(BOARD_MCK/1000000)); i++ ) {
/* tb: wait ??? cycles */
for( i=0; i<(400*(BOARD_MCK/1000000)); i++ ) {
}
BOARD_ISO7816_BASE_USART->US_RHR;