The PLL setting doesn't depend on the 'qmod' board type but on the
combination of the BOARD_MAINOSC and BOARD_MCK #defines. So let's
remove the '#ifdef qmod' from the equation.
The only 'qmod' specific part is whether or not to use the internal xtal
oscillator or not.
Table 42-31 ofd DOC6500 states that the minimum output frequency of the
PLL is 60 MHz. The existing qmod code violated this by configuring the
PLL multiplier output to 12*4 = 48 MHz. Let's use 12*8 = 96 and then
divide that by two to get to the desired 48 MHz.
This might help to resolve the non-working USB on the qmod so far.
You can compile the firmware for this new target using 'make
BOARD=qmod'.
The QMOD differs from simtrace+owhw in terms of low-level
initialization, as it has an external 12MHz clock at XIN, thus bypasses
the main oscillator and needs different PLL configuration.
* ensure the PB8/PB9 pins are actually not in GPIO mode, which they
apparently are on boot-up
* ensure that neither pull-up nor pull-down are enabled on PB8/PB9
* ensure we first start the oscillator, before selecting it
The sum of the above changes seems to make oscillator start-up much more
reliable than before. The time needed for initialization is now pretty
stable, and the occasional 15-20second clock stabiliziation has not been
observed with this change.
