6 Commits

Author SHA1 Message Date
Harald Welte
050b9dde68 HACK: Solve weird problem with lost OUT transfer on ping-pong endpoint
This adds an unconditional endpoint reset procedure to every SET_FEATURE(UnHalt).

It doesn't really make sense that this is required, *particularly* as
we *MUST NOT* set bEndpoint->bank to 0 here.

Without this patch, I'm observing the following problem:

Every first OUT transfer after a SET_INTERFACE + UNHALT on a bulk endpoint
is lost. "lost" means that it completes successfully on the host, can
be seen completing successfully with an ACK on a USB bus analyzer,
but still doesn't show up in the firmware.  No Endpoint Interrupt
is generated.

This can be reproduced by calling libusb_set_interface_alt_setting()
from the host and then submitting a single OUT transfer.

Change-Id: I18ed530e617baddf76e8f9829512443ce2a76e0d
2022-03-03 19:06:12 +01:00
Harald Welte
f1a0ed905b WIP: ignore STALL
Change-Id: I53741f265f71797c0594a818f5a1d37534fa3774
2022-03-03 19:06:12 +01:00
Harald Welte
874a1a2d64 HACK: dump enabled interrupts and priorities during startup
Change-Id: I6a19aaa8674fa510e4e346cd14a3545f7bfcc838
2022-03-03 19:06:12 +01:00
Harald Welte
b07131f2a5 HACK: cardem: Don't reset on watchdog, but panic.
This should help debug watchdog triggers.  Also reduce the timer to 1s
to hopefully increase the chance of triggering it.

Change-Id: Ie3f47e5612cdf501abff8cb6954600b785b3a3fa
2022-03-03 19:06:12 +01:00
Harald Welte
7783cd7a28 fw/qmod: enable modem RESET by default at boot
When the uC firmware starts, assert the (high-active) _RESET GPIOs,
which will cause the transistors to drive the mPCIe slot !PERST
low.

There is of course a short instance of time between the uC reset
until it executes wwan_perst_init(). To avoid this, a hardware
pull-up would have to be re-worked onto the _RESET[1..4] signals
on the PCBA

Change-Id: I8742fefa4bf02e728e34d5d8cbc0fda771e78ffb
2022-03-03 19:06:12 +01:00
Harald Welte
09c279874e simtrace: Enable VCC detection via ADC (voltage dependent)
SIMtrace should reject any card activation at 1.8V as it is a 3[.3]V device
without level shifters.  For this, we must include the ADC in
determining the VCC voltage.

Change-Id: Ic76f06037590ff1c0dae818d5eb2c2019dd75f2d
FIXME: reporting uses raw ADC voltage, not the voltage before divider
2022-03-03 19:06:12 +01:00
6 changed files with 53 additions and 4 deletions

View File

@@ -137,6 +137,12 @@ static void check_exec_dbg_cmd(void)
board_exec_dbg_cmd(ch);
}
#include <osmocom/core/panic.h>
void WDT_IrqHandler(void)
{
osmo_panic("WDT");
}
/*------------------------------------------------------------------------------
* Main
*------------------------------------------------------------------------------*/
@@ -152,8 +158,9 @@ extern int main(void)
led_blink(LED_GREEN, BLINK_ALWAYS_ON);
/* Enable watchdog for 2000ms, with no window */
WDT_Enable(WDT, WDT_MR_WDRSTEN | WDT_MR_WDDBGHLT | WDT_MR_WDIDLEHLT |
(WDT_GetPeriod(2000) << 16) | WDT_GetPeriod(2000));
WDT_Enable(WDT, WDT_MR_WDFIEN | WDT_MR_WDDBGHLT | WDT_MR_WDIDLEHLT |
(WDT_GetPeriod(1000) << 16) | WDT_GetPeriod(1000));
NVIC_EnableIRQ(WDT_IRQn);
PIO_InitializeInterrupts(10);

View File

@@ -1672,6 +1672,10 @@ uint8_t USBD_HAL_Halt(uint8_t bEndpoint, uint8_t ctl)
UDP->UDP_RST_EP |= 1 << bEndpoint;
UDP->UDP_RST_EP &= ~(1 << bEndpoint);
}
/* This fixes a weird bug with regard to ping-pong OUT endpoints */
UDP->UDP_RST_EP |= 1 << bEndpoint;
UDP->UDP_RST_EP &= ~(1 << bEndpoint);
}
/* Return Halt status */

View File

@@ -89,8 +89,8 @@
#define PINS_WWAN_IN { PIN_WWAN1, PIN_WWAN2 }
/* outputs controlling RESET input of modems */
#define PIN_PERST1 {PIO_PA25, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_PULLUP}
#define PIN_PERST2 {PIO_PA26, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_PULLUP}
#define PIN_PERST1 {PIO_PA25, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_PULLUP}
#define PIN_PERST2 {PIO_PA26, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_PULLUP}
#define PINS_PERST { PIN_PERST1, PIN_PERST2 }
#define PIN_VERSION_DET {PIO_PA19, PIOA, ID_PIOA, PIO_PERIPH_D, PIO_DEFAULT}

View File

@@ -155,3 +155,7 @@
#endif
/* SIMtrace board supports man-in-the-middle mode */
//#define HAVE_MITM
#define DETECT_VCC_BY_ADC
#define VCC_UV_THRESH_1V8 (1500000/2) /* 10k/10k resistive divider halves voltage */
#define VCC_UV_THRESH_3V (2500000/2) /* 10k/10k resistive divider halves voltage */

View File

@@ -567,6 +567,35 @@ void mode_cardemu_configure(void)
TRACE_ENTRY();
}
struct relevant_irq {
uint32_t irq;
uint32_t prio;
const char *name;
};
static const struct relevant_irq relevant_irqs[] = {
{ UDP_IRQn, 14, "USB" },
{ CONSOLE_IRQ, 15, "CONSOLE" },
{ FIRST_USART_IRQ, 0, "7816_0" },
#ifdef CARDEMU_SECOND_UART
{ USART0_IRQn, 0, "7816_1" },
#endif
#ifdef DETECT_VCC_BY_ADC
{ ADC_IRQn, 13, "ADC" },
#endif
{ PIOA_IRQn, 10, "PIOA" },
{ PIOB_IRQn, 10, "PIOB" },
{ PIOC_IRQn, 10, "PIOC" },
};
void dump_irq_prios(void)
{
printf("Interrupt Enable Mask (ISER): %08x%08x\n\r", NVIC->ISER[1], NVIC->ISER[0]);
for (unsigned int i = 0; i < ARRAY_SIZE(relevant_irqs); i++) {
const struct relevant_irq *ri = &relevant_irqs[i];
printf("IRQ prio %02u (%s): current=%u, expected=%u\r\n", ri->irq, ri->name,
NVIC_GetPriority(ri->irq), ri->prio);
}
}
/* called if config is activated */
void mode_cardemu_init(void)
{
@@ -636,6 +665,9 @@ void mode_cardemu_init(void)
sim_switch_use_physical(1, 1);
/* TODO check RST and VCC */
#endif /* CARDEMU_SECOND_UART */
dump_irq_prios();
}
/* called if config is deactivated */

View File

@@ -279,6 +279,7 @@ static void usb_in_xfer_cb(struct libusb_transfer *xfer)
process_usb_msg(ci, xfer->buffer, xfer->actual_length);
break;
case LIBUSB_TRANSFER_ERROR:
case LIBUSB_TRANSFER_STALL:
LOGCI(ci, LOGL_FATAL, "USB IN transfer error, trying resubmit\n");
break;
case LIBUSB_TRANSFER_NO_DEVICE:
@@ -333,6 +334,7 @@ static void usb_irq_xfer_cb(struct libusb_transfer *xfer)
process_usb_msg_irq(ci, xfer->buffer, xfer->actual_length);
break;
case LIBUSB_TRANSFER_ERROR:
case LIBUSB_TRANSFER_STALL:
LOGCI(ci, LOGL_FATAL, "USB INT transfer error, trying resubmit\n");
break;
case LIBUSB_TRANSFER_NO_DEVICE: