mirror of
https://gitea.osmocom.org/sim-card/simtrace2.git
synced 2026-03-16 21:28:33 +03:00
Supposed to be used with https://github.com/ARM-software/LLVM-embedded-toolchain-for-Arm + distro provided binutils-arm-none-eabi package, might provide better and more reliable binary sizes, especially for the bootloader. Just run USE_CLANG=1 make Change-Id: I1a19f40d44797efad5c46121e73115ed738a095b
507 lines
9.7 KiB
C
507 lines
9.7 KiB
C
/* ----------------------------------------------------------------------------
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* ATMEL Microcontroller Software Support
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* ----------------------------------------------------------------------------
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* Copyright (c) 2009, Atmel Corporation
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* Copyright (c) 2018, sysmocom -s.f.m.c. GmbH, Author: Kevin Redon <kredon@sysmocom.de>
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the disclaimer below.
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*
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* Atmel's name may not be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* ----------------------------------------------------------------------------
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*/
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/**
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* \file
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* This file contains the default exception handlers.
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*
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* \note
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* The exception handler has weak aliases.
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* As they are weak aliases, any function with the same name will override
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* this definition.
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*/
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/*----------------------------------------------------------------------------
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* Headers
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*----------------------------------------------------------------------------*/
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#include "chip.h"
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#define printf printf_sync
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/*----------------------------------------------------------------------------
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* Exported functions
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*----------------------------------------------------------------------------*/
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/**
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* \brief Default interrupt handler for not used irq.
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*/
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void IrqHandlerNotUsed( void )
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{
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printf("NotUsed\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default NMI interrupt handler.
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*/
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WEAK void NMI_Handler( void )
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{
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printf("NMI\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default HardFault interrupt handler.
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*/
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struct hardfault_args {
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unsigned long r0;
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unsigned long r1;
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unsigned long r2;
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unsigned long r3;
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unsigned long r12;
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unsigned long lr;
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unsigned long pc;
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unsigned long psr;
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};
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void hard_fault_handler_c(struct hardfault_args *args)
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{
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printf("\r\nHardFault\r\n");
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printf("R0=%08x, R1=%08x, R2=%08x, R3=%08x, R12=%08x\r\n",
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args->r0, args->r1, args->r2, args->r3, args->r12);
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printf("LR[R14]=%08x, PC[R15]=%08x, PSR=%08x\r\n",
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args->lr, args->pc, args->psr);
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printf("BFAR=%08x, CFSR=%08x, HFSR=%08x\r\n",
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SCB->BFAR, SCB->CFSR, SCB->HFSR);
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printf("DFSR=%08x, AFSR=%08x, SHCSR=%08x\r\n",
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SCB->DFSR, SCB->CFSR, SCB->SHCSR);
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if (SCB->HFSR & 0x40000000)
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printf("FORCED ");
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if (SCB->HFSR & 0x00000002)
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printf("VECTTBL ");
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uint32_t ufsr = SCB->CFSR >> 16;
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if (ufsr & 0x0200)
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printf("DIVBYZERO ");
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if (ufsr & 0x0100)
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printf("UNALIGNED ");
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if (ufsr & 0x0008)
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printf("NOCP ");
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if (ufsr & 0x0004)
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printf("INVPC ");
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if (ufsr & 0x0002)
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printf("INVSTATE ");
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if (ufsr & 0x0001)
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printf("UNDEFINSTR ");
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uint32_t bfsr = (SCB->CFSR >> 8) & 0xff;
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if (bfsr & 0x80)
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printf("BFARVALID ");
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if (bfsr & 0x10)
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printf("STKERR ");
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if (bfsr & 0x08)
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printf("UNSTKERR ");
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if (bfsr & 0x04)
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printf("IMPRECISERR ");
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if (bfsr & 0x02)
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printf("PRECISERR ");
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if (bfsr & 0x01)
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printf("IBUSERR ");
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uint32_t mmfsr = (SCB->CFSR & 0xff);
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if (mmfsr & 0x80)
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printf("MMARVALID ");
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if (mmfsr & 0x10)
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printf("MSTKERR ");
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if (mmfsr & 0x08)
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printf("MUNSTKERR ");
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if (mmfsr & 0x02)
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printf("DACCVIOL ");
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if (mmfsr & 0x01)
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printf("IACCVIOL ");
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while ( 1 ) ;
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}
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__attribute__((naked))
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WEAK void HardFault_Handler( void )
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{
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__asm volatile(
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".syntax unified \n"
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" tst lr, #4 \n"
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" ite eq \n"
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" mrseq r0, msp \n"
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" mrsne r0, psp \n"
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//" ldr r1, [r0, #24] \n"
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" b hard_fault_handler_c\n");
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}
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/**
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* \brief Default MemManage interrupt handler.
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*/
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WEAK void MemManage_Handler( void )
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{
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printf("MemManage\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default BusFault interrupt handler.
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*/
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WEAK void BusFault_Handler( void )
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{
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printf("BusFault\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default UsageFault interrupt handler.
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*/
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WEAK void UsageFault_Handler( void )
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{
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printf("UsageFault\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default SVC interrupt handler.
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*/
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WEAK void SVC_Handler( void )
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{
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printf("SVC\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default DebugMon interrupt handler.
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*/
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WEAK void DebugMon_Handler( void )
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{
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printf("DebugMon\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default PendSV interrupt handler.
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*/
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WEAK void PendSV_Handler( void )
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{
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printf("PendSV\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default SysTick interrupt handler.
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*/
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WEAK void SysTick_Handler( void )
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{
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printf("SysTick\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for Supply Controller.
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*/
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WEAK void SUPC_IrqHandler( void )
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{
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printf("SUPC\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for Reset Controller.
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*/
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WEAK void RSTC_IrqHandler( void )
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{
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printf("RSTC\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for Real Time Clock.
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*/
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WEAK void RTC_IrqHandler( void )
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{
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printf("RTC\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for Real Time Timer.
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*/
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WEAK void RTT_IrqHandler( void )
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{
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printf("RTT\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for Watchdog Timer.
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*/
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WEAK void WDT_IrqHandler( void )
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{
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printf("WDT\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for PMC.
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*/
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WEAK void PMC_IrqHandler( void )
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{
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printf("PMC\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for EEFC.
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*/
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WEAK void EEFC_IrqHandler( void )
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{
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printf("EEFC\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for UART0.
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*/
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WEAK void UART0_IrqHandler( void )
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{
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printf("UART0\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for UART1.
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*/
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WEAK void UART1_IrqHandler( void )
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{
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printf("UART1\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for SMC.
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*/
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WEAK void SMC_IrqHandler( void )
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{
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printf("SMC\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for PIOA Controller.
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*/
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WEAK void PIOA_IrqHandler( void )
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{
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printf("PIOA\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for PIOB Controller.
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*/
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WEAK void PIOB_IrqHandler( void )
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{
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printf("PIOB\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for PIOC Controller.
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*/
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WEAK void PIOC_IrqHandler( void )
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{
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printf("PIOC\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for USART0.
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*/
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WEAK void USART0_IrqHandler( void )
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{
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printf("USART0\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for USART1.
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*/
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WEAK void USART1_IrqHandler( void )
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{
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printf("USART1\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for MCI.
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*/
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WEAK void MCI_IrqHandler( void )
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{
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printf("MCI\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for TWI0.
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*/
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WEAK void TWI0_IrqHandler( void )
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{
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printf("TWI0\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for TWI1.
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*/
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WEAK void TWI1_IrqHandler( void )
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{
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printf("TWI1\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for SPI.
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*/
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WEAK void SPI_IrqHandler( void )
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{
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printf("SPI\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for SSC.
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*/
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WEAK void SSC_IrqHandler( void )
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{
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printf("SSC\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for TC0.
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*/
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WEAK void TC0_IrqHandler( void )
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{
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printf("TC0\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for TC1.
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*/
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WEAK void TC1_IrqHandler( void )
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{
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printf("TC1\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default interrupt handler for TC2.
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*/
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WEAK void TC2_IrqHandler( void )
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{
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printf("TC2\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default SUPC interrupt handler for TC3.
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*/
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WEAK void TC3_IrqHandler( void )
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{
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printf("TC3\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default SUPC interrupt handler for TC4.
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*/
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WEAK void TC4_IrqHandler( void )
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{
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printf("TC4\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default SUPC interrupt handler for TC5.
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*/
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WEAK void TC5_IrqHandler( void )
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{
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printf("TC5\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default SUPC interrupt handler for ADC.
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*/
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WEAK void ADC_IrqHandler( void )
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{
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printf("ADC\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default SUPC interrupt handler for DAC.
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*/
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WEAK void DAC_IrqHandler( void )
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{
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printf("DAC\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default SUPC interrupt handler for PWM.
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*/
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WEAK void PWM_IrqHandler( void )
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{
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printf("PWM\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default SUPC interrupt handler for CRCCU.
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*/
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WEAK void CRCCU_IrqHandler( void )
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{
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printf("CRCCU\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default SUPC interrupt handler for ACC.
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*/
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WEAK void ACC_IrqHandler( void )
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{
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printf("ACC\r\n");
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while ( 1 ) ;
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}
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/**
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* \brief Default SUPC interrupt handler for USBD.
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*/
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WEAK void USBD_IrqHandler( void )
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{
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printf("USBD\r\n");
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while ( 1 ) ;
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}
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