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https://github.com/gillham/logic_analyzer.git
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Add a sketch with Sigrok support. Basically returning the capture buffer in the opposite order.
This commit is contained in:
25
README.md
25
README.md
@@ -17,6 +17,31 @@ Pins 22-29 (Port A) are used by default.
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Client Software
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===============
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Sigrok support via the 'ols' device configuration has been added. This
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mostly involved returning the capture buffer in the reverse order.
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Use the `logic_analyzer_sigrok` sketch. Since the OLS alternative client
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mentioned below has some issues with newer Java versions, Sigrok is currently
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the only practical way to use this logic analyzer. If you use an older machine
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with an older operating system and older Java you can probably use the OLS client.
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Sigrok support seems to work fairly well so I would currently recommend it for
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anyone interested in trying this sketch.
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Run PulseView like this on Linux: (I'll add Windows options after more testing)
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```
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PulseView --driver=ols:conn=/dev/ttyUSB0 --dont-scan
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```
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It may be necessary to exit and relaunch PulseView to get it to recognize the device.
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An easy way to test the device is using the `sigrok-cli` utility. The command below
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samples channel 2 at 1MHz. If you get a device not found error, but /dev/ttyUSB0 exists,
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run this command a couple times and usually it will start working. Due to the way opening
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the serial port resets the Arduino there are some issues/bugs to work out yet.
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```
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sigrok-cli --driver=ols:conn=/dev/ttyUSB0 --config samplerate=1Mhz --config pattern=External --samples 1024 --channels 2
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```
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The OLS alternative client hasn't had an official release recently so you will
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need to compile it yourself.
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@@ -2,7 +2,7 @@
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*
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* SUMP Protocol Implementation for Arduino boards.
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*
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* Copyright (c) 2011,2012,2013,2014,2015,2016,2017,2018,2019,2020,2021 Andrew Gillham
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* Copyright (c) 2011,2012,2013,2014,2015,2016,2017,2018,2019,2020,2021,2022,2023 Andrew Gillham
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@@ -62,7 +62,7 @@
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* until after the trigger fires.
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* Please try it out and report back.
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*
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* Release: v0.15 December 21, 2021.
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* Release: v0.16 October 3, 2023.
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*
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*/
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@@ -949,7 +949,7 @@ void get_metadata() {
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Serial.write('0');
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Serial.write('.');
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Serial.write('1');
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Serial.write('5');
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Serial.write('6');
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Serial.write((uint8_t)0x00);
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/* sample memory */
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@@ -2,7 +2,7 @@
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*
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* SUMP Protocol Implementation for Arduino boards.
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*
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* Copyright (c) 2011,2012,2013,2014,2015,2016,2017,2018,2019,2020,2021 Andrew Gillham
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* Copyright (c) 2011,2012,2013,2014,2015,2016,2017,2018,2019,2020,2021,2022,2023 Andrew Gillham
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@@ -62,7 +62,7 @@
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* until after the trigger fires.
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* Please try it out and report back.
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*
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* Release: v0.15 December 21, 2021.
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* Release: v0.16 October 3, 2023.
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*
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*/
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@@ -918,7 +918,7 @@ void get_metadata() {
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Serial.write('0');
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Serial.write('.');
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Serial.write('1');
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Serial.write('5');
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Serial.write('6');
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Serial.write((uint8_t)0x00);
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/* sample memory */
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22
logic_analyzer_sigrok/LICENSE
Normal file
22
logic_analyzer_sigrok/LICENSE
Normal file
@@ -0,0 +1,22 @@
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Copyright (c) 2011,2012,2013,2014,2015,2016,2017,2018,2019,2020,2021 Andrew Gillham
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY ANDREW GILLHAM ``AS IS'' AND ANY EXPRESS OR
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IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL ANDREW GILLHAM BE LIABLE FOR ANY DIRECT, INDIRECT,
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INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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14456
logic_analyzer_sigrok/logic_analyzer_inline_2mhz.ino
Normal file
14456
logic_analyzer_sigrok/logic_analyzer_inline_2mhz.ino
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File diff suppressed because it is too large
Load Diff
14456
logic_analyzer_sigrok/logic_analyzer_inline_4mhz.ino
Normal file
14456
logic_analyzer_sigrok/logic_analyzer_inline_4mhz.ino
Normal file
File diff suppressed because it is too large
Load Diff
1109
logic_analyzer_sigrok/logic_analyzer_sigrok.ino
Normal file
1109
logic_analyzer_sigrok/logic_analyzer_sigrok.ino
Normal file
File diff suppressed because it is too large
Load Diff
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