public/logic_analyzer_sump
1
0
Fork 0
mirror of https://github.com/gillham/logic_analyzer.git synced 2026-05-01 15:10:43 +03:00
Code Issues Packages Projects Releases Wiki Activity
45 Commits 19 Branches 1 Tag
2a549be57adc34eb2b370b97041119de6e153d39
Commit Graph

1 Commits

Author SHA1 Message Date
Andrew Gillham
d7c1bf52a8 Add 2MHz and 4MHz sample rate support. 
Use unrolled loops to sample at 2MHz & 4MHz rates.  Based on some
testing by Bob Davis (http://bobdavis321.blogspot.com)
The maximum with a 16MHz clock is 5.3333MHz (3 cycles per sample) but
sampling at that rate isn't very accurate.  Accuracy is pretty good at
2MHz & 4MHz.
 2013-08-03 12:33:23 -07:00