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base: public:agla_v0_11
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public:master public:agla_v0_17 public:agla_v0_16 public:agla_v0_15 public:agla_v0_14 public:agla_v0_13 public:agla_leonardo public:agla_v0_12 public:agla_v0_11 public:agla_v0_10 public:agla_v0_9 public:aglan_alpha public:agla_v0_8 public:agla_v0_7 public:agla_v0_6 public:agla_megaram public:agla_v0_5 public:agla_v0_4 public:agla_v0_3
public:0.17.0
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compare: public:agla_v0_12
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public:master public:agla_v0_17 public:agla_v0_16 public:agla_v0_15 public:agla_v0_14 public:agla_v0_13 public:agla_leonardo public:agla_v0_12 public:agla_v0_11 public:agla_v0_10 public:agla_v0_9 public:aglan_alpha public:agla_v0_8 public:agla_v0_7 public:agla_v0_6 public:agla_megaram public:agla_v0_5 public:agla_v0_4 public:agla_v0_3
public:0.17.0

3 Commits
agla_v0_11 ... agla_v0_12

Author SHA1 Message Date
Andrew Gillham
9c83897b9b Correct preprocessor logic to avoid data gap on the Mega. 
Fixes issue #14 where I copied the preprocessor logic from a different
Mega related check and didn't fix up the elif.  So samples from 512 -
1023 were always zero on the Mega.
Update to v0.12
 2013-09-06 09:54:41 -07:00
Andrew Gillham
2a549be57a Tweak README 2013-08-03 13:25:54 -07:00
Andrew Gillham
2d31a93687 Add notes about 2MHz/4MHz mode and binary size. 
Also move a couple more things under #ifdef DEBUG in an attempt to
reduce the code size for ATmega168.
It current doesn't fit in the '168 but maybe after some more tweaks.
 2013-08-03 13:23:02 -07:00
4 changed files with 9 additions and 7 deletions
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2
README
View File

@@ -60,5 +60,5 @@ Please try it out and report back.
This master branch now supports Arduino 1.0 only.
Checkout branch logic_analyzer_v0_5 for Arduino 22 support.
Release: v0.11 August 3, 2013.
Release: v0.12 September 6, 2013.

4
logic_analyzer.ino
View File

@@ -78,7 +78,7 @@
* until after the trigger fires.
* Please try it out and report back.
*
* Release: v0.11 August 3, 2013.
* Release: v0.12 September 6, 2013.
*
*/
@@ -907,7 +907,7 @@ void get_metadata() {
Serial.write('0');
Serial.write('.');
Serial.write('1');
Serial.write('1');
Serial.write('2');
Serial.write((uint8_t)0x00);
/* sample memory */

5
logic_analyzer_inline_2mhz.ino
View File

@@ -1154,7 +1154,7 @@ void captureInline2mhz() {
INLINE_NOP;
logicdata[531] = CHANPIN;
INLINE_NOP;
#if defined(__AVR_ATmega328P__)
#if defined(__AVR_ATmega328P__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
logicdata[532] = CHANPIN;
INLINE_NOP;
logicdata[533] = CHANPIN;
@@ -2139,7 +2139,8 @@ void captureInline2mhz() {
INLINE_NOP;
logicdata[1023] = CHANPIN;
INLINE_NOP;
#elif defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
#endif
#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
logicdata[1024] = CHANPIN;
INLINE_NOP;
logicdata[1025] = CHANPIN;

5
logic_analyzer_inline_4mhz.ino
View File

@@ -1154,7 +1154,7 @@ void captureInline4mhz() {
INLINE_NOP;
logicdata[531] = CHANPIN;
INLINE_NOP;
#if defined(__AVR_ATmega328P__)
#if defined(__AVR_ATmega328P__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
logicdata[532] = CHANPIN;
INLINE_NOP;
logicdata[533] = CHANPIN;
@@ -2139,7 +2139,8 @@ void captureInline4mhz() {
INLINE_NOP;
logicdata[1023] = CHANPIN;
INLINE_NOP;
#elif defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
#endif
#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
logicdata[1024] = CHANPIN;
INLINE_NOP;
logicdata[1025] = CHANPIN;