Update README with supported hardware details. Fixes issue #55. Also add some other similar SUMP projects to the bottom of the README. Fix the Makefile as well since I moved the sketches into examples. The Makefile needs more work to add the Leonardo and Sigrok sketches but that is more of an exercise for the reader.

LICENSE

@@ -1,4 +1,4 @@
-Copyright (c) 2011,2012,2013,2014,2015,2016,2017,2018,2019,2020,2021 Andrew Gillham
+Copyright (c) 2011,2012,2013,2014,2015,2016,2017,2018,2019,2020,2021,2022,2023 Andrew Gillham
 All rights reserved.
 
 Redistribution and use in source and binary forms, with or without

Makefile

@@ -2,7 +2,7 @@
 # Makefile for an Arduino based logic analyzer using the arduino-cli
 #
 
-TARGET	= logic_analyzer
+TARGET	= examples/logic_analyzer
 FQBN	= arduino:avr:diecimila
 SERIAL	= /dev/ttyUSB*
 

README.md

@@ -1,5 +1,4 @@
-SUMP compatible logic analyzer for Arduino
+# SUMP compatible logic analyzer for Arduino
-==========================================
 
 This Arduino sketch implements a SUMP protocol compatible logic analyzer.
 This implementation is compatible with the standard SUMP client as well as
@@ -14,8 +13,55 @@ LED pin for an input.
 On the Arduino Mega board 8 channels are supported and 7k of samples.
 Pins 22-29 (Port A) are used by default.
 
-Client Software
+# Supported Hardware
-===============
+The AGLA sketch supports many Arduino boards based on the following microcontrollers, generally using an FTDI based USB to serial, or builtin in the case of the ATmega32U4.  Many inexpensive boards use the 'CH340' USB to serial chipset which may or may not work well.  Please test yours and file an issue.
+
+Generally I test the Arduino Duemilanove and Arduino UNO R3 the most, but I do want to make as many boards as possible work.
+
+The microcontrollers are listed below with corresponding Arduino boards.  This is not an exhaustive list and I do not own all of these boards to test them.  Again please test and file any issues.
+
+## ATmega168
+- Arduino Diecimila
+- Arduino Mini (Original was '168)
+
+## ATmega328P
+- Arduino Duemilanove
+- Arduino Mini (Original was '168)
+- Arduino Nano
+- Arduino Pro
+- Arduino Pro Mini
+- Arduino Uno (Rev2, R3, SMD)
+- Arduino Uno Mini
+
+## ATmega1280
+- Arduino Mega
+
+## ATmega2560
+- Arduino Mega 2560
+
+## ATmega32U4
+- Arduino Leonardo
+- Arduino Micro
+
+# Installation
+
+## Arduino IDE Library Manager
+Starting with v0.17 you can install directly in the Arduino IDE using the Library Manager.
+Look under the menu 'Sketch -> Include Library -> Manage Libraries...' to open the Library Manager, then enter 'LogicAnalyzer' in the search field and it should find this project and you can click INSTALL.
+
+## Manual via ZIP file
+You can use the GitHub 'Download ZIP' feature to get an installable "library"
+for use with the Arduino IDE.  Select 'Sketch -> Include Library -> Add .ZIP Libary'
+from the Arduino IDE 2.x and select the zip file you downloaded from GitHub, then select open.
+
+## After Installation
+Once installed you can use the 'File -> Examples -> LogicAnalyzer' menu to find
+different versions of the sketches.  You might want to start with `logic_analyzer_sigrok`
+and use PulseView.
+
+# Client Software
+
+## Sigrok
 
 Sigrok support via the 'ols' device configuration has been added. This
 mostly involved returning the capture buffer in the reverse order.
@@ -42,12 +88,15 @@ the serial port resets the Arduino there are some issues/bugs to work out yet.
 sigrok-cli --driver=ols:conn=/dev/ttyUSB0 --config samplerate=1Mhz --config pattern=External --samples 1024 --channels 2
 ```
 
+## OLS Client(s)
+
+*NOTE: This section needs work as due to various Java issuses building a working OLS client is somewhat broken right now.*
+
 The OLS alternative client hasn't had an official release recently so you will
 need to compile it yourself.
 
 Follow the build instructions here: https://github.com/jawi/ols
 
-
 Older details on the OLS client is available at the project page:
 https://lxtreme.nl/projects/ols/
 
@@ -58,8 +107,7 @@ The alternative client version is highly recommended.  You can tried the older
 release ols-0.9.7.2 but most likely need to build it yourself. Use "ols-0.9.7"
 or newer for built-in device profiles.
 
-To use this with the original or alternative SUMP clients,
+To use this with the original or alternative SUMP clients, use these settings:
-use these settings:
 ```
 Sampling rate: 4MHz (or lower) (no 2MHz on ATmega168)
 Channel Groups: 0 (zero) only
@@ -71,8 +119,8 @@ Noise Filter: doesn't matter
 RLE: disabled (unchecked)
 ```
 
-Using the Logic Analyzer
+# Using the Logic Analyzer
-========================
+
 Triggering is still a work in progress, but generally works for samples
 below 1MHz.  1MHz works for a basic busy wait trigger that doesn't store
 until after the trigger fires.
@@ -80,8 +128,7 @@ until after the trigger fires.
 Please try it out and report back.  Please provide a detailed bug report
 if you file an issue.
 
-Debugging
+# Debugging
-=========
 
 You can uncomment the `#define DEBUG_MENU` line to add some diagnostic menu
 options for capturing or dumping the capture buffer.
@@ -91,24 +138,50 @@ is generally only useful for development, while the DEBUG_MENU option is
 good for troubleshooting when the logic_analyzer sketch isn't working for you.
 Both are disabled by default to conserve RAM for improved stability.
 
-CLI compiling
+# CLI compiling
-=============
 
 If you want to use the `arduino-cli` tool to compile this using the Makefile,
 you'll need to install the tool first following instructions here:
 https://arduino.github.io/arduino-cli/
 
-Once installed you can simple type `make` and you should get some simple help:
+If you use Debian or Ubuntu you can install `arduino-cli` and the AVR toolchain like this:
+```bash
+sudo snap install arduino-cli
+arduino-cli core install arduino:avr
+```
+
+Once installed you can simply type `make` and you should get some basic help:
 ```bash
 $ make
 ---> run 'make build' to compile for Arduino Duemilanove
 ---> run 'make upload' to upload to /dev/ttyUSB*
 ```
 
+# Other SUMP compatible projects
 
-Other Notes
+There are other projects doing some similar that have been created in the last 12 years or so since I started my work.  I'll start the list with one I've read about recently.
-===========================================================================
+
-```
+This first project runs on a Raspberry Pi Pico and has some amazing logic analyzer specs for a $5 board!
+
+[μLA: Micro Logic Analyzer](https://github.com/dotcypress/ula/)
+
+[An earlier RPi Pico SUMP logic analyzer](https://github.com/perexg/picoprobe-sump)
+
+[ESP32 based Logic Analyzer](https://github.com/EUA/ESP32_LogicAnalyzer)
+
+[Flexible SUMP library](https://github.com/pschatzmann/logic-analyzer)
+
+[STM32 based SUMP logic analyzer](https://github.com/ag88/SumpSTM32F401cc)
+
+[Another STM32 based logic analyzer](https://github.com/jpbarraca/LogicAlNucleo)
+
+[ESP32 SUMP logic analyzer for Sigrok](https://github.com/Ebiroll/esp32_sigrok)
+
+[Another STM32 logic analyzer](https://github.com/ddrown/stm32-sump)
+
+# Older Notes
+
+```text
 NOTE: Starting with v0.11 you can sample at 4MHz & 2MHz rates in addition to the 
       previous 1MHz and lower rates.  This is done via unrolled loops which
       makes the source code huge and the binary takes much more of the flash.

examples/logic_analyzer/logic_analyzer.ino

@@ -62,7 +62,7 @@
  * until after the trigger fires.
  * Please try it out and report back.
  *
- * Release: v0.16 October 3, 2023.
+ * Release: v0.17 October 5, 2023.
  *
  */
 
@@ -949,7 +949,7 @@ void get_metadata() {
   Serial.write('0');
   Serial.write('.');
   Serial.write('1');
-  Serial.write('6');
+  Serial.write('7');
   Serial.write((uint8_t)0x00);
 
   /* sample memory */

examples/logic_analyzer/logic_analyzer_inline_2mhz.ino

@@ -2,7 +2,7 @@
  *
  * SUMP Protocol Implementation for Arduino boards.
  *
- * Copyright (c) 2011,2012,2013,2014,2015,2016,2017,2018,2019,2020,2021 Andrew Gillham
+ * Copyright (c) 2011,2012,2013,2014,2015,2016,2017,2018,2019,2020,2021,2022,2023 Andrew Gillham
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without

examples/logic_analyzer/logic_analyzer_inline_4mhz.ino

@@ -2,7 +2,7 @@
  *
  * SUMP Protocol Implementation for Arduino boards.
  *
- * Copyright (c) 2011,2012,2013,2014,2015,2016,2017,2018,2019,2020,2021 Andrew Gillham
+ * Copyright (c) 2011,2012,2013,2014,2015,2016,2017,2018,2019,2020,2021,2022,2023 Andrew Gillham
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without

examples/logic_analyzer_leonardo/logic_analyzer_inline_2mhz.ino

@@ -2,7 +2,7 @@
  *
  * SUMP Protocol Implementation for Arduino boards.
  *
- * Copyright (c) 2011,2012,2013,2014,2015,2016,2017,2018,2019,2020,2021 Andrew Gillham
+ * Copyright (c) 2011,2012,2013,2014,2015,2016,2017,2018,2019,2020,2021,2022,2023 Andrew Gillham
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without

examples/logic_analyzer_leonardo/logic_analyzer_inline_4mhz.ino

@@ -2,7 +2,7 @@
  *
  * SUMP Protocol Implementation for Arduino boards.
  *
- * Copyright (c) 2011,2012,2013,2014,2015,2016,2017,2018,2019,2020,2021 Andrew Gillham
+ * Copyright (c) 2011,2012,2013,2014,2015,2016,2017,2018,2019,2020,2021,2022,2023 Andrew Gillham
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without

examples/logic_analyzer_leonardo/logic_analyzer_leonardo.ino

@@ -62,7 +62,7 @@
  * until after the trigger fires.
  * Please try it out and report back.
  *
- * Release: v0.16 October 3, 2023.
+ * Release: v0.17 October 5, 2023.
  *
  */
 
@@ -918,7 +918,7 @@ void get_metadata() {
   Serial.write('0');
   Serial.write('.');
   Serial.write('1');
-  Serial.write('6');
+  Serial.write('7');
   Serial.write((uint8_t)0x00);
 
   /* sample memory */

examples/logic_analyzer_sigrok/logic_analyzer_sigrok.ino

@@ -62,7 +62,7 @@
  * until after the trigger fires.
  * Please try it out and report back.
  *
- * Release: v0.16 October 3, 2023.
+ * Release: v0.17 October 5, 2023.
  *
  */
 
@@ -949,7 +949,7 @@ void get_metadata() {
   Serial.write('0');
   Serial.write('.');
   Serial.write('1');
-  Serial.write('6');
+  Serial.write('7');
   Serial.write((uint8_t)0x00);
 
   /* sample memory */

library.properties

@@ -0,0 +1,9 @@
+name=LogicAnalyzer
+version=0.17.0
+author=Andrew Gillham <gillham@roadsign.com>
+maintainer=Andrew Gillham <gillham@roadsign.com>
+sentence=A SUMP protocol compatible logic analyzer firmware
+paragraph=These firmware sketches provide a 6 channel logic analyzer for use with the SUMP protocol based OLS clients. There is also a Sigrok compatible firmware using the OpenBench Logic Sniffer (ols) driver .
+category=Signal Input/Output
+url=https://github.com/gillham/logic_analyzer
+architectures=avr

logic_analyzer/LICENSE

@@ -1,22 +0,0 @@
-Copyright (c) 2011,2012,2013,2014,2015,2016,2017,2018,2019,2020,2021 Andrew Gillham
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions
-are met:
-1. Redistributions of source code must retain the above copyright
-   notice, this list of conditions and the following disclaimer.
-2. Redistributions in binary form must reproduce the above copyright
-   notice, this list of conditions and the following disclaimer in the
-   documentation and/or other materials provided with the distribution.
-
-THIS SOFTWARE IS PROVIDED BY ANDREW GILLHAM ``AS IS'' AND ANY EXPRESS OR
-IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
-OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
-IN NO EVENT SHALL ANDREW GILLHAM BE LIABLE FOR ANY DIRECT, INDIRECT,
-INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

logic_analyzer_leonardo/LICENSE

@@ -1,22 +0,0 @@
-Copyright (c) 2011,2012,2013,2014,2015,2016,2017,2018,2019,2020,2021 Andrew Gillham
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions
-are met:
-1. Redistributions of source code must retain the above copyright
-   notice, this list of conditions and the following disclaimer.
-2. Redistributions in binary form must reproduce the above copyright
-   notice, this list of conditions and the following disclaimer in the
-   documentation and/or other materials provided with the distribution.
-
-THIS SOFTWARE IS PROVIDED BY ANDREW GILLHAM ``AS IS'' AND ANY EXPRESS OR
-IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
-OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
-IN NO EVENT SHALL ANDREW GILLHAM BE LIABLE FOR ANY DIRECT, INDIRECT,
-INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

logic_analyzer_sigrok/LICENSE

@@ -1,22 +0,0 @@
-Copyright (c) 2011,2012,2013,2014,2015,2016,2017,2018,2019,2020,2021 Andrew Gillham
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions
-are met:
-1. Redistributions of source code must retain the above copyright
-   notice, this list of conditions and the following disclaimer.
-2. Redistributions in binary form must reproduce the above copyright
-   notice, this list of conditions and the following disclaimer in the
-   documentation and/or other materials provided with the distribution.
-
-THIS SOFTWARE IS PROVIDED BY ANDREW GILLHAM ``AS IS'' AND ANY EXPRESS OR
-IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
-OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
-IN NO EVENT SHALL ANDREW GILLHAM BE LIABLE FOR ANY DIRECT, INDIRECT,
-INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

src/use_examples_for_logic_analyzer.h

@@ -0,0 +1,2 @@
+// This is a placeholder. Use File->Examples->LogicAnalyzer menu
+// for the logic analyzer sketches.