mirror of
https://github.com/gillham/logic_analyzer.git
synced 2026-05-01 15:10:43 +03:00
Use unrolled loops to sample at 2MHz & 4MHz rates. Based on some testing by Bob Davis (http://bobdavis321.blogspot.com) The maximum with a 16MHz clock is 5.3333MHz (3 cycles per sample) but sampling at that rate isn't very accurate. Accuracy is pretty good at 2MHz & 4MHz.
2.3 KiB
2.3 KiB