This way we can easily check with 'diff' for differences in our code and
Atmel softpack. Also, this layout is more suitable for building various
different firmware images (e.g. factory-test, dfu-loader, main
application) for a variety of different boards (simtrace, owhw, qmod).
The PLL setting doesn't depend on the 'qmod' board type but on the
combination of the BOARD_MAINOSC and BOARD_MCK #defines. So let's
remove the '#ifdef qmod' from the equation.
The only 'qmod' specific part is whether or not to use the internal xtal
oscillator or not.
Table 42-31 ofd DOC6500 states that the minimum output frequency of the
PLL is 60 MHz. The existing qmod code violated this by configuring the
PLL multiplier output to 12*4 = 48 MHz. Let's use 12*8 = 96 and then
divide that by two to get to the desired 48 MHz.
This might help to resolve the non-working USB on the qmod so far.
You can compile the firmware for this new target using 'make
BOARD=qmod'.
The QMOD differs from simtrace+owhw in terms of low-level
initialization, as it has an external 12MHz clock at XIN, thus bypasses
the main oscillator and needs different PLL configuration.
Depending on which features (and thus USB configurations) are included
in the firmware, we need to re-define the ordering of the configuration
numbers, as the Atmel USBD driver simply assumes that configurations are
numbered 1..N without any gaps in the sequence.
... among those is a rotor (\|/-) that is printed by the main loop,
so one can observe if the main loop is still executing or the system
is somehow stuck.
* ensure the PB8/PB9 pins are actually not in GPIO mode, which they
apparently are on boot-up
* ensure that neither pull-up nor pull-down are enabled on PB8/PB9
* ensure we first start the oscillator, before selecting it
The sum of the above changes seems to make oscillator start-up much more
reliable than before. The time needed for initialization is now pretty
stable, and the occasional 15-20second clock stabiliziation has not been
observed with this change.
The define PR was introduced to switch quickly between TRACE levels
for specific debug print messages.
Now, it all became debug output, since it is not needed in normal
operation.
* ISO7816_Init: Takes Usart_info and CLK_SLAVE/CLK_MASTER as param
* ISO7816_SendChar, ISO7816_GetChar: Usart_info is passed
* ISO7816_Set_Reset_Pin function for CCID part
* iso7816_4.c: BOARD_ISO7816_BASE_USART replaced by USART_SIM
* Redundant _ISO7816_Init, _ISO7816_SendChar, _ISO7816_GetChar
functions removed
* All simtrace modes use iso7816_4.c functions instead of redefined
_ISO7816_xxx functions
Based on the sniff with a logic analyzer the time when the RST line
is holded low by simtrace is too short.
A better timeout value should be searched for later anyways.
